Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 1 | # |
| 2 | # PINCTRL infrastructure and drivers |
| 3 | # |
| 4 | |
| 5 | menu "Pin controllers" |
| 6 | |
| 7 | config PINCTRL |
| 8 | bool "Support pin controllers" |
| 9 | depends on DM |
| 10 | help |
| 11 | This enables the basic support for pinctrl framework. You may want |
| 12 | to enable some more options depending on what you want to do. |
| 13 | |
| 14 | config PINCTRL_FULL |
| 15 | bool "Support full pin controllers" |
| 16 | depends on PINCTRL && OF_CONTROL |
| 17 | default y |
| 18 | help |
| 19 | This provides Linux-compatible device tree interface for the pinctrl |
| 20 | subsystem. This feature depends on device tree configuration because |
| 21 | it parses a device tree to look for the pinctrl device which the |
| 22 | peripheral device is associated with. |
| 23 | |
| 24 | If this option is disabled (it is the only possible choice for non-DT |
| 25 | boards), the pinctrl core provides no systematic mechanism for |
| 26 | identifying peripheral devices, applying needed pinctrl settings. |
| 27 | It is totally up to the implementation of each low-level driver. |
| 28 | You can save memory footprint in return for some limitations. |
| 29 | |
| 30 | config PINCTRL_GENERIC |
| 31 | bool "Support generic pin controllers" |
| 32 | depends on PINCTRL_FULL |
| 33 | default y |
| 34 | help |
| 35 | Say Y here if you want to use the pinctrl subsystem through the |
| 36 | generic DT interface. If enabled, some functions become available |
| 37 | to parse common properties such as "pins", "groups", "functions" and |
| 38 | some pin configuration parameters. It would be easier if you only |
| 39 | need the generic DT interface for pin muxing and pin configuration. |
| 40 | If you need to handle vendor-specific DT properties, you can disable |
| 41 | this option and implement your own set_state callback in the pinctrl |
| 42 | operations. |
| 43 | |
| 44 | config PINMUX |
| 45 | bool "Support pin multiplexing controllers" |
| 46 | depends on PINCTRL_GENERIC |
| 47 | default y |
| 48 | help |
| 49 | This option enables pin multiplexing through the generic pinctrl |
Simon Glass | 8d6510d | 2015-08-30 16:55:12 -0600 | [diff] [blame] | 50 | framework. Most SoCs have their own own multiplexing arrangement |
| 51 | where a single pin can be used for several functions. An SoC pinctrl |
| 52 | driver allows the required function to be selected for each pin. |
| 53 | The driver is typically controlled by the device tree. |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 54 | |
| 55 | config PINCONF |
| 56 | bool "Support pin configuration controllers" |
| 57 | depends on PINCTRL_GENERIC |
| 58 | help |
| 59 | This option enables pin configuration through the generic pinctrl |
| 60 | framework. |
| 61 | |
| 62 | config SPL_PINCTRL |
Philipp Tomsich | 2b1c204 | 2017-07-26 12:27:42 +0200 | [diff] [blame] | 63 | bool "Support pin controllers in SPL" |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 64 | depends on SPL && SPL_DM |
| 65 | help |
| 66 | This option is an SPL-variant of the PINCTRL option. |
| 67 | See the help of PINCTRL for details. |
| 68 | |
| 69 | config SPL_PINCTRL_FULL |
| 70 | bool "Support full pin controllers in SPL" |
| 71 | depends on SPL_PINCTRL && SPL_OF_CONTROL |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 72 | default n if TARGET_STM32F746_DISCO |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 73 | default y |
| 74 | help |
| 75 | This option is an SPL-variant of the PINCTRL_FULL option. |
| 76 | See the help of PINCTRL_FULL for details. |
| 77 | |
| 78 | config SPL_PINCTRL_GENERIC |
| 79 | bool "Support generic pin controllers in SPL" |
| 80 | depends on SPL_PINCTRL_FULL |
| 81 | default y |
| 82 | help |
| 83 | This option is an SPL-variant of the PINCTRL_GENERIC option. |
| 84 | See the help of PINCTRL_GENERIC for details. |
| 85 | |
| 86 | config SPL_PINMUX |
| 87 | bool "Support pin multiplexing controllers in SPL" |
| 88 | depends on SPL_PINCTRL_GENERIC |
| 89 | default y |
| 90 | help |
| 91 | This option is an SPL-variant of the PINMUX option. |
| 92 | See the help of PINMUX for details. |
Simon Glass | 8d6510d | 2015-08-30 16:55:12 -0600 | [diff] [blame] | 93 | The pinctrl subsystem can add a substantial overhead to the SPL |
| 94 | image since it typically requires quite a few tables either in the |
| 95 | driver or in the device tree. If this is acceptable and you need |
| 96 | to adjust pin multiplexing in SPL in order to boot into U-Boot, |
| 97 | enable this option. You will need to enable device tree in SPL |
| 98 | for this to work. |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 99 | |
| 100 | config SPL_PINCONF |
| 101 | bool "Support pin configuration controllers in SPL" |
| 102 | depends on SPL_PINCTRL_GENERIC |
| 103 | help |
| 104 | This option is an SPL-variant of the PINCONF option. |
| 105 | See the help of PINCONF for details. |
| 106 | |
| 107 | if PINCTRL || SPL_PINCTRL |
| 108 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 109 | config PINCTRL_AR933X |
Wills Wang | 77ae238 | 2016-03-16 16:59:55 +0800 | [diff] [blame] | 110 | bool "QCA/Athores ar933x pin control driver" |
| 111 | depends on DM && SOC_AR933X |
| 112 | help |
| 113 | Support pin multiplexing control on QCA/Athores ar933x SoCs. |
| 114 | The driver is controlled by a device tree node which contains |
| 115 | both the GPIO definitions and pin control functions for each |
| 116 | available multiplex function. |
| 117 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 118 | config PINCTRL_AT91 |
| 119 | bool "AT91 pinctrl driver" |
| 120 | depends on DM |
| 121 | help |
| 122 | This option is to enable the AT91 pinctrl driver for AT91 PIO |
| 123 | controller. |
| 124 | |
| 125 | AT91 PIO controller is a combined gpio-controller, pin-mux and |
| 126 | pin-config module. Each I/O pin may be dedicated as a general-purpose |
| 127 | I/O or be assigned to a function of an embedded peripheral. Each I/O |
| 128 | pin has a glitch filter providing rejection of glitches lower than |
| 129 | one-half of peripheral clock cycle and a debouncing filter providing |
| 130 | rejection of unwanted pulses from key or push button operations. You |
| 131 | can also control the multi-driver capability, pull-up and pull-down |
| 132 | feature on each I/O pin. |
| 133 | |
| 134 | config PINCTRL_AT91PIO4 |
| 135 | bool "AT91 PIO4 pinctrl driver" |
| 136 | depends on DM |
| 137 | help |
| 138 | This option is to enable the AT91 pinctrl driver for AT91 PIO4 |
| 139 | controller which is available on SAMA5D2 SoC. |
| 140 | |
| 141 | config PINCTRL_PIC32 |
| 142 | bool "Microchip PIC32 pin-control and pin-mux driver" |
| 143 | depends on DM && MACH_PIC32 |
| 144 | default y |
| 145 | help |
| 146 | Supports individual pin selection and configuration for each |
| 147 | remappable peripheral available on Microchip PIC32 |
| 148 | SoCs. This driver is controlled by a device tree node which |
| 149 | contains both GPIO defintion and pin control functions. |
| 150 | |
| 151 | config PINCTRL_QCA953X |
Wills Wang | a56de4c | 2016-03-16 16:59:56 +0800 | [diff] [blame] | 152 | bool "QCA/Athores qca953x pin control driver" |
| 153 | depends on DM && SOC_QCA953X |
| 154 | help |
| 155 | Support pin multiplexing control on QCA/Athores qca953x SoCs. |
Wills Wang | a56de4c | 2016-03-16 16:59:56 +0800 | [diff] [blame] | 156 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 157 | The driver is controlled by a device tree node which contains both |
| 158 | the GPIO definitions and pin control functions for each available |
| 159 | multiplex function. |
| 160 | |
| 161 | config PINCTRL_ROCKCHIP_RK3036 |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 162 | bool "Rockchip rk3036 pin control driver" |
Simon Glass | 8844296 | 2015-08-30 16:55:35 -0600 | [diff] [blame] | 163 | depends on DM |
| 164 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 165 | Support pin multiplexing control on Rockchip rk3036 SoCs. |
| 166 | |
| 167 | The driver is controlled by a device tree node which contains both |
| 168 | the GPIO definitions and pin control functions for each available |
| 169 | multiplex function. |
Simon Glass | 8844296 | 2015-08-30 16:55:35 -0600 | [diff] [blame] | 170 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 171 | config PINCTRL_ROCKCHIP_RK3188 |
Philipp Tomsich | a0ee8d1 | 2017-03-17 20:41:03 +0100 | [diff] [blame] | 172 | bool "Rockchip rk3188 pin control driver" |
Heiko Stübner | 36d6b16 | 2017-02-18 19:46:31 +0100 | [diff] [blame] | 173 | depends on DM |
| 174 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 175 | Support pin multiplexing control on Rockchip rk3188 SoCs. |
Heiko Stübner | 36d6b16 | 2017-02-18 19:46:31 +0100 | [diff] [blame] | 176 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 177 | The driver is controlled by a device tree node which contains both |
| 178 | the GPIO definitions and pin control functions for each available |
| 179 | multiplex function. |
huang lin | 4ccd995 | 2015-11-17 14:20:20 +0800 | [diff] [blame] | 180 | |
Kever Yang | 5f94896 | 2017-06-23 17:17:50 +0800 | [diff] [blame] | 181 | config PINCTRL_ROCKCHIP_RK322X |
| 182 | bool "Rockchip rk322x pin control driver" |
| 183 | depends on DM |
| 184 | help |
| 185 | Support pin multiplexing control on Rockchip rk322x SoCs. |
| 186 | |
| 187 | The driver is controlled by a device tree node which contains both |
| 188 | the GPIO definitions and pin control functions for each available |
| 189 | multiplex function. |
| 190 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 191 | config PINCTRL_ROCKCHIP_RK3288 |
| 192 | bool "Rockchip rk3288 pin control driver" |
Wenyou Yang | c24e013 | 2017-03-23 12:44:37 +0800 | [diff] [blame] | 193 | depends on DM |
| 194 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 195 | Support pin multiplexing control on Rockchip rk3288 SoCs. |
Wenyou Yang | c24e013 | 2017-03-23 12:44:37 +0800 | [diff] [blame] | 196 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 197 | The driver is controlled by a device tree node which contains both |
| 198 | the GPIO definitions and pin control functions for each available |
| 199 | multiplex function. |
Wenyou Yang | 309686c | 2016-07-20 17:16:27 +0800 | [diff] [blame] | 200 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 201 | config PINCTRL_ROCKCHIP_RK3328 |
Philipp Tomsich | a0ee8d1 | 2017-03-17 20:41:03 +0100 | [diff] [blame] | 202 | bool "Rockchip rk3328 pin control driver" |
Kever Yang | d73a4e8 | 2017-02-23 15:37:53 +0800 | [diff] [blame] | 203 | depends on DM |
| 204 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 205 | Support pin multiplexing control on Rockchip rk3328 SoCs. |
| 206 | |
| 207 | The driver is controlled by a device tree node which contains both |
| 208 | the GPIO definitions and pin control functions for each available |
| 209 | multiplex function. |
Kever Yang | d73a4e8 | 2017-02-23 15:37:53 +0800 | [diff] [blame] | 210 | |
Andy Yan | 717733f | 2017-05-15 17:50:35 +0800 | [diff] [blame] | 211 | config PINCTRL_ROCKCHIP_RK3368 |
| 212 | bool "Rockchip RK3368 pin control driver" |
| 213 | depends on DM |
| 214 | help |
| 215 | Support pin multiplexing control on Rockchip rk3368 SoCs. |
| 216 | |
| 217 | The driver is controlled by a device tree node which contains both |
| 218 | the GPIO definitions and pin control functions for each available |
| 219 | multiplex function. |
| 220 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 221 | config PINCTRL_ROCKCHIP_RK3399 |
Philipp Tomsich | a0ee8d1 | 2017-03-17 20:41:03 +0100 | [diff] [blame] | 222 | bool "Rockchip rk3399 pin control driver" |
Kever Yang | c4d9c49 | 2016-08-16 17:58:11 +0800 | [diff] [blame] | 223 | depends on DM |
| 224 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 225 | Support pin multiplexing control on Rockchip rk3399 SoCs. |
| 226 | |
| 227 | The driver is controlled by a device tree node which contains both |
| 228 | the GPIO definitions and pin control functions for each available |
| 229 | multiplex function. |
Kever Yang | c4d9c49 | 2016-08-16 17:58:11 +0800 | [diff] [blame] | 230 | |
Andy Yan | 96c3da9 | 2017-06-01 18:00:10 +0800 | [diff] [blame] | 231 | config PINCTRL_ROCKCHIP_RV1108 |
| 232 | bool "Rockchip rv1108 pin control driver" |
| 233 | depends on DM |
| 234 | help |
| 235 | Support pin multiplexing control on Rockchip rv1108 SoC. |
| 236 | |
| 237 | The driver is controlled by a device tree node which contains |
| 238 | both the GPIO definitions and pin control functions for each |
| 239 | available multiplex function. |
| 240 | |
Masahiro Yamada | 0b53a75 | 2015-08-27 12:44:30 +0900 | [diff] [blame] | 241 | config PINCTRL_SANDBOX |
| 242 | bool "Sandbox pinctrl driver" |
| 243 | depends on SANDBOX |
| 244 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 245 | This enables pinctrl driver for sandbox. |
Masahiro Yamada | 0b53a75 | 2015-08-27 12:44:30 +0900 | [diff] [blame] | 246 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 247 | Currently, this driver actually does nothing but print debug |
| 248 | messages when pinctrl operations are invoked. |
| 249 | |
| 250 | config PINCTRL_SINGLE |
| 251 | bool "Single register pin-control and pin-multiplex driver" |
| 252 | depends on DM |
Purna Chandra Mandal | db4fbfc | 2016-01-28 15:30:12 +0530 | [diff] [blame] | 253 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 254 | This enables pinctrl driver for systems using a single register for |
| 255 | pin configuration and multiplexing. TI's AM335X SoCs are examples of |
| 256 | such systems. |
| 257 | |
| 258 | Depending on the platform make sure to also enable OF_TRANSLATE and |
| 259 | eventually SPL_OF_TRANSLATE to get correct address translations. |
Purna Chandra Mandal | db4fbfc | 2016-01-28 15:30:12 +0530 | [diff] [blame] | 260 | |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 261 | config PINCTRL_STI |
| 262 | bool "STMicroelectronics STi pin-control and pin-mux driver" |
| 263 | depends on DM && ARCH_STI |
| 264 | default y |
| 265 | help |
| 266 | Support pin multiplexing control on STMicrolectronics STi SoCs. |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 267 | |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 268 | The driver is controlled by a device tree node which contains both |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 269 | the GPIO definitions and pin control functions for each available |
| 270 | multiplex function. |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 271 | |
Vikas Manocha | 07e9e41 | 2017-02-12 10:25:49 -0800 | [diff] [blame] | 272 | config PINCTRL_STM32 |
| 273 | bool "ST STM32 pin control driver" |
| 274 | depends on DM |
| 275 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 276 | Supports pin multiplexing control on stm32 SoCs. |
Vikas Manocha | 07e9e41 | 2017-02-12 10:25:49 -0800 | [diff] [blame] | 277 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 278 | The driver is controlled by a device tree node which contains both |
| 279 | the GPIO definitions and pin control functions for each available |
| 280 | multiplex function. |
Felix Brack | 7bc2354 | 2017-03-22 11:26:44 +0100 | [diff] [blame] | 281 | |
maxims@google.com | 54651aa | 2017-04-17 12:00:27 -0700 | [diff] [blame] | 282 | config ASPEED_AST2500_PINCTRL |
| 283 | bool "Aspeed AST2500 pin control driver" |
| 284 | depends on DM && PINCTRL_GENERIC && ASPEED_AST2500 |
| 285 | default y |
| 286 | help |
| 287 | Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses |
| 288 | Generic Pinctrl framework and is compatible with the Linux driver, |
| 289 | i.e. it uses the same device tree configuration. |
| 290 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 291 | endif |
| 292 | |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 293 | source "drivers/pinctrl/meson/Kconfig" |
Peng Fan | e2fd36cc | 2016-02-03 10:06:07 +0800 | [diff] [blame] | 294 | source "drivers/pinctrl/nxp/Kconfig" |
Masahiro Yamada | 847e618b8 | 2015-09-11 20:17:32 +0900 | [diff] [blame] | 295 | source "drivers/pinctrl/uniphier/Kconfig" |
Thomas Abraham | cf18bff | 2016-04-23 22:18:08 +0530 | [diff] [blame] | 296 | source "drivers/pinctrl/exynos/Kconfig" |
Konstantin Porotchkin | aed8315 | 2016-12-08 12:22:29 +0200 | [diff] [blame] | 297 | source "drivers/pinctrl/mvebu/Kconfig" |
Masahiro Yamada | 847e618b8 | 2015-09-11 20:17:32 +0900 | [diff] [blame] | 298 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 299 | endmenu |