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git01.mediatek.com / filogic / uboot / 309686c2b1b6c83d6e048db200343888b509c797 / . / drivers / pinctrl / Kconfig
blob: 44b53b9abdd8363af1486c0ceaf483a6f3423eb2 [file] [log] [blame]
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900[diff] [blame]1#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Simon Glass8d6510d2015-08-30 16:55:12 -0600[diff] [blame]50 framework. Most SoCs have their own own multiplexing arrangement
51 where a single pin can be used for several functions. An SoC pinctrl
52 driver allows the required function to be selected for each pin.
53 The driver is typically controlled by the device tree.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900[diff] [blame]54
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
62config SPL_PINCTRL
63 bool "Support pin controlloers in SPL"
64 depends on SPL && SPL_DM
65 help
66 This option is an SPL-variant of the PINCTRL option.
67 See the help of PINCTRL for details.
68
69config SPL_PINCTRL_FULL
70 bool "Support full pin controllers in SPL"
71 depends on SPL_PINCTRL && SPL_OF_CONTROL
72 default y
73 help
74 This option is an SPL-variant of the PINCTRL_FULL option.
75 See the help of PINCTRL_FULL for details.
76
77config SPL_PINCTRL_GENERIC
78 bool "Support generic pin controllers in SPL"
79 depends on SPL_PINCTRL_FULL
80 default y
81 help
82 This option is an SPL-variant of the PINCTRL_GENERIC option.
83 See the help of PINCTRL_GENERIC for details.
84
85config SPL_PINMUX
86 bool "Support pin multiplexing controllers in SPL"
87 depends on SPL_PINCTRL_GENERIC
88 default y
89 help
90 This option is an SPL-variant of the PINMUX option.
91 See the help of PINMUX for details.
Simon Glass8d6510d2015-08-30 16:55:12 -0600[diff] [blame]92 The pinctrl subsystem can add a substantial overhead to the SPL
93 image since it typically requires quite a few tables either in the
94 driver or in the device tree. If this is acceptable and you need
95 to adjust pin multiplexing in SPL in order to boot into U-Boot,
96 enable this option. You will need to enable device tree in SPL
97 for this to work.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900[diff] [blame]98
99config SPL_PINCONF
100 bool "Support pin configuration controllers in SPL"
101 depends on SPL_PINCTRL_GENERIC
102 help
103 This option is an SPL-variant of the PINCONF option.
104 See the help of PINCONF for details.
105
106if PINCTRL || SPL_PINCTRL
107
Wills Wang77ae2382016-03-16 16:59:55 +0800[diff] [blame]108config AR933X_PINCTRL
109 bool "QCA/Athores ar933x pin control driver"
110 depends on DM && SOC_AR933X
111 help
112 Support pin multiplexing control on QCA/Athores ar933x SoCs.
113 The driver is controlled by a device tree node which contains
114 both the GPIO definitions and pin control functions for each
115 available multiplex function.
116
Wills Wanga56de4c2016-03-16 16:59:56 +0800[diff] [blame]117config QCA953X_PINCTRL
118 bool "QCA/Athores qca953x pin control driver"
119 depends on DM && SOC_QCA953X
120 help
121 Support pin multiplexing control on QCA/Athores qca953x SoCs.
122 The driver is controlled by a device tree node which contains
123 both the GPIO definitions and pin control functions for each
124 available multiplex function.
125
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200[diff] [blame]126config ROCKCHIP_RK3036_PINCTRL
127 bool "Rockchip rk3036 pin control driver"
Simon Glass88442962015-08-30 16:55:35 -0600[diff] [blame]128 depends on DM
129 help
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200[diff] [blame]130 Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is
131 controlled by a device tree node which contains both the GPIO
Simon Glass88442962015-08-30 16:55:35 -0600[diff] [blame]132 definitions and pin control functions for each available multiplex
133 function.
134
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200[diff] [blame]135config ROCKCHIP_RK3288_PINCTRL
136 bool "Rockchip pin control driver"
huang lin4ccd9952015-11-17 14:20:20 +0800[diff] [blame]137 depends on DM
138 help
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200[diff] [blame]139 Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
140 is controlled by a device tree node which contains both the GPIO
huang lin4ccd9952015-11-17 14:20:20 +0800[diff] [blame]141 definitions and pin control functions for each available multiplex
142 function.
143
Wenyou Yang309686c2016-07-20 17:16:27 +0800[diff] [blame^]144config PINCTRL_AT91PIO4
145 bool "AT91 PIO4 pinctrl driver"
146 depends on DM
147 help
148 This option is to enable the AT91 pinctrl driver for AT91 PIO4
149 controller which is available on SAMA5D2 SoC.
150
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900[diff] [blame]151config PINCTRL_SANDBOX
152 bool "Sandbox pinctrl driver"
153 depends on SANDBOX
154 help
155 This enables pinctrl driver for sandbox. Currently, this driver
156 actually does nothing but print debug messages when pinctrl
157 operations are invoked.
158
Purna Chandra Mandaldb4fbfc2016-01-28 15:30:12 +0530[diff] [blame]159config PIC32_PINCTRL
160 bool "Microchip PIC32 pin-control and pin-mux driver"
161 depends on DM && MACH_PIC32
162 default y
163 help
164 Supports individual pin selection and configuration for each remappable
165 peripheral available on Microchip PIC32 SoCs. This driver is controlled
166 by a device tree node which contains both GPIO defintion and pin control
167 functions.
168
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900[diff] [blame]169endif
170
Peng Fane2fd36cc2016-02-03 10:06:07 +0800[diff] [blame]171source "drivers/pinctrl/nxp/Kconfig"
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900[diff] [blame]172source "drivers/pinctrl/uniphier/Kconfig"
Thomas Abrahamcf18bff2016-04-23 22:18:08 +0530[diff] [blame]173source "drivers/pinctrl/exynos/Kconfig"
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900[diff] [blame]174
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900[diff] [blame]175endmenu