blob: 8b924d404c2d61ada5644186a3a30d42e0bacf86 [file] [log] [blame]
Wasim Khan54e44ef2020-01-06 12:05:57 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019-2020 NXP
4 *
5 * PCIe DT fixup for NXP Layerscape SoCs
6 * Author: Wasim Khan <wasim.khan@nxp.com>
7 *
8 */
9
10#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -060011#include <init.h>
Wasim Khan54e44ef2020-01-06 12:05:57 +000012#include <asm/arch/clock.h>
13#include <asm/arch/soc.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060014#include <linux/libfdt.h>
Wasim Khan54e44ef2020-01-06 12:05:57 +000015#include "pcie_layerscape_fixup_common.h"
16
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090017void ft_pci_setup(void *blob, struct bd_info *bd)
Wasim Khan54e44ef2020-01-06 12:05:57 +000018{
19#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
20 uint svr;
21
22 svr = SVR_SOC_VER(get_svr());
23
24 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
25 ft_pci_setup_ls_gen4(blob, bd);
26 else
27#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
28 ft_pci_setup_ls(blob, bd);
29}
Wasim Khan9d3d2302020-01-06 12:05:59 +000030
31#if defined(CONFIG_FSL_LAYERSCAPE)
Wasim Khan70bec5c2020-01-06 12:06:00 +000032int lx2_board_fix_fdt(void *fdt)
33{
34 char *reg_name, *old_str, *new_str;
35 const char *reg_names;
36 int names_len, old_str_len, new_str_len, remaining_str_len;
37 struct str_map {
38 char *old_str;
39 char *new_str;
40 } reg_names_map[] = {
41 { "csr_axi_slave", "regs" },
42 { "config_axi_slave", "config" }
43 };
44 int off = -1, i;
Hou Zhiqiangfdb1dff2020-09-13 23:12:50 +080045 const fdt32_t *prop;
46 u32 ob_wins, ib_wins;
Wasim Khan70bec5c2020-01-06 12:06:00 +000047
48 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
49 while (off != -FDT_ERR_NOTFOUND) {
50 fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
51 strlen("fsl,ls2088a-pcie") + 1);
52
53 reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
54 if (!reg_names)
55 continue;
56 reg_name = (char *)reg_names;
57 remaining_str_len = names_len - (reg_name - reg_names);
58 i = 0;
59 while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
60 old_str = reg_names_map[i].old_str;
61 new_str = reg_names_map[i].new_str;
62 old_str_len = strlen(old_str);
63 new_str_len = strlen(new_str);
64 if (memcmp(reg_name, old_str, old_str_len) == 0) {
65 /* first only leave required bytes for new_str
66 * and copy rest of the string after it
67 */
68 memcpy(reg_name + new_str_len,
69 reg_name + old_str_len,
70 remaining_str_len - old_str_len);
71
72 /* Now copy new_str */
73 memcpy(reg_name, new_str, new_str_len);
74 names_len -= old_str_len;
75 names_len += new_str_len;
76 i++;
77 }
78
79 reg_name = memchr(reg_name, '\0', remaining_str_len);
80 if (!reg_name)
81 break;
82 reg_name += 1;
83
84 remaining_str_len = names_len - (reg_name - reg_names);
85 }
86 fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
87 fdt_delprop(fdt, off, "apio-wins");
88 fdt_delprop(fdt, off, "ppio-wins");
89 off = fdt_node_offset_by_compatible(fdt, off,
90 "fsl,lx2160a-pcie");
91 }
Hou Zhiqiangfdb1dff2020-09-13 23:12:50 +080092
93 /* Fixup PCIe EP nodes */
94 off = -1;
95 off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep");
96 while (off != -FDT_ERR_NOTFOUND) {
97 fdt_setprop_string(fdt, off, "compatible",
98 "fsl,lx2160ar2-pcie-ep");
99 prop = fdt_getprop(fdt, off, "apio-wins", NULL);
100 if (!prop) {
101 printf("%s: Failed to fixup PCIe EP node @0x%x\n",
102 __func__, off);
Hou Zhiqiange1a84432020-10-26 11:57:42 +0800103 off = fdt_node_offset_by_compatible(fdt, off,
104 "fsl,lx2160a-pcie-ep");
Hou Zhiqiangfdb1dff2020-09-13 23:12:50 +0800105 continue;
106 }
107
108 ob_wins = fdt32_to_cpu(*prop);
109 ib_wins = (ob_wins == 256) ? 24 : 8;
110 fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins);
111 fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins);
112 fdt_delprop(fdt, off, "apio-wins");
113
114 off = fdt_node_offset_by_compatible(fdt, off,
115 "fsl,lx2160a-pcie-ep");
116 }
117
Wasim Khan70bec5c2020-01-06 12:06:00 +0000118 return 0;
119}
120
121int pcie_board_fix_fdt(void *fdt)
122{
123 uint svr;
124
125 svr = SVR_SOC_VER(get_svr());
126
Meenakshi Aggarwalccb5d5d2020-10-29 19:16:16 +0530127 if ((svr == SVR_LX2160A || svr == SVR_LX2162A ||
128 svr == SVR_LX2120A || svr == SVR_LX2080A ||
129 svr == SVR_LX2122A || svr == SVR_LX2082A) &&
130 IS_SVR_REV(get_svr(), 2, 0))
Wasim Khan70bec5c2020-01-06 12:06:00 +0000131 return lx2_board_fix_fdt(fdt);
132
133 return 0;
134}
135
Meenakshi Aggarwalccb5d5d2020-10-29 19:16:16 +0530136#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
Wasim Khan9d3d2302020-01-06 12:05:59 +0000137/* returns the next available streamid for pcie, -errno if failed */
138int pcie_next_streamid(int currentid, int idx)
139{
140 if (currentid > FSL_PEX_STREAM_ID_END)
141 return -EINVAL;
142
143 return currentid | ((idx + 1) << 11);
144}
145#else
146/* returns the next available streamid for pcie, -errno if failed */
147int pcie_next_streamid(int currentid, int idx)
148{
149 static int next_stream_id = FSL_PEX_STREAM_ID_START;
150
151 if (next_stream_id > FSL_PEX_STREAM_ID_END)
152 return -EINVAL;
153
154 return next_stream_id++;
155}
156#endif
157#endif /* CONFIG_FSL_LAYERSCAPE */