| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/silk.h |
| 4 | * This file is silk board configuration. |
| 5 | * |
| 6 | * Copyright (C) 2015 Renesas Electronics Corporation |
| 7 | * Copyright (C) 2015 Cogent Embedded, Inc. |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __SILK_H |
| 11 | #define __SILK_H |
| 12 | |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 13 | #include "rcar-gen2-common.h" |
| 14 | |
| Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 15 | #define STACK_AREA_SIZE 0x00100000 |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 16 | #define LOW_LEVEL_MERAM_STACK \ |
| Tom Rini | 4ddbade | 2022-05-25 12:16:03 -0400 | [diff] [blame] | 17 | (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 18 | |
| 19 | /* MEMORY */ |
| 20 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 21 | #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) |
| 22 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) |
| 23 | |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 24 | /* SH Ether */ |
| Tom Rini | 9996ab8 | 2022-12-04 10:13:52 -0500 | [diff] [blame^] | 25 | #define CFG_SH_ETHER_USE_PORT 0 |
| Tom Rini | 45ec5fd | 2022-12-04 10:13:50 -0500 | [diff] [blame] | 26 | #define CFG_SH_ETHER_PHY_ADDR 0x1 |
| Tom Rini | b210dc1 | 2022-12-04 10:13:51 -0500 | [diff] [blame] | 27 | #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| Tom Rini | 872054f | 2022-12-04 10:13:49 -0500 | [diff] [blame] | 28 | #define CFG_SH_ETHER_CACHE_WRITEBACK |
| Tom Rini | a44cb16 | 2022-12-04 10:13:48 -0500 | [diff] [blame] | 29 | #define CFG_SH_ETHER_CACHE_INVALIDATE |
| Tom Rini | dd2eba0 | 2022-12-04 10:13:47 -0500 | [diff] [blame] | 30 | #define CFG_SH_ETHER_ALIGNE_SIZE 64 |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 31 | |
| 32 | /* Board Clock */ |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 33 | |
| Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 34 | #define CFG_EXTRA_ENV_SETTINGS \ |
| Marek Vasut | 4f34a4b | 2018-11-27 00:19:03 +0100 | [diff] [blame] | 35 | "bootm_size=0x10000000\0" |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 36 | |
| Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 37 | /* SPL support */ |
| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 38 | |
| 39 | #endif /* __SILK_H */ |