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Bo Shen42aafb32012-07-05 17:21:46 +00001/*
2 * Copyright (C) 2012 Atmel Corporation
3 *
4 * Configuation settings for the AT91SAM9X5EK board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H__
26#define __CONFIG_H__
27
28#include <asm/hardware.h>
29
30/* ARM asynchronous clock */
31#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
32#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
33#define CONFIG_SYS_HZ 1000
34
35#define CONFIG_AT91SAM9X5EK
36#define CONFIG_AT91FAMILY
37
Bo Shen42aafb32012-07-05 17:21:46 +000038#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
41#define CONFIG_SKIP_LOWLEVEL_INIT
42#define CONFIG_BOARD_EARLY_INIT_F
43#define CONFIG_DISPLAY_CPUINFO
44
Bo Shen70390ab2012-09-04 23:22:55 +000045#define CONFIG_OF_LIBFDT
46
Bo Shen42aafb32012-07-05 17:21:46 +000047/* general purpose I/O */
48#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
49#define CONFIG_AT91_GPIO
50
51/* serial console */
52#define CONFIG_ATMEL_USART
53#define CONFIG_USART_BASE ATMEL_BASE_DBGU
54#define CONFIG_USART_ID ATMEL_ID_SYS
55
56/* LCD */
57#define CONFIG_LCD
58#define LCD_BPP LCD_COLOR16
59#define LCD_OUTPUT_BPP 24
60#define CONFIG_LCD_LOGO
61#undef LCD_TEST_PATTERN
62#define CONFIG_LCD_INFO
63#define CONFIG_LCD_INFO_BELOW_LOGO
64#define CONFIG_SYS_WHITE_ON_BLACK
65#define CONFIG_ATMEL_HLCD
66#define CONFIG_ATMEL_LCD_RGB565
67#define CONFIG_SYS_CONSOLE_IS_IN_ENV
68
69#define CONFIG_BOOTDELAY 3
70
71/*
72 * BOOTP options
73 */
74#define CONFIG_BOOTP_BOOTFILESIZE
75#define CONFIG_BOOTP_BOOTPATH
76#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_HOSTNAME
78
79/*
80 * Command line configuration.
81 */
82#include <config_cmd_default.h>
83#undef CONFIG_CMD_FPGA
84#undef CONFIG_CMD_IMI
85#undef CONFIG_CMD_IMLS
86#undef CONFIG_CMD_LOADS
87
88#define CONFIG_CMD_PING
89#define CONFIG_CMD_DHCP
90#define CONFIG_CMD_NAND
Bo Shen4a73e582012-08-19 20:32:24 +000091#define CONFIG_CMD_SF
Bo Shen42aafb32012-07-05 17:21:46 +000092
93/* SDRAM */
94#define CONFIG_NR_DRAM_BANKS 1
95#define CONFIG_SYS_SDRAM_BASE 0x20000000
96#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
97
98#define CONFIG_SYS_INIT_SP_ADDR \
99 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
100
101/* DataFlash */
Bo Shen4a73e582012-08-19 20:32:24 +0000102#ifdef CONFIG_CMD_SF
103#define CONFIG_ATMEL_SPI
Bo Shen42aafb32012-07-05 17:21:46 +0000104#define CONFIG_SPI_FLASH
105#define CONFIG_SPI_FLASH_ATMEL
Bo Shen4a73e582012-08-19 20:32:24 +0000106#define CONFIG_SF_DEFAULT_SPEED 30000000
Bo Shen42aafb32012-07-05 17:21:46 +0000107#endif
108
109/* no NOR flash */
110#define CONFIG_SYS_NO_FLASH
111
112/* NAND flash */
113#ifdef CONFIG_CMD_NAND
114#define CONFIG_NAND_ATMEL
115#define CONFIG_SYS_MAX_NAND_DEVICE 1
116#define CONFIG_SYS_NAND_BASE 0x40000000
117#define CONFIG_SYS_NAND_DBW_8 1
118/* our ALE is AD21 */
119#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
120/* our CLE is AD22 */
121#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
122#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
123#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
124
Wu, Joshdd359a12012-08-23 00:05:38 +0000125/* PMECC & PMERRLOC */
126#define CONFIG_ATMEL_NAND_HWECC 1
127#define CONFIG_ATMEL_NAND_HW_PMECC 1
128#define CONFIG_PMECC_CAP 2
129#define CONFIG_PMECC_SECTOR_SIZE 512
130#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
131
Bo Shen42aafb32012-07-05 17:21:46 +0000132#define CONFIG_MTD_DEVICE
133#define CONFIG_CMD_MTDPARTS
134#define CONFIG_MTD_PARTITIONS
135#define CONFIG_RBTREE
136#define CONFIG_LZO
137#define CONFIG_CMD_UBI
138#define CONFIG_CMD_UBIFS
139#endif
140
141/* Ethernet */
142#define CONFIG_MACB
143#define CONFIG_RMII
144#define CONFIG_NET_RETRY_COUNT 20
145#define CONFIG_MACB_SEARCH_PHY
146
147#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
148
149#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
150#define CONFIG_SYS_MEMTEST_END 0x26e00000
151
152#ifdef CONFIG_SYS_USE_NANDFLASH
153/* bootstrap + u-boot + env + linux in nandflash */
154#define CONFIG_ENV_IS_IN_NAND
155#define CONFIG_ENV_OFFSET 0xc0000
156#define CONFIG_ENV_OFFSET_REDUND 0x100000
157#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
158#define CONFIG_BOOTCOMMAND "nand read " \
159 "0x22000000 0x200000 0x300000; " \
160 "bootm 0x22000000"
Bo Shen4a73e582012-08-19 20:32:24 +0000161#else
162#ifdef CONFIG_SYS_USE_SPIFLASH
163/* bootstrap + u-boot + env + linux in spi flash */
164#define CONFIG_ENV_IS_IN_SPI_FLASH
165#define CONFIG_ENV_OFFSET 0x5000
166#define CONFIG_ENV_SIZE 0x3000
167#define CONFIG_ENV_SECT_SIZE 0x1000
168#define CONFIG_ENV_SPI_MAX_HZ 30000000
169#define CONFIG_BOOTCOMMAND "sf probe 0; " \
170 "sf read 0x22000000 0x100000 0x300000; " \
171 "bootm 0x22000000"
172#endif
Bo Shen42aafb32012-07-05 17:21:46 +0000173#endif
174
175#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
176 "mtdparts=atmel_nand:" \
177 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
178 "root=/dev/mtdblock1 rw " \
179 "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
180
181#define CONFIG_BAUDRATE 115200
182
183#define CONFIG_SYS_PROMPT "U-Boot> "
184#define CONFIG_SYS_CBSIZE 256
185#define CONFIG_SYS_MAXARGS 16
186#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
187 + 16)
188#define CONFIG_SYS_LONGHELP
189#define CONFIG_CMDLINE_EDITING
190#define CONFIG_AUTO_COMPLETE
191#define CONFIG_SYS_HUSH_PARSER
192
193/*
194 * Size of malloc() pool
195 */
196#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
197
198#ifdef CONFIG_USE_IRQ
199#error CONFIG_USE_IRQ not supported
200#endif
201
202#endif