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Bo Shen42aafb32012-07-05 17:21:46 +00001/*
2 * Copyright (C) 2012 Atmel Corporation
3 *
4 * Configuation settings for the AT91SAM9X5EK board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H__
26#define __CONFIG_H__
27
28#include <asm/hardware.h>
29
30/* ARM asynchronous clock */
31#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
32#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
33#define CONFIG_SYS_HZ 1000
34
35#define CONFIG_AT91SAM9X5EK
36#define CONFIG_AT91FAMILY
37
Bo Shen42aafb32012-07-05 17:21:46 +000038#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
41#define CONFIG_SKIP_LOWLEVEL_INIT
42#define CONFIG_BOARD_EARLY_INIT_F
43#define CONFIG_DISPLAY_CPUINFO
44
45/* general purpose I/O */
46#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
47#define CONFIG_AT91_GPIO
48
49/* serial console */
50#define CONFIG_ATMEL_USART
51#define CONFIG_USART_BASE ATMEL_BASE_DBGU
52#define CONFIG_USART_ID ATMEL_ID_SYS
53
54/* LCD */
55#define CONFIG_LCD
56#define LCD_BPP LCD_COLOR16
57#define LCD_OUTPUT_BPP 24
58#define CONFIG_LCD_LOGO
59#undef LCD_TEST_PATTERN
60#define CONFIG_LCD_INFO
61#define CONFIG_LCD_INFO_BELOW_LOGO
62#define CONFIG_SYS_WHITE_ON_BLACK
63#define CONFIG_ATMEL_HLCD
64#define CONFIG_ATMEL_LCD_RGB565
65#define CONFIG_SYS_CONSOLE_IS_IN_ENV
66
67#define CONFIG_BOOTDELAY 3
68
69/*
70 * BOOTP options
71 */
72#define CONFIG_BOOTP_BOOTFILESIZE
73#define CONFIG_BOOTP_BOOTPATH
74#define CONFIG_BOOTP_GATEWAY
75#define CONFIG_BOOTP_HOSTNAME
76
77/*
78 * Command line configuration.
79 */
80#include <config_cmd_default.h>
81#undef CONFIG_CMD_FPGA
82#undef CONFIG_CMD_IMI
83#undef CONFIG_CMD_IMLS
84#undef CONFIG_CMD_LOADS
85
86#define CONFIG_CMD_PING
87#define CONFIG_CMD_DHCP
88#define CONFIG_CMD_NAND
Bo Shen4a73e582012-08-19 20:32:24 +000089#define CONFIG_CMD_SF
Bo Shen42aafb32012-07-05 17:21:46 +000090
91/* SDRAM */
92#define CONFIG_NR_DRAM_BANKS 1
93#define CONFIG_SYS_SDRAM_BASE 0x20000000
94#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
95
96#define CONFIG_SYS_INIT_SP_ADDR \
97 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
98
99/* DataFlash */
Bo Shen4a73e582012-08-19 20:32:24 +0000100#ifdef CONFIG_CMD_SF
101#define CONFIG_ATMEL_SPI
Bo Shen42aafb32012-07-05 17:21:46 +0000102#define CONFIG_SPI_FLASH
103#define CONFIG_SPI_FLASH_ATMEL
Bo Shen4a73e582012-08-19 20:32:24 +0000104#define CONFIG_SF_DEFAULT_SPEED 30000000
Bo Shen42aafb32012-07-05 17:21:46 +0000105#endif
106
107/* no NOR flash */
108#define CONFIG_SYS_NO_FLASH
109
110/* NAND flash */
111#ifdef CONFIG_CMD_NAND
112#define CONFIG_NAND_ATMEL
113#define CONFIG_SYS_MAX_NAND_DEVICE 1
114#define CONFIG_SYS_NAND_BASE 0x40000000
115#define CONFIG_SYS_NAND_DBW_8 1
116/* our ALE is AD21 */
117#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
118/* our CLE is AD22 */
119#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
120#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
121#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
122
123#define CONFIG_MTD_DEVICE
124#define CONFIG_CMD_MTDPARTS
125#define CONFIG_MTD_PARTITIONS
126#define CONFIG_RBTREE
127#define CONFIG_LZO
128#define CONFIG_CMD_UBI
129#define CONFIG_CMD_UBIFS
130#endif
131
132/* Ethernet */
133#define CONFIG_MACB
134#define CONFIG_RMII
135#define CONFIG_NET_RETRY_COUNT 20
136#define CONFIG_MACB_SEARCH_PHY
137
138#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
139
140#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
141#define CONFIG_SYS_MEMTEST_END 0x26e00000
142
143#ifdef CONFIG_SYS_USE_NANDFLASH
144/* bootstrap + u-boot + env + linux in nandflash */
145#define CONFIG_ENV_IS_IN_NAND
146#define CONFIG_ENV_OFFSET 0xc0000
147#define CONFIG_ENV_OFFSET_REDUND 0x100000
148#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
149#define CONFIG_BOOTCOMMAND "nand read " \
150 "0x22000000 0x200000 0x300000; " \
151 "bootm 0x22000000"
Bo Shen4a73e582012-08-19 20:32:24 +0000152#else
153#ifdef CONFIG_SYS_USE_SPIFLASH
154/* bootstrap + u-boot + env + linux in spi flash */
155#define CONFIG_ENV_IS_IN_SPI_FLASH
156#define CONFIG_ENV_OFFSET 0x5000
157#define CONFIG_ENV_SIZE 0x3000
158#define CONFIG_ENV_SECT_SIZE 0x1000
159#define CONFIG_ENV_SPI_MAX_HZ 30000000
160#define CONFIG_BOOTCOMMAND "sf probe 0; " \
161 "sf read 0x22000000 0x100000 0x300000; " \
162 "bootm 0x22000000"
163#endif
Bo Shen42aafb32012-07-05 17:21:46 +0000164#endif
165
166#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
167 "mtdparts=atmel_nand:" \
168 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
169 "root=/dev/mtdblock1 rw " \
170 "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
171
172#define CONFIG_BAUDRATE 115200
173
174#define CONFIG_SYS_PROMPT "U-Boot> "
175#define CONFIG_SYS_CBSIZE 256
176#define CONFIG_SYS_MAXARGS 16
177#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
178 + 16)
179#define CONFIG_SYS_LONGHELP
180#define CONFIG_CMDLINE_EDITING
181#define CONFIG_AUTO_COMPLETE
182#define CONFIG_SYS_HUSH_PARSER
183
184/*
185 * Size of malloc() pool
186 */
187#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
188
189#ifdef CONFIG_USE_IRQ
190#error CONFIG_USE_IRQ not supported
191#endif
192
193#endif