wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
Graeme Russ | 45fc1d8 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 2 | * (C) Copyright 2008-2011 |
| 3 | * Graeme Russ, <graeme.russ@gmail.com> |
| 4 | * |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 5 | * (C) Copyright 2002 |
Albert ARIBAUD | 60fbc8d | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 6 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 27 | #include <common.h> |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 28 | #include <asm/io.h> |
Graeme Russ | 93efcb2 | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 29 | #include <asm/processor-flags.h> |
Graeme Russ | 0d992d0 | 2011-08-04 22:05:09 +1000 | [diff] [blame] | 30 | #include <asm/arch/sc520.h> |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 31 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 32 | DECLARE_GLOBAL_DATA_PTR; |
| 33 | |
Graeme Russ | b112bca | 2011-02-12 15:11:36 +1100 | [diff] [blame] | 34 | sc520_mmcr_t *sc520_mmcr = (sc520_mmcr_t *)SC520_MMCR_BASE; |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 35 | |
Graeme Russ | 121931c | 2011-02-12 15:11:35 +1100 | [diff] [blame] | 36 | int cpu_init_f(void) |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 37 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | if (CONFIG_SYS_SC520_HIGH_SPEED) { |
Graeme Russ | 3e6ec38 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 39 | /* set it to 133 MHz and write back */ |
| 40 | writeb(0x02, &sc520_mmcr->cpuctl); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 41 | gd->cpu_clk = 133000000; |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 42 | } else { |
Graeme Russ | 3e6ec38 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 43 | /* set it to 100 MHz and write back */ |
| 44 | writeb(0x01, &sc520_mmcr->cpuctl); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 45 | gd->cpu_clk = 100000000; |
| 46 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 47 | |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 48 | /* wait at least one millisecond */ |
Graeme Russ | 3e6ec38 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 49 | asm("movl $0x2000, %%ecx\n" |
Graeme Russ | de7f938 | 2009-08-23 12:59:46 +1000 | [diff] [blame] | 50 | "0: pushl %%ecx\n" |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 51 | "popl %%ecx\n" |
Graeme Russ | 55bed24 | 2011-11-08 02:33:14 +0000 | [diff] [blame] | 52 | "loop 0b\n" : : : "ecx"); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 53 | |
Graeme Russ | 121931c | 2011-02-12 15:11:35 +1100 | [diff] [blame] | 54 | return x86_cpu_init_f(); |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 55 | } |
| 56 | |
Graeme Russ | 151713d | 2011-02-12 15:12:12 +1100 | [diff] [blame] | 57 | int cpu_init_r(void) |
| 58 | { |
| 59 | /* Disable the PAR used for CAR */ |
| 60 | writel(0x0000000, &sc520_mmcr->par[2]); |
| 61 | |
| 62 | /* turn on the SDRAM write buffer */ |
| 63 | writeb(0x11, &sc520_mmcr->dbctl); |
| 64 | |
| 65 | return x86_cpu_init_r(); |
| 66 | } |