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TsiChungLiew99b037a2008-01-14 17:43:33 -06001/*
2 * Configuation settings for the Freescale MCF52277 EVB board.
3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26/*
27 * board/config.h - configuration options, board specific
28 */
29
30#ifndef _M52277EVB_H
31#define _M52277EVB_H
32
33/*
34 * High Level Configuration Options
35 * (easy to change)
36 */
37#define CONFIG_MCF5227x /* define processor family */
38#define CONFIG_M52277 /* define processor type */
39#define CONFIG_M52277EVB /* M52277EVB board */
40
TsiChungLiew99b037a2008-01-14 17:43:33 -060041#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020042#define CONFIG_SYS_UART_PORT (0)
TsiChung Liew39966e32008-10-21 15:37:02 +000043#define CONFIG_BAUDRATE 115200
TsiChungLiew99b037a2008-01-14 17:43:33 -060044
45#undef CONFIG_WATCHDOG
46
47#define CONFIG_TIMESTAMP /* Print image info with timestamp */
48
49/*
50 * BOOTP options
51 */
52#define CONFIG_BOOTP_BOOTFILESIZE
53#define CONFIG_BOOTP_BOOTPATH
54#define CONFIG_BOOTP_GATEWAY
55#define CONFIG_BOOTP_HOSTNAME
56
57/* Command line configuration */
58#include <config_cmd_default.h>
59
60#define CONFIG_CMD_CACHE
61#define CONFIG_CMD_DATE
62#define CONFIG_CMD_ELF
63#define CONFIG_CMD_FLASH
64#define CONFIG_CMD_I2C
65#define CONFIG_CMD_JFFS2
66#define CONFIG_CMD_LOADB
67#define CONFIG_CMD_LOADS
68#define CONFIG_CMD_MEMORY
69#define CONFIG_CMD_MISC
70#undef CONFIG_CMD_NET
Jason Jin47e71002011-08-19 10:09:57 +080071#undef CONFIG_CMD_NFS
TsiChungLiew99b037a2008-01-14 17:43:33 -060072#define CONFIG_CMD_REGINFO
73#undef CONFIG_CMD_USB
74#undef CONFIG_CMD_BMP
TsiChung Liew39966e32008-10-21 15:37:02 +000075#define CONFIG_CMD_SPI
76#define CONFIG_CMD_SF
TsiChungLiew99b037a2008-01-14 17:43:33 -060077
TsiChung Liew39966e32008-10-21 15:37:02 +000078#define CONFIG_HOSTNAME M52277EVB
79#define CONFIG_SYS_UBOOT_END 0x3FFFF
80#define CONFIG_SYS_LOAD_ADDR2 0x40010007
81#ifdef CONFIG_SYS_STMICRO_BOOT
82/* ST Micro serial flash */
TsiChungLiew99b037a2008-01-14 17:43:33 -060083#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut0b3176c2012-09-23 17:41:24 +020084 "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000085 "loadaddr=0x40010000\0" \
86 "uboot=u-boot.bin\0" \
87 "load=loadb ${loadaddr} ${baudrate};" \
Marek Vasut0b3176c2012-09-23 17:41:24 +020088 "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
TsiChungLiew99b037a2008-01-14 17:43:33 -060089 "upd=run load; run prog\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000090 "prog=sf probe 0:2 10000 1;" \
91 "sf erase 0 30000;" \
92 "sf write ${loadaddr} 0 30000;" \
TsiChungLiew99b037a2008-01-14 17:43:33 -060093 "save\0" \
94 ""
TsiChung Liew39966e32008-10-21 15:37:02 +000095#endif
96#ifdef CONFIG_SYS_SPANSION_BOOT
97#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut0b3176c2012-09-23 17:41:24 +020098 "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000099 "loadaddr=0x40010000\0" \
100 "uboot=u-boot.bin\0" \
101 "load=loadb ${loadaddr} ${baudrate}\0" \
102 "upd=run load; run prog\0" \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200103 "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE) \
104 " " __stringify(CONFIG_SYS_UBOOT_END) ";" \
105 "era " __stringify(CONFIG_SYS_FLASH_BASE) " " \
106 __stringify(CONFIG_SYS_UBOOT_END) ";" \
107 "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE) \
TsiChung Liew39966e32008-10-21 15:37:02 +0000108 " ${filesize}; save\0" \
109 "updsbf=run loadsbf; run progsbf\0" \
110 "loadsbf=loadb ${loadaddr} ${baudrate};" \
Marek Vasut0b3176c2012-09-23 17:41:24 +0200111 "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
TsiChung Liew39966e32008-10-21 15:37:02 +0000112 "progsbf=sf probe 0:2 10000 1;" \
113 "sf erase 0 30000;" \
114 "sf write ${loadaddr} 0 30000;" \
115 ""
116#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600117
TsiChung Liew39966e32008-10-21 15:37:02 +0000118#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600119/* LCD */
120#ifdef CONFIG_CMD_BMP
121#define CONFIG_LCD
122#define CONFIG_SPLASH_SCREEN
123#define CONFIG_LCD_LOGO
124#define CONFIG_SHARP_LQ035Q7DH06
125#endif
126
127/* USB */
128#ifdef CONFIG_CMD_USB
129#define CONFIG_USB_EHCI
130#define CONFIG_USB_STORAGE
131#define CONFIG_DOS_PARTITION
132#define CONFIG_MAC_PARTITION
133#define CONFIG_ISO_PARTITION
TsiChung Liew39966e32008-10-21 15:37:02 +0000134#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135#define CONFIG_SYS_USB_EHCI_CPU_INIT
TsiChungLiew99b037a2008-01-14 17:43:33 -0600136#endif
137
138/* Realtime clock */
139#define CONFIG_MCFRTC
140#undef RTC_DEBUG
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600142
143/* Timer */
144#define CONFIG_MCFTMR
145#undef CONFIG_MCFPIT
146
147/* I2c */
148#define CONFIG_FSL_I2C
149#define CONFIG_HARD_I2C /* I2C with hardware support */
150#undef CONFIG_SOFT_I2C /* I2C bit-banged */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200151#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
152#define CONFIG_SYS_I2C_SLAVE 0x7F
153#define CONFIG_SYS_I2C_OFFSET 0x58000
TsiChung Liew39966e32008-10-21 15:37:02 +0000154#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
155
156/* DSPI and Serial Flash */
TsiChung Liewa424ba22009-06-30 14:18:29 +0000157#define CONFIG_CF_SPI
TsiChung Liew39966e32008-10-21 15:37:02 +0000158#define CONFIG_CF_DSPI
159#define CONFIG_HARD_SPI
TsiChung Liew39966e32008-10-21 15:37:02 +0000160#define CONFIG_SYS_SBFHDR_SIZE 0x7
161#ifdef CONFIG_CMD_SPI
162# define CONFIG_SYS_DSPI_CS2
163# define CONFIG_SPI_FLASH
164# define CONFIG_SPI_FLASH_STMICRO
165
TsiChung Liewa424ba22009-06-30 14:18:29 +0000166# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
167 DSPI_CTAR_PCSSCK_1CLK | \
168 DSPI_CTAR_PASC(0) | \
169 DSPI_CTAR_PDT(0) | \
170 DSPI_CTAR_CSSCK(0) | \
171 DSPI_CTAR_ASC(0) | \
172 DSPI_CTAR_DT(1))
TsiChung Liew39966e32008-10-21 15:37:02 +0000173#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600174
175/* Input, PCI, Flexbus, and VCO */
176#define CONFIG_EXTRA_CLOCK
177
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_INPUT_CLKSRC 16000000
TsiChungLiew99b037a2008-01-14 17:43:33 -0600179
TsiChung Liew39966e32008-10-21 15:37:02 +0000180#define CONFIG_PRAM 2048 /* 2048 KB */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600181
TsiChung Liew39966e32008-10-21 15:37:02 +0000182#define CONFIG_SYS_PROMPT "-> "
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200183#define CONFIG_SYS_LONGHELP /* undef to save memory */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600184
185#if defined(CONFIG_CMD_KGDB)
TsiChung Liew39966e32008-10-21 15:37:02 +0000186#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600187#else
TsiChung Liew39966e32008-10-21 15:37:02 +0000188#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600189#endif
TsiChung Liew39966e32008-10-21 15:37:02 +0000190#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
191#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
192#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600193
TsiChung Liew39966e32008-10-21 15:37:02 +0000194#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600195
TsiChung Liew39966e32008-10-21 15:37:02 +0000196#define CONFIG_SYS_HZ 1000
TsiChungLiew99b037a2008-01-14 17:43:33 -0600197
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200198#define CONFIG_SYS_MBAR 0xFC000000
TsiChungLiew99b037a2008-01-14 17:43:33 -0600199
200/*
201 * Low Level Configuration Settings
202 * (address mappings, register initial values, etc.)
203 * You should know what you are doing if you make changes here.
204 */
205
TsiChung Liew39966e32008-10-21 15:37:02 +0000206/*
TsiChungLiew99b037a2008-01-14 17:43:33 -0600207 * Definitions for initial stack pointer and data area (in DPRAM)
208 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200210#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
TsiChung Liew39966e32008-10-21 15:37:02 +0000211#define CONFIG_SYS_INIT_RAM_CTRL 0x221
Wolfgang Denk0191e472010-10-26 14:34:52 +0200212#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
TsiChung Liew39966e32008-10-21 15:37:02 +0000213#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200214#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600215
TsiChung Liew39966e32008-10-21 15:37:02 +0000216/*
TsiChungLiew99b037a2008-01-14 17:43:33 -0600217 * Start addresses for the final memory configuration
218 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
TsiChungLiew99b037a2008-01-14 17:43:33 -0600220 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_SDRAM_BASE 0x40000000
222#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
223#define CONFIG_SYS_SDRAM_CFG1 0x43711630
224#define CONFIG_SYS_SDRAM_CFG2 0x56670000
225#define CONFIG_SYS_SDRAM_CTRL 0xE1092000
226#define CONFIG_SYS_SDRAM_EMOD 0x81810000
227#define CONFIG_SYS_SDRAM_MODE 0x00CD0000
TsiChung Liew39966e32008-10-21 15:37:02 +0000228#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
TsiChungLiew99b037a2008-01-14 17:43:33 -0600229
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
231#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600232
TsiChung Liew39966e32008-10-21 15:37:02 +0000233#ifdef CONFIG_CF_SBF
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200234# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
TsiChung Liew39966e32008-10-21 15:37:02 +0000235#else
236# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
237#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200238#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
239#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
240#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600241
242/* Initial Memory map for Linux */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
TsiChung Liew25a00632009-01-27 12:57:47 +0000244#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600245
TsiChung Liew39966e32008-10-21 15:37:02 +0000246/*
247 * Configuration for environment
Jason Jin319ac6d2011-10-27 15:44:52 +0800248 * Environment is not embedded in u-boot. First time runing may have env
249 * crc error warning if there is no correct environment on the flash.
TsiChungLiew99b037a2008-01-14 17:43:33 -0600250 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000251#ifdef CONFIG_CF_SBF
252# define CONFIG_ENV_IS_IN_SPI_FLASH
253# define CONFIG_ENV_SPI_CS 2
254#else
255# define CONFIG_ENV_IS_IN_FLASH 1
256#endif
257#define CONFIG_ENV_OVERWRITE 1
TsiChungLiew99b037a2008-01-14 17:43:33 -0600258
259/*-----------------------------------------------------------------------
260 * FLASH organization
261 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000262#ifdef CONFIG_SYS_STMICRO_BOOT
TsiChung Liewa424ba22009-06-30 14:18:29 +0000263# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Jason Jin319ac6d2011-10-27 15:44:52 +0800264# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
TsiChung Liew39966e32008-10-21 15:37:02 +0000265# define CONFIG_ENV_OFFSET 0x30000
266# define CONFIG_ENV_SIZE 0x1000
267# define CONFIG_ENV_SECT_SIZE 0x10000
268#endif
269#ifdef CONFIG_SYS_SPANSION_BOOT
270# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
271# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
Jason Jin319ac6d2011-10-27 15:44:52 +0800272# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
TsiChung Liew39966e32008-10-21 15:37:02 +0000273# define CONFIG_ENV_SIZE 0x1000
274# define CONFIG_ENV_SECT_SIZE 0x8000
275#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600276
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200277#define CONFIG_SYS_FLASH_CFI
278#ifdef CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200279# define CONFIG_FLASH_CFI_DRIVER 1
TsiChung Liewb7d482b2009-06-11 12:50:05 +0000280# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
281# define CONFIG_FLASH_SPANSION_S29WS_N 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200282# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
283# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
284# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
285# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
286# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
287# define CONFIG_SYS_FLASH_CHECKSUM
TsiChung Liew39966e32008-10-21 15:37:02 +0000288# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
TsiChungLiew99b037a2008-01-14 17:43:33 -0600289#endif
290
291/*
292 * This is setting for JFFS2 support in u-boot.
293 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
294 */
295#ifdef CONFIG_CMD_JFFS2
296# define CONFIG_JFFS2_DEV "nor0"
297# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200298# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600299#endif
300
301/*-----------------------------------------------------------------------
302 * Cache Configuration
303 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000304#define CONFIG_SYS_CACHELINE_SIZE 16
TsiChungLiew99b037a2008-01-14 17:43:33 -0600305
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600306#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200307 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600308#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200309 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600310#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
311#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
312 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
313 CF_ACR_EN | CF_ACR_SM_ALL)
314#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
315 CF_CACR_DISD | CF_CACR_INVI | \
316 CF_CACR_CEIB | CF_CACR_DCM | \
317 CF_CACR_EUSP)
318
TsiChungLiew99b037a2008-01-14 17:43:33 -0600319/*-----------------------------------------------------------------------
320 * Memory bank definitions
321 */
322/*
323 * CS0 - NOR Flash
324 * CS1 - Available
325 * CS2 - Available
326 * CS3 - Available
327 * CS4 - Available
328 * CS5 - Available
329 */
330
TsiChung Liew39966e32008-10-21 15:37:02 +0000331#ifdef CONFIG_CF_SBF
332#define CONFIG_SYS_CS0_BASE 0x04000000
333#define CONFIG_SYS_CS0_MASK 0x00FF0001
334#define CONFIG_SYS_CS0_CTRL 0x00001FA0
335#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200336#define CONFIG_SYS_CS0_BASE 0x00000000
337#define CONFIG_SYS_CS0_MASK 0x00FF0001
338#define CONFIG_SYS_CS0_CTRL 0x00001FA0
TsiChung Liew39966e32008-10-21 15:37:02 +0000339#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600340
341#endif /* _M52277EVB_H */