blob: 5951835d6e855eb3ecbe6a03cb15d064853a037f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Masahiro Yamada847e618b82015-09-11 20:17:32 +09002/*
Masahiro Yamadafa1f73f2016-07-19 21:56:13 +09003 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada847e618b82015-09-11 20:17:32 +09005 */
6
7#ifndef __PINCTRL_UNIPHIER_H__
8#define __PINCTRL_UNIPHIER_H__
9
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090010#include <linux/bitops.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060011#include <linux/bug.h>
Masahiro Yamada17ca7f22018-05-05 19:53:53 +090012#include <linux/build_bug.h>
Masahiro Yamada847e618b82015-09-11 20:17:32 +090013#include <linux/kernel.h>
14#include <linux/types.h>
15
Masahiro Yamadae5299ed2018-05-05 19:53:55 +090016/* drive strength control register number */
17#define UNIPHIER_PIN_DRVCTRL_SHIFT 0
18#define UNIPHIER_PIN_DRVCTRL_BITS 9
19#define UNIPHIER_PIN_DRVCTRL_MASK ((1U << (UNIPHIER_PIN_DRVCTRL_BITS)) \
20 - 1)
Masahiro Yamada847e618b82015-09-11 20:17:32 +090021
Masahiro Yamadae5299ed2018-05-05 19:53:55 +090022/* drive control type */
23#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
24 (UNIPHIER_PIN_DRVCTRL_BITS))
25#define UNIPHIER_PIN_DRV_TYPE_BITS 2
26#define UNIPHIER_PIN_DRV_TYPE_MASK ((1U << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
27 - 1)
28
29/* drive control type */
30enum uniphier_pin_drv_type {
31 UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
32 UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
33 UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
34};
35
36#define UNIPHIER_PIN_DRVCTRL(x) \
37 (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
38#define UNIPHIER_PIN_DRV_TYPE(x) \
39 (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
40
41#define UNIPHIER_PIN_ATTR_PACKED(drvctrl, drv_type) \
42 UNIPHIER_PIN_DRVCTRL(drvctrl) | \
43 UNIPHIER_PIN_DRV_TYPE(drv_type)
44
45static inline unsigned int uniphier_pin_get_drvctrl(unsigned int data)
46{
47 return (data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & UNIPHIER_PIN_DRVCTRL_MASK;
48}
49
50static inline unsigned int uniphier_pin_get_drv_type(unsigned int data)
Masahiro Yamada847e618b82015-09-11 20:17:32 +090051{
Masahiro Yamadae5299ed2018-05-05 19:53:55 +090052 return (data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
53 UNIPHIER_PIN_DRV_TYPE_MASK;
Masahiro Yamada847e618b82015-09-11 20:17:32 +090054}
55
56/**
57 * struct uniphier_pinctrl_pin - pin data for UniPhier SoC
58 *
59 * @number: pin number
60 * @data: additional per-pin data
61 */
62struct uniphier_pinctrl_pin {
63 unsigned number;
Masahiro Yamada914b5712018-05-05 19:53:54 +090064 const char *name;
65 unsigned int data;
Masahiro Yamada847e618b82015-09-11 20:17:32 +090066};
67
68/**
69 * struct uniphier_pinctrl_group - pin group data for UniPhier SoC
70 *
71 * @name: pin group name
72 * @pins: array of pins that belong to the group
73 * @num_pins: number of pins in the group
74 * @muxvals: array of values to be set to pinmux registers
75 */
76struct uniphier_pinctrl_group {
77 const char *name;
78 const unsigned *pins;
79 unsigned num_pins;
Masahiro Yamada9447e132016-06-29 19:38:59 +090080 const int *muxvals;
Masahiro Yamada847e618b82015-09-11 20:17:32 +090081};
82
83/**
84 * struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
85 *
86 * @pins: array of pin data
87 * @pins_count: number of pin data
88 * @groups: array of pin group data
89 * @groups_count: number of pin group data
90 * @functions: array of pinmux function names
91 * @functions_count: number of pinmux functions
92 * @mux_bits: bit width of each pinmux register
93 * @reg_stride: stride of pinmux register address
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090094 * @caps: SoC-specific capability flag
Masahiro Yamada847e618b82015-09-11 20:17:32 +090095 */
96struct uniphier_pinctrl_socdata {
97 const struct uniphier_pinctrl_pin *pins;
98 int pins_count;
99 const struct uniphier_pinctrl_group *groups;
100 int groups_count;
101 const char * const *functions;
102 int functions_count;
Masahiro Yamada7a629ef2016-03-24 22:32:44 +0900103 unsigned caps;
Masahiro Yamada140e9f12017-02-12 18:21:15 +0900104#define UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE BIT(3)
Masahiro Yamadac3380ed2016-09-17 03:32:58 +0900105#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2)
106#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1)
107#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900108};
109
Masahiro Yamadae5299ed2018-05-05 19:53:55 +0900110#define UNIPHIER_PINCTRL_PIN(a, b, c, d) \
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900111{ \
112 .number = a, \
Masahiro Yamadae5299ed2018-05-05 19:53:55 +0900113 .name = b, \
114 .data = UNIPHIER_PIN_ATTR_PACKED(c, d), \
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900115}
116
Masahiro Yamada65ef4f72016-06-29 19:39:00 +0900117#define __UNIPHIER_PINCTRL_GROUP(grp) \
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900118 { \
119 .name = #grp, \
120 .pins = grp##_pins, \
121 .num_pins = ARRAY_SIZE(grp##_pins), \
122 .muxvals = grp##_muxvals + \
123 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
124 ARRAY_SIZE(grp##_muxvals)), \
125 }
126
Masahiro Yamada65ef4f72016-06-29 19:39:00 +0900127#define __UNIPHIER_PINMUX_FUNCTION(func) #func
128
129#ifdef CONFIG_SPL_BUILD
Masahiro Yamada945c4702016-10-09 23:52:57 +0900130 /*
131 * a tricky way to drop unneeded *_pins and *_muxvals arrays from SPL,
132 * suppressing "defined but not used" warnings.
133 */
134#define UNIPHIER_PINCTRL_GROUP(grp) \
135 { .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
Masahiro Yamada65ef4f72016-06-29 19:39:00 +0900136#define UNIPHIER_PINMUX_FUNCTION(func) NULL
137#else
138#define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp)
139#define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func)
140#endif
141
142#define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp)
143#define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func)
144
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900145/**
146 * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
147 *
148 * @base: base address of the pinctrl device
149 * @socdata: SoC specific data
150 */
151struct uniphier_pinctrl_priv {
152 void __iomem *base;
153 struct uniphier_pinctrl_socdata *socdata;
154};
155
156extern const struct pinctrl_ops uniphier_pinctrl_ops;
157
158int uniphier_pinctrl_probe(struct udevice *dev,
159 struct uniphier_pinctrl_socdata *socdata);
160
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900161#endif /* __PINCTRL_UNIPHIER_H__ */