blob: ff0a368b119a7f833d545f68bd8dac292b627939 [file] [log] [blame]
Masahiro Yamada847e618b82015-09-11 20:17:32 +09001/*
2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __PINCTRL_UNIPHIER_H__
8#define __PINCTRL_UNIPHIER_H__
9
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090010#include <linux/bitops.h>
Masahiro Yamada78eeb912016-01-24 23:27:48 +090011#include <linux/bug.h>
Masahiro Yamada847e618b82015-09-11 20:17:32 +090012#include <linux/kernel.h>
13#include <linux/types.h>
14
Masahiro Yamada13d8ac32016-06-29 19:38:57 +090015#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
16#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
17#define UNIPHIER_PINCTRL_IECTRL 0x1d00
Masahiro Yamada847e618b82015-09-11 20:17:32 +090018
19#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl)
20
21static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
22{
23 return data;
24}
25
26/**
27 * struct uniphier_pinctrl_pin - pin data for UniPhier SoC
28 *
29 * @number: pin number
30 * @data: additional per-pin data
31 */
32struct uniphier_pinctrl_pin {
33 unsigned number;
34 unsigned long data;
35};
36
37/**
38 * struct uniphier_pinctrl_group - pin group data for UniPhier SoC
39 *
40 * @name: pin group name
41 * @pins: array of pins that belong to the group
42 * @num_pins: number of pins in the group
43 * @muxvals: array of values to be set to pinmux registers
44 */
45struct uniphier_pinctrl_group {
46 const char *name;
47 const unsigned *pins;
48 unsigned num_pins;
Masahiro Yamada9447e132016-06-29 19:38:59 +090049 const int *muxvals;
Masahiro Yamada847e618b82015-09-11 20:17:32 +090050};
51
52/**
53 * struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller
54 *
55 * @pins: array of pin data
56 * @pins_count: number of pin data
57 * @groups: array of pin group data
58 * @groups_count: number of pin group data
59 * @functions: array of pinmux function names
60 * @functions_count: number of pinmux functions
61 * @mux_bits: bit width of each pinmux register
62 * @reg_stride: stride of pinmux register address
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090063 * @caps: SoC-specific capability flag
Masahiro Yamada847e618b82015-09-11 20:17:32 +090064 */
65struct uniphier_pinctrl_socdata {
66 const struct uniphier_pinctrl_pin *pins;
67 int pins_count;
68 const struct uniphier_pinctrl_group *groups;
69 int groups_count;
70 const char * const *functions;
71 int functions_count;
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090072 unsigned caps;
Masahiro Yamada73e67752016-03-24 22:32:45 +090073#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
Masahiro Yamada7a629ef2016-03-24 22:32:44 +090074#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
Masahiro Yamada847e618b82015-09-11 20:17:32 +090075};
76
77#define UNIPHIER_PINCTRL_PIN(a, b) \
78{ \
79 .number = a, \
80 .data = UNIPHIER_PIN_ATTR_PACKED(b), \
81}
82
83#define UNIPHIER_PINCTRL_GROUP(grp) \
84 { \
85 .name = #grp, \
86 .pins = grp##_pins, \
87 .num_pins = ARRAY_SIZE(grp##_pins), \
88 .muxvals = grp##_muxvals + \
89 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
90 ARRAY_SIZE(grp##_muxvals)), \
91 }
92
93/**
94 * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
95 *
96 * @base: base address of the pinctrl device
97 * @socdata: SoC specific data
98 */
99struct uniphier_pinctrl_priv {
100 void __iomem *base;
101 struct uniphier_pinctrl_socdata *socdata;
102};
103
104extern const struct pinctrl_ops uniphier_pinctrl_ops;
105
106int uniphier_pinctrl_probe(struct udevice *dev,
107 struct uniphier_pinctrl_socdata *socdata);
108
109int uniphier_pinctrl_remove(struct udevice *dev);
110
111#endif /* __PINCTRL_UNIPHIER_H__ */