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git01.mediatek.com / filogic / uboot / 983487fb16ed54287cdb70e789b80965d23e1fd8 / . / test / dm / test.dts
blob: 008584865c0592705f8c318fdece12ce6adf1280 [file] [log] [blame]
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]1/dts-v1/;
2
3/ {
4 model = "sandbox";
5 compatible = "sandbox";
6 #address-cells = <1>;
7 #size-cells = <0>;
8
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]9 aliases {
10 console = &uart0;
Simon Glass6b0fb742015-04-20 12:37:30 -0600[diff] [blame]11 eth0 = "/eth@10002000";
12 eth5 = &eth_5;
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]13 i2c0 = "/i2c@0";
Simon Glass3a6eae62015-03-05 12:25:34 -0700[diff] [blame]14 pci0 = &pci;
Simon Glass6b0fb742015-04-20 12:37:30 -0600[diff] [blame]15 spi0 = "/spi@0";
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]16 testbus3 = "/some-bus";
17 testfdt0 = "/some-bus/c-test@0";
18 testfdt1 = "/some-bus/c-test@1";
19 testfdt3 = "/b-test";
20 testfdt5 = "/some-bus/c-test@5";
Simon Glass6b0fb742015-04-20 12:37:30 -0600[diff] [blame]21 testfdt6 = "/e-test";
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]22 testfdt8 = "/a-test";
Simon Glassc83c4b92015-04-20 12:37:31 -0600[diff] [blame]23 rtc0 = &rtc_0;
24 rtc1 = &rtc_1;
Simon Glass31680482015-03-25 12:23:05 -0600[diff] [blame]25 usb0 = &usb_0;
26 usb1 = &usb_1;
27 usb2 = &usb_2;
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]28 };
29
30 uart0: serial {
31 compatible = "sandbox,serial";
32 u-boot,dm-pre-reloc;
33 };
34
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]35 a-test {
36 reg = <0>;
37 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]38 ping-expect = <0>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]39 ping-add = <0>;
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]40 u-boot,dm-pre-reloc;
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]41 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
42 <0>, <&gpio_a 12>;
43 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
44 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
45 <&gpio_b 9 0xc 3 2 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]46 };
47
48 junk {
49 reg = <1>;
50 compatible = "not,compatible";
51 };
52
53 no-compatible {
54 reg = <2>;
55 };
56
57 b-test {
58 reg = <3>;
59 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]60 ping-expect = <3>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]61 ping-add = <3>;
62 };
63
64 some-bus {
65 #address-cells = <1>;
66 #size-cells = <0>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]67 compatible = "denx,u-boot-test-bus";
Simon Glassdb6f0202014-07-23 06:55:12 -0600[diff] [blame]68 reg = <3>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]69 ping-expect = <4>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]70 ping-add = <4>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]71 c-test@5 {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]72 compatible = "denx,u-boot-fdt-test";
73 reg = <5>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]74 ping-expect = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]75 ping-add = <5>;
76 };
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]77 c-test@0 {
78 compatible = "denx,u-boot-fdt-test";
79 reg = <0>;
80 ping-expect = <6>;
81 ping-add = <6>;
82 };
83 c-test@1 {
84 compatible = "denx,u-boot-fdt-test";
85 reg = <1>;
86 ping-expect = <7>;
87 ping-add = <7>;
88 };
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]89 };
90
91 d-test {
Simon Glassdb6f0202014-07-23 06:55:12 -0600[diff] [blame]92 reg = <3>;
93 ping-expect = <6>;
94 ping-add = <6>;
95 compatible = "google,another-fdt-test";
96 };
97
98 e-test {
99 reg = <3>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]100 ping-expect = <6>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]101 ping-add = <6>;
102 compatible = "google,another-fdt-test";
103 };
104
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]105 f-test {
106 compatible = "denx,u-boot-fdt-test";
107 };
108
109 g-test {
110 compatible = "denx,u-boot-fdt-test";
111 };
112
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]113 gpio_a: base-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]114 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]115 gpio-controller;
116 #gpio-cells = <1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]117 gpio-bank-name = "a";
118 num-gpios = <20>;
119 };
120
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]121 gpio_b: extra-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]122 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]123 gpio-controller;
124 #gpio-cells = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]125 gpio-bank-name = "b";
126 num-gpios = <10>;
127 };
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]128
Simon Glass7df766e2014-12-10 08:55:55 -0700[diff] [blame]129 i2c@0 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0>;
133 compatible = "sandbox,i2c";
134 clock-frequency = <100000>;
135 eeprom@2c {
136 reg = <0x2c>;
137 compatible = "i2c-eeprom";
138 emul {
139 compatible = "sandbox,i2c-eeprom";
140 sandbox,filename = "i2c.bin";
141 sandbox,size = <256>;
142 };
143 };
Simon Glassc83c4b92015-04-20 12:37:31 -0600[diff] [blame]144
145 rtc_0: rtc@43 {
146 reg = <0x43>;
147 compatible = "sandbox-rtc";
148 emul {
149 compatible = "sandbox,i2c-rtc";
150 };
151 };
152
153 rtc_1: rtc@61 {
154 reg = <0x61>;
155 compatible = "sandbox-rtc";
156 emul {
157 compatible = "sandbox,i2c-rtc";
158 };
159 };
Simon Glass7df766e2014-12-10 08:55:55 -0700[diff] [blame]160 };
161
Simon Glass3a6eae62015-03-05 12:25:34 -0700[diff] [blame]162 pci: pci-controller {
163 compatible = "sandbox,pci";
164 device_type = "pci";
165 #address-cells = <3>;
166 #size-cells = <2>;
167 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
168 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
169 pci@1f,0 {
170 compatible = "pci-generic";
171 reg = <0xf800 0 0 0 0>;
172 emul@1f,0 {
173 compatible = "sandbox,swap-case";
174 };
175 };
176 };
177
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]178 spi@0 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 reg = <0>;
182 compatible = "sandbox,spi";
183 cs-gpios = <0>, <&gpio_a 0>;
184 spi.bin@0 {
185 reg = <0>;
186 compatible = "spansion,m25p16", "spi-flash";
187 spi-max-frequency = <40000000>;
188 sandbox,filename = "spi.bin";
189 };
190 };
191
Joe Hershberger4c197242015-03-22 17:09:15 -0500[diff] [blame]192 eth@10002000 {
193 compatible = "sandbox,eth";
194 reg = <0x10002000 0x1000>;
195 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>;
196 };
197
Joe Hershberger279d2f62015-03-22 17:09:16 -0500[diff] [blame]198 eth_5: eth@10003000 {
Joe Hershberger4c197242015-03-22 17:09:15 -0500[diff] [blame]199 compatible = "sandbox,eth";
200 reg = <0x10003000 0x1000>;
201 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>;
202 };
203
204 eth@10004000 {
205 compatible = "sandbox,eth";
206 reg = <0x10004000 0x1000>;
207 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
208 };
209
Simon Glass31680482015-03-25 12:23:05 -0600[diff] [blame]210 usb_0: usb@0 {
211 compatible = "sandbox,usb";
212 status = "disabled";
213 hub {
214 compatible = "sandbox,usb-hub";
215 #address-cells = <1>;
216 #size-cells = <0>;
217 flash-stick {
218 reg = <0>;
219 compatible = "sandbox,usb-flash";
220 };
221 };
222 };
223
224 usb_1: usb@1 {
225 compatible = "sandbox,usb";
226 hub {
227 compatible = "usb-hub";
228 usb,device-class = <9>;
229 hub-emul {
230 compatible = "sandbox,usb-hub";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 flash-stick {
234 reg = <0>;
235 compatible = "sandbox,usb-flash";
236 sandbox,filepath = "testflash.bin";
237 };
238
239 };
240 };
241 };
242
243 usb_2: usb@2 {
244 compatible = "sandbox,usb";
245 status = "disabled";
246 };
247
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]248};