Hai Pham | c02d56e | 2024-01-28 16:52:09 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * board/renesas/grayhawk/grayhawk.c |
| 4 | * This file is Gray Hawk board support. |
| 5 | * |
| 6 | * Copyright (C) 2023 Renesas Electronics Corp. |
| 7 | */ |
| 8 | |
Marek Vasut | 97a070b | 2024-02-27 17:05:54 +0100 | [diff] [blame^] | 9 | #include <asm/arch/renesas.h> |
Hai Pham | c02d56e | 2024-01-28 16:52:09 +0100 | [diff] [blame] | 10 | #include <asm/arch/sys_proto.h> |
| 11 | #include <asm/global_data.h> |
| 12 | #include <asm/io.h> |
| 13 | #include <asm/mach-types.h> |
| 14 | #include <asm/processor.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <asm/system.h> |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | static void init_generic_timer(void) |
| 21 | { |
| 22 | const u32 freq = CONFIG_SYS_CLK_FREQ; |
| 23 | |
| 24 | /* Update memory mapped and register based freqency */ |
| 25 | asm volatile ("msr cntfrq_el0, %0" :: "r" (freq)); |
| 26 | writel(freq, CNTFID0); |
| 27 | |
| 28 | /* Enable counter */ |
| 29 | setbits_le32(CNTCR_BASE, CNTCR_EN); |
| 30 | } |
| 31 | |
| 32 | static void init_gic_v3(void) |
| 33 | { |
| 34 | /* GIC v3 power on */ |
| 35 | writel(BIT(1), GICR_LPI_PWRR); |
| 36 | |
| 37 | /* Wait till the WAKER_CA_BIT changes to 0 */ |
| 38 | clrbits_le32(GICR_LPI_WAKER, BIT(1)); |
| 39 | while (readl(GICR_LPI_WAKER) & BIT(2)) |
| 40 | ; |
| 41 | |
| 42 | writel(0xffffffff, GICR_SGI_BASE + GICR_IGROUPR0); |
| 43 | } |
| 44 | |
| 45 | void s_init(void) |
| 46 | { |
| 47 | if (current_el() == 3) |
| 48 | init_generic_timer(); |
| 49 | } |
| 50 | |
| 51 | int board_early_init_f(void) |
| 52 | { |
| 53 | /* Unlock CPG access */ |
| 54 | writel(0x5A5AFFFF, CPGWPR); |
| 55 | writel(0xA5A50000, CPGWPCR); |
| 56 | |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | int board_init(void) |
| 61 | { |
| 62 | if (current_el() == 3) |
| 63 | init_gic_v3(); |
| 64 | |
| 65 | return 0; |
| 66 | } |