blob: 0a60ddfa4149ee75da08ef732bf5699544c7131c [file] [log] [blame]
Phil Sutterd76eba62015-12-25 14:41:25 +01001/*
2 * Device Tree file for Synology DS414
3 *
4 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Note: this Device Tree assumes that the bootloader has remapped the
12 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
13 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
14 * bootloaders provided by Marvell. It is used in recent versions of
15 * DSM software provided by Synology. Nonetheless, some earlier boards
16 * were delivered with an older version of u-boot that left internal
17 * registers mapped at 0xd0000000. If you have such a device you will
18 * not be able to directly boot a kernel based on this Device Tree. In
19 * that case, the preferred solution is to update your bootloader (e.g.
20 * by upgrading to latest version of DSM, or building a new one and
21 * installing it from u-boot prompt) or adjust the Devive Tree
22 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
23 */
24
25/dts-v1/;
26
27#include <dt-bindings/input/input.h>
28#include <dt-bindings/gpio/gpio.h>
29#include "armada-xp-mv78230.dtsi"
30
31/ {
32 model = "Synology DS414";
33 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
34 "marvell,armadaxp", "marvell,armada-370-xp";
35
36 chosen {
37 bootargs = "console=ttyS0,115200 earlyprintk";
38 stdout-path = &uart0;
39 };
40
41 aliases {
42 spi0 = &spi0;
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
48 };
49
50 soc {
51 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
52 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
53
54 pcie-controller {
55 status = "okay";
56
57 /*
58 * Connected to Marvell 88SX7042 SATA-II controller
59 * handling the four disks.
60 */
61 pcie@1,0 {
62 /* Port 0, Lane 0 */
63 status = "okay";
64 };
65
66 /*
67 * Connected to EtronTech EJ168A XHCI controller
68 * providing the two rear USB 3.0 ports.
69 */
70 pcie@5,0 {
71 /* Port 1, Lane 0 */
72 status = "okay";
73 };
74 };
75
76 internal-regs {
77
78 /* RTC is provided by Seiko S-35390A below */
79 rtc@10300 {
80 status = "disabled";
81 };
82
83 spi0: spi@10600 {
84 status = "okay";
85 u-boot,dm-pre-reloc;
86
87 spi-flash@0 {
88 u-boot,dm-pre-reloc;
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "micron,n25q064";
92 reg = <0>; /* Chip select 0 */
93 spi-max-frequency = <20000000>;
94
95 /*
96 * Warning!
97 *
98 * Synology u-boot uses its compiled-in environment
99 * and it seems Synology did not care to change u-boot
100 * default configuration in order to allow saving a
101 * modified environment at a sensible location. So,
102 * if you do a 'saveenv' under u-boot, your modified
103 * environment will be saved at 1MB after the start
104 * of the flash, i.e. in the middle of the uImage.
105 * For that reason, it is strongly advised not to
106 * change the default environment, unless you know
107 * what you are doing.
108 */
109 partition@00000000 { /* u-boot */
110 label = "RedBoot";
111 reg = <0x00000000 0x000d0000>; /* 832KB */
112 };
113
114 partition@000c0000 { /* uImage */
115 label = "zImage";
116 reg = <0x000d0000 0x002d0000>; /* 2880KB */
117 };
118
119 partition@003a0000 { /* uInitramfs */
120 label = "rd.gz";
121 reg = <0x003a0000 0x00430000>; /* 4250KB */
122 };
123
124 partition@007d0000 { /* MAC address and serial number */
125 label = "vendor";
126 reg = <0x007d0000 0x00010000>; /* 64KB */
127 };
128
129 partition@007e0000 {
130 label = "RedBoot config";
131 reg = <0x007e0000 0x00010000>; /* 64KB */
132 };
133
134 partition@007f0000 {
135 label = "FIS directory";
136 reg = <0x007f0000 0x00010000>; /* 64KB */
137 };
138 };
139 };
140
141 i2c@11000 {
142 clock-frequency = <400000>;
143 status = "okay";
144
145 s35390a: s35390a@30 {
146 compatible = "sii,s35390a";
147 reg = <0x30>;
148 };
149 };
150
151 /* Connected to a header on device's PCB. This
152 * provides the main console for the device.
153 *
154 * Warning: the device may not boot with a 3.3V
155 * USB-serial converter connected when the power
156 * button is pressed. The converter needs to be
157 * connected a few seconds after pressing the
158 * power button. This is possibly due to UART0_TXD
159 * pin being sampled at reset (bit 0 of SAR).
160 */
161 serial@12000 {
162 status = "okay";
163 u-boot,dm-pre-reloc;
164 };
165
166 /* Connected to a Microchip PIC16F883 for power control */
167 serial@12100 {
168 status = "okay";
169 };
170
171 poweroff@12100 {
172 compatible = "synology,power-off";
173 reg = <0x12100 0x100>;
174 clocks = <&coreclk 0>;
175 };
176
177 /* Front USB 2.0 port */
178 usb@50000 {
179 status = "okay";
180 };
181
182 mdio {
183 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
184 reg = <0>;
185 };
186
187 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
188 reg = <1>;
189 };
190 };
191
192 ethernet@70000 {
193 status = "okay";
194 pinctrl-0 = <&ge0_rgmii_pins>;
195 pinctrl-names = "default";
196 phy = <&phy1>;
197 phy-mode = "rgmii-id";
198 };
199
200 ethernet@74000 {
201 pinctrl-0 = <&ge1_rgmii_pins>;
202 pinctrl-names = "default";
203 status = "okay";
204 phy = <&phy0>;
205 phy-mode = "rgmii-id";
206 };
207 };
208 };
209
210 regulators {
211 compatible = "simple-bus";
212 #address-cells = <1>;
213 #size-cells = <0>;
214 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
215 &sata3_pwr_pin &sata4_pwr_pin>;
216 pinctrl-names = "default";
217
218 sata1_regulator: sata1-regulator {
219 compatible = "regulator-fixed";
220 reg = <1>;
221 regulator-name = "SATA1 Power";
222 regulator-min-microvolt = <5000000>;
223 regulator-max-microvolt = <5000000>;
224 startup-delay-us = <2000000>;
225 enable-active-high;
226 regulator-always-on;
227 regulator-boot-on;
228 gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
229 };
230
231 sata2_regulator: sata2-regulator {
232 compatible = "regulator-fixed";
233 reg = <2>;
234 regulator-name = "SATA2 Power";
235 regulator-min-microvolt = <5000000>;
236 regulator-max-microvolt = <5000000>;
237 startup-delay-us = <4000000>;
238 enable-active-high;
239 regulator-always-on;
240 regulator-boot-on;
241 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
242 };
243
244 sata3_regulator: sata3-regulator {
245 compatible = "regulator-fixed";
246 reg = <3>;
247 regulator-name = "SATA3 Power";
248 regulator-min-microvolt = <5000000>;
249 regulator-max-microvolt = <5000000>;
250 startup-delay-us = <6000000>;
251 enable-active-high;
252 regulator-always-on;
253 regulator-boot-on;
254 gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
255 };
256
257 sata4_regulator: sata4-regulator {
258 compatible = "regulator-fixed";
259 reg = <4>;
260 regulator-name = "SATA4 Power";
261 regulator-min-microvolt = <5000000>;
262 regulator-max-microvolt = <5000000>;
263 startup-delay-us = <8000000>;
264 enable-active-high;
265 regulator-always-on;
266 regulator-boot-on;
267 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
268 };
269 };
270};
271
272&pinctrl {
273 sata1_pwr_pin: sata1-pwr-pin {
274 marvell,pins = "mpp42";
275 marvell,function = "gpio";
276 };
277
278 sata2_pwr_pin: sata2-pwr-pin {
279 marvell,pins = "mpp44";
280 marvell,function = "gpio";
281 };
282
283 sata3_pwr_pin: sata3-pwr-pin {
284 marvell,pins = "mpp45";
285 marvell,function = "gpio";
286 };
287
288 sata4_pwr_pin: sata4-pwr-pin {
289 marvell,pins = "mpp46";
290 marvell,function = "gpio";
291 };
292
293 sata1_pres_pin: sata1-pres-pin {
294 marvell,pins = "mpp34";
295 marvell,function = "gpio";
296 };
297
298 sata2_pres_pin: sata2-pres-pin {
299 marvell,pins = "mpp35";
300 marvell,function = "gpio";
301 };
302
303 sata3_pres_pin: sata3-pres-pin {
304 marvell,pins = "mpp40";
305 marvell,function = "gpio";
306 };
307
308 sata4_pres_pin: sata4-pres-pin {
309 marvell,pins = "mpp41";
310 marvell,function = "gpio";
311 };
312
313 syno_id_bit0_pin: syno-id-bit0-pin {
314 marvell,pins = "mpp26";
315 marvell,function = "gpio";
316 };
317
318 syno_id_bit1_pin: syno-id-bit1-pin {
319 marvell,pins = "mpp28";
320 marvell,function = "gpio";
321 };
322
323 syno_id_bit2_pin: syno-id-bit2-pin {
324 marvell,pins = "mpp29";
325 marvell,function = "gpio";
326 };
327
328 fan1_alarm_pin: fan1-alarm-pin {
329 marvell,pins = "mpp33";
330 marvell,function = "gpio";
331 };
332
333 fan2_alarm_pin: fan2-alarm-pin {
334 marvell,pins = "mpp32";
335 marvell,function = "gpio";
336 };
337};