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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +02002/*
3 * (C) Copyright 2008
4 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
5 *
6 * Copyright 2004 Freescale Semiconductor.
7 * (C) Copyright 2002,2003, Motorola Inc.
8 * Xianghua Xiao, (X.Xiao@motorola.com)
9 *
10 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020011 */
12
13#include <common.h>
Simon Glass85d65312019-12-28 10:44:58 -070014#include <clock_legacy.h>
Simon Glassdb229612019-08-01 09:46:42 -060015#include <env.h>
Simon Glass97589732020-05-10 11:40:02 -060016#include <init.h>
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020017#include <pci.h>
Simon Glass8e201882020-05-10 11:39:54 -060018#include <uuid.h>
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020019#include <asm/processor.h>
20#include <asm/immap_85xx.h>
21#include <ioports.h>
22#include <flash.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090023#include <linux/libfdt.h>
Sergei Poselenov09842c52008-05-07 15:10:49 +020024#include <fdt_support.h>
Andy Fleming7109ea32008-06-10 18:49:34 -050025#include <asm/io.h>
u-boot@bugs.denx.debbab0bc2008-09-11 15:40:01 +020026#include <i2c.h>
27#include <mb862xx.h>
28#include <video_fb.h>
Sergei Poselenov96dd16b2008-06-06 15:42:41 +020029#include "upm_table.h"
Detlev Zundel0244f672008-08-15 15:42:12 +020030
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020031DECLARE_GLOBAL_DATA_PTR;
32
33extern flash_info_t flash_info[]; /* FLASH chips info */
u-boot@bugs.denx.debbab0bc2008-09-11 15:40:01 +020034extern GraphicDevice mb862xx;
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020035
36void local_bus_init (void);
37ulong flash_get_size (ulong base, int banknum);
38
39int checkboard (void)
40{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020041 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000042 char buf[64];
Sergei Poselenove13be1a2008-05-27 13:47:00 +020043 int f;
Simon Glass64b723f2017-08-03 12:22:12 -060044 int i = env_get_f("serial#", buf, sizeof(buf));
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000045#ifdef CONFIG_PCI
46 char *src;
47#endif
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020048
49 puts("Board: Socrates");
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000050 if (i > 0) {
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020051 puts(", serial# ");
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +000052 puts(buf);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020053 }
54 putc('\n');
55
Heiko Schocher84cdae22019-10-16 05:55:54 +020056#if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI)
Andy Fleming7109ea32008-06-10 18:49:34 -050057 /* Check the PCI_clk sel bit */
58 if (in_be32(&gur->porpllsr) & (1<<15)) {
Sergei Poselenove13be1a2008-05-27 13:47:00 +020059 src = "SYSCLK";
60 f = CONFIG_SYS_CLK_FREQ;
61 } else {
62 src = "PCI_CLK";
63 f = CONFIG_PCI_CLK_FREQ;
64 }
65 printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020066#else
67 printf ("PCI1: disabled\n");
68#endif
69
70 /*
71 * Initialize local bus.
72 */
73 local_bus_init ();
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020074 return 0;
75}
76
77int misc_init_r (void)
78{
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020079 /*
80 * Adjust flash start and offset to detected values
81 */
82 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
83 gd->bd->bi_flashoffset = 0;
84
85 /*
86 * Check if boot FLASH isn't max size
87 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020088 if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
Becky Bruce0d4cee12010-06-17 11:37:20 -050089 set_lbc_or(0, gd->bd->bi_flashstart |
90 (CONFIG_SYS_OR0_PRELIM & 0x00007fff));
91 set_lbc_br(0, gd->bd->bi_flashstart |
92 (CONFIG_SYS_BR0_PRELIM & 0x00007fff));
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020093
94 /*
95 * Re-check to get correct base address
96 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020097 flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +020098 }
99
100 /*
101 * Check if only one FLASH bank is available
102 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103 if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
Becky Bruce0d4cee12010-06-17 11:37:20 -0500104 set_lbc_or(1, 0);
105 set_lbc_br(1, 0);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200106
107 /*
108 * Re-do flash protection upon new addresses
109 */
Simon Glassc7443162020-05-10 11:39:53 -0600110 flash_protect(FLAG_PROTECT_CLEAR,
111 gd->bd->bi_flashstart, 0xffffffff,
112 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200113
114 /* Monitor protection ON by default */
Simon Glassc7443162020-05-10 11:39:53 -0600115 flash_protect(FLAG_PROTECT_SET,
116 CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE +
117 monitor_flash_len - 1,
118 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200119
120 /* Environment protection ON by default */
Simon Glassc7443162020-05-10 11:39:53 -0600121 flash_protect(FLAG_PROTECT_SET,
122 CONFIG_ENV_ADDR,
123 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
124 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200125
126 /* Redundant environment protection ON by default */
Simon Glassc7443162020-05-10 11:39:53 -0600127 flash_protect(FLAG_PROTECT_SET,
128 CONFIG_ENV_ADDR_REDUND,
129 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200131 }
132
Heiko Schocher84cdae22019-10-16 05:55:54 +0200133#if defined(CONFIG_DM_PCI)
134 pci_init();
135#endif
136
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200137 return 0;
138}
139
140/*
141 * Initialize Local Bus
142 */
143void local_bus_init (void)
144{
Becky Bruce0d4cee12010-06-17 11:37:20 -0500145 volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146 volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
Detlev Zundel0244f672008-08-15 15:42:12 +0200147 sys_info_t sysinfo;
148 uint clkdiv;
149 uint lbc_mhz;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150 uint lcrr = CONFIG_SYS_LBC_LCRR;
Detlev Zundel0244f672008-08-15 15:42:12 +0200151
152 get_sys_info (&sysinfo);
Trent Piepho1b560ac2008-12-03 15:16:34 -0800153 clkdiv = lbc->lcrr & LCRR_CLKDIV;
Prabhakar Kushwahad1698082013-08-16 14:52:26 +0530154 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
Detlev Zundel0244f672008-08-15 15:42:12 +0200155
156 /* Disable PLL bypass for Local Bus Clock >= 66 MHz */
157 if (lbc_mhz >= 66)
158 lcrr &= ~LCRR_DBYP; /* DLL Enabled */
159 else
160 lcrr |= LCRR_DBYP; /* DLL Bypass */
161
162 out_be32 (&lbc->lcrr, lcrr);
163 asm ("sync;isync;msync");
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200164
Detlev Zundel0244f672008-08-15 15:42:12 +0200165 out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
166 out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
167 out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
168 out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200169
Detlev Zundel0244f672008-08-15 15:42:12 +0200170 /* Init UPMA for FPGA access */
171 out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
Simon Glass4be8fc92019-12-28 10:44:57 -0700172 upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA) / sizeof(int));
Anatolij Gustschine6f5c912008-08-15 15:42:13 +0200173
u-boot@bugs.denx.debbab0bc2008-09-11 15:40:01 +0200174 /* Init UPMB for Lime controller access */
175 out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
Simon Glass4be8fc92019-12-28 10:44:57 -0700176 upmconfig(UPMB, (uint *)UPMTableB, sizeof(UPMTableB) / sizeof(int));
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200177}
178
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200179#ifdef CONFIG_BOARD_EARLY_INIT_R
180int board_early_init_r (void)
181{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Detlev Zundel0244f672008-08-15 15:42:12 +0200183
184 /* set and reset the GPIO pin 2 which will reset the W83782G chip */
185 out_8((unsigned char*)&gur->gpoutdr, 0x3F );
186 out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
187 udelay(200);
188 out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
189
Sergei Poselenovf2bf96c2008-04-30 11:42:50 +0200190 return (0);
191}
192#endif /* CONFIG_BOARD_EARLY_INIT_R */
Sergei Poselenov09842c52008-05-07 15:10:49 +0200193
Robert P. J. Day3c757002016-05-19 15:23:12 -0400194#ifdef CONFIG_OF_BOARD_SETUP
Simon Glass2aec3cc2014-10-23 18:58:47 -0600195int ft_board_setup(void *blob, bd_t *bd)
Sergei Poselenov09842c52008-05-07 15:10:49 +0200196{
Detlev Zundel0244f672008-08-15 15:42:12 +0200197 u32 val[12];
198 int rc, i = 0;
Sergei Poselenov09842c52008-05-07 15:10:49 +0200199
200 ft_cpu_setup(blob, bd);
201
Detlev Zundel0244f672008-08-15 15:42:12 +0200202 /* Fixup NOR FLASH mapping */
203 val[i++] = 0; /* chip select number */
204 val[i++] = 0; /* always 0 */
205 val[i++] = gd->bd->bi_flashstart;
206 val[i++] = gd->bd->bi_flashsize;
Sergei Poselenov09842c52008-05-07 15:10:49 +0200207
Heiko Schocherff109932019-10-16 05:55:51 +0200208#if defined(CONFIG_VIDEO_MB862xx)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209 if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
Anatolij Gustschine6f5c912008-08-15 15:42:13 +0200210 /* Fixup LIME mapping */
211 val[i++] = 2; /* chip select number */
212 val[i++] = 0; /* always 0 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200213 val[i++] = CONFIG_SYS_LIME_BASE;
214 val[i++] = CONFIG_SYS_LIME_SIZE;
Anatolij Gustschine6f5c912008-08-15 15:42:13 +0200215 }
Heiko Schocherff109932019-10-16 05:55:51 +0200216#endif
Anatolij Gustschine6f5c912008-08-15 15:42:13 +0200217
Detlev Zundel0244f672008-08-15 15:42:12 +0200218 /* Fixup FPGA mapping */
219 val[i++] = 3; /* chip select number */
220 val[i++] = 0; /* always 0 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221 val[i++] = CONFIG_SYS_FPGA_BASE;
222 val[i++] = CONFIG_SYS_FPGA_SIZE;
Sergei Poselenovbc3d08d2008-06-06 15:42:45 +0200223
Detlev Zundel0244f672008-08-15 15:42:12 +0200224 rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
225 val, i * sizeof(u32), 1);
Sergei Poselenovbc3d08d2008-06-06 15:42:45 +0200226 if (rc)
Detlev Zundel0244f672008-08-15 15:42:12 +0200227 printf("Unable to update localbus ranges, err=%s\n",
Sergei Poselenovbc3d08d2008-06-06 15:42:45 +0200228 fdt_strerror(rc));
Simon Glass2aec3cc2014-10-23 18:58:47 -0600229
230 return 0;
Sergei Poselenov09842c52008-05-07 15:10:49 +0200231}
Robert P. J. Day3c757002016-05-19 15:23:12 -0400232#endif /* CONFIG_OF_BOARD_SETUP */
Anatolij Gustschine6f5c912008-08-15 15:42:13 +0200233
Heiko Schocher66daf322019-10-16 05:55:49 +0200234#if defined(CONFIG_OF_SEPARATE)
235void *board_fdt_blob_setup(void)
236{
237 void *fw_dtb;
238
239 fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE);
240 if (fdt_magic(fw_dtb) != FDT_MAGIC) {
241 printf("DTB is not passed via %x\n", (u32)fw_dtb);
242 return NULL;
243 }
244
245 return fw_dtb;
246}
247#endif
Heiko Schocher08ce3722019-10-16 05:55:53 +0200248
249int get_serial_clock(void)
250{
251 return 333333330;
252}