Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2008 |
| 4 | * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. |
| 5 | * |
| 6 | * Copyright 2004 Freescale Semiconductor. |
| 7 | * (C) Copyright 2002,2003, Motorola Inc. |
| 8 | * Xianghua Xiao, (X.Xiao@motorola.com) |
| 9 | * |
| 10 | * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 14 | #include <clock_legacy.h> |
Simon Glass | db22961 | 2019-08-01 09:46:42 -0600 | [diff] [blame] | 15 | #include <env.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame^] | 16 | #include <init.h> |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 17 | #include <pci.h> |
Simon Glass | 8e20188 | 2020-05-10 11:39:54 -0600 | [diff] [blame] | 18 | #include <uuid.h> |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 19 | #include <asm/processor.h> |
| 20 | #include <asm/immap_85xx.h> |
| 21 | #include <ioports.h> |
| 22 | #include <flash.h> |
Masahiro Yamada | 75f82d0 | 2018-03-05 01:20:11 +0900 | [diff] [blame] | 23 | #include <linux/libfdt.h> |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 24 | #include <fdt_support.h> |
Andy Fleming | 7109ea3 | 2008-06-10 18:49:34 -0500 | [diff] [blame] | 25 | #include <asm/io.h> |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 26 | #include <i2c.h> |
| 27 | #include <mb862xx.h> |
| 28 | #include <video_fb.h> |
Sergei Poselenov | 96dd16b | 2008-06-06 15:42:41 +0200 | [diff] [blame] | 29 | #include "upm_table.h" |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 30 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
| 33 | extern flash_info_t flash_info[]; /* FLASH chips info */ |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 34 | extern GraphicDevice mb862xx; |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 35 | |
| 36 | void local_bus_init (void); |
| 37 | ulong flash_get_size (ulong base, int banknum); |
| 38 | |
| 39 | int checkboard (void) |
| 40 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 41 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 42 | char buf[64]; |
Sergei Poselenov | e13be1a | 2008-05-27 13:47:00 +0200 | [diff] [blame] | 43 | int f; |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 44 | int i = env_get_f("serial#", buf, sizeof(buf)); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 45 | #ifdef CONFIG_PCI |
| 46 | char *src; |
| 47 | #endif |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 48 | |
| 49 | puts("Board: Socrates"); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 50 | if (i > 0) { |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 51 | puts(", serial# "); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 52 | puts(buf); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 53 | } |
| 54 | putc('\n'); |
| 55 | |
Heiko Schocher | 84cdae2 | 2019-10-16 05:55:54 +0200 | [diff] [blame] | 56 | #if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI) |
Andy Fleming | 7109ea3 | 2008-06-10 18:49:34 -0500 | [diff] [blame] | 57 | /* Check the PCI_clk sel bit */ |
| 58 | if (in_be32(&gur->porpllsr) & (1<<15)) { |
Sergei Poselenov | e13be1a | 2008-05-27 13:47:00 +0200 | [diff] [blame] | 59 | src = "SYSCLK"; |
| 60 | f = CONFIG_SYS_CLK_FREQ; |
| 61 | } else { |
| 62 | src = "PCI_CLK"; |
| 63 | f = CONFIG_PCI_CLK_FREQ; |
| 64 | } |
| 65 | printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 66 | #else |
| 67 | printf ("PCI1: disabled\n"); |
| 68 | #endif |
| 69 | |
| 70 | /* |
| 71 | * Initialize local bus. |
| 72 | */ |
| 73 | local_bus_init (); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | int misc_init_r (void) |
| 78 | { |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 79 | /* |
| 80 | * Adjust flash start and offset to detected values |
| 81 | */ |
| 82 | gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; |
| 83 | gd->bd->bi_flashoffset = 0; |
| 84 | |
| 85 | /* |
| 86 | * Check if boot FLASH isn't max size |
| 87 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 88 | if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 89 | set_lbc_or(0, gd->bd->bi_flashstart | |
| 90 | (CONFIG_SYS_OR0_PRELIM & 0x00007fff)); |
| 91 | set_lbc_br(0, gd->bd->bi_flashstart | |
| 92 | (CONFIG_SYS_BR0_PRELIM & 0x00007fff)); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 93 | |
| 94 | /* |
| 95 | * Re-check to get correct base address |
| 96 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 97 | flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | /* |
| 101 | * Check if only one FLASH bank is available |
| 102 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 104 | set_lbc_or(1, 0); |
| 105 | set_lbc_br(1, 0); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 106 | |
| 107 | /* |
| 108 | * Re-do flash protection upon new addresses |
| 109 | */ |
Simon Glass | c744316 | 2020-05-10 11:39:53 -0600 | [diff] [blame] | 110 | flash_protect(FLAG_PROTECT_CLEAR, |
| 111 | gd->bd->bi_flashstart, 0xffffffff, |
| 112 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 113 | |
| 114 | /* Monitor protection ON by default */ |
Simon Glass | c744316 | 2020-05-10 11:39:53 -0600 | [diff] [blame] | 115 | flash_protect(FLAG_PROTECT_SET, |
| 116 | CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + |
| 117 | monitor_flash_len - 1, |
| 118 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 119 | |
| 120 | /* Environment protection ON by default */ |
Simon Glass | c744316 | 2020-05-10 11:39:53 -0600 | [diff] [blame] | 121 | flash_protect(FLAG_PROTECT_SET, |
| 122 | CONFIG_ENV_ADDR, |
| 123 | CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, |
| 124 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 125 | |
| 126 | /* Redundant environment protection ON by default */ |
Simon Glass | c744316 | 2020-05-10 11:39:53 -0600 | [diff] [blame] | 127 | flash_protect(FLAG_PROTECT_SET, |
| 128 | CONFIG_ENV_ADDR_REDUND, |
| 129 | CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 131 | } |
| 132 | |
Heiko Schocher | 84cdae2 | 2019-10-16 05:55:54 +0200 | [diff] [blame] | 133 | #if defined(CONFIG_DM_PCI) |
| 134 | pci_init(); |
| 135 | #endif |
| 136 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | /* |
| 141 | * Initialize Local Bus |
| 142 | */ |
| 143 | void local_bus_init (void) |
| 144 | { |
Becky Bruce | 0d4cee1 | 2010-06-17 11:37:20 -0500 | [diff] [blame] | 145 | volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 147 | sys_info_t sysinfo; |
| 148 | uint clkdiv; |
| 149 | uint lbc_mhz; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 150 | uint lcrr = CONFIG_SYS_LBC_LCRR; |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 151 | |
| 152 | get_sys_info (&sysinfo); |
Trent Piepho | 1b560ac | 2008-12-03 15:16:34 -0800 | [diff] [blame] | 153 | clkdiv = lbc->lcrr & LCRR_CLKDIV; |
Prabhakar Kushwaha | d169808 | 2013-08-16 14:52:26 +0530 | [diff] [blame] | 154 | lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv; |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 155 | |
| 156 | /* Disable PLL bypass for Local Bus Clock >= 66 MHz */ |
| 157 | if (lbc_mhz >= 66) |
| 158 | lcrr &= ~LCRR_DBYP; /* DLL Enabled */ |
| 159 | else |
| 160 | lcrr |= LCRR_DBYP; /* DLL Bypass */ |
| 161 | |
| 162 | out_be32 (&lbc->lcrr, lcrr); |
| 163 | asm ("sync;isync;msync"); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 164 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 165 | out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */ |
| 166 | out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */ |
| 167 | out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */ |
| 168 | out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 169 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 170 | /* Init UPMA for FPGA access */ |
| 171 | out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */ |
Simon Glass | 4be8fc9 | 2019-12-28 10:44:57 -0700 | [diff] [blame] | 172 | upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA) / sizeof(int)); |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 173 | |
u-boot@bugs.denx.de | bbab0bc | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 174 | /* Init UPMB for Lime controller access */ |
| 175 | out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */ |
Simon Glass | 4be8fc9 | 2019-12-28 10:44:57 -0700 | [diff] [blame] | 176 | upmconfig(UPMB, (uint *)UPMTableB, sizeof(UPMTableB) / sizeof(int)); |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 177 | } |
| 178 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 179 | #ifdef CONFIG_BOARD_EARLY_INIT_R |
| 180 | int board_early_init_r (void) |
| 181 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 183 | |
| 184 | /* set and reset the GPIO pin 2 which will reset the W83782G chip */ |
| 185 | out_8((unsigned char*)&gur->gpoutdr, 0x3F ); |
| 186 | out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */ |
| 187 | udelay(200); |
| 188 | out_8( (unsigned char*)&gur->gpoutdr, 0x1F ); |
| 189 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 190 | return (0); |
| 191 | } |
| 192 | #endif /* CONFIG_BOARD_EARLY_INIT_R */ |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 193 | |
Robert P. J. Day | 3c75700 | 2016-05-19 15:23:12 -0400 | [diff] [blame] | 194 | #ifdef CONFIG_OF_BOARD_SETUP |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 195 | int ft_board_setup(void *blob, bd_t *bd) |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 196 | { |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 197 | u32 val[12]; |
| 198 | int rc, i = 0; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 199 | |
| 200 | ft_cpu_setup(blob, bd); |
| 201 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 202 | /* Fixup NOR FLASH mapping */ |
| 203 | val[i++] = 0; /* chip select number */ |
| 204 | val[i++] = 0; /* always 0 */ |
| 205 | val[i++] = gd->bd->bi_flashstart; |
| 206 | val[i++] = gd->bd->bi_flashsize; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 207 | |
Heiko Schocher | ff10993 | 2019-10-16 05:55:51 +0200 | [diff] [blame] | 208 | #if defined(CONFIG_VIDEO_MB862xx) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 209 | if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) { |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 210 | /* Fixup LIME mapping */ |
| 211 | val[i++] = 2; /* chip select number */ |
| 212 | val[i++] = 0; /* always 0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 213 | val[i++] = CONFIG_SYS_LIME_BASE; |
| 214 | val[i++] = CONFIG_SYS_LIME_SIZE; |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 215 | } |
Heiko Schocher | ff10993 | 2019-10-16 05:55:51 +0200 | [diff] [blame] | 216 | #endif |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 217 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 218 | /* Fixup FPGA mapping */ |
| 219 | val[i++] = 3; /* chip select number */ |
| 220 | val[i++] = 0; /* always 0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 221 | val[i++] = CONFIG_SYS_FPGA_BASE; |
| 222 | val[i++] = CONFIG_SYS_FPGA_SIZE; |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 223 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 224 | rc = fdt_find_and_setprop(blob, "/localbus", "ranges", |
| 225 | val, i * sizeof(u32), 1); |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 226 | if (rc) |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 227 | printf("Unable to update localbus ranges, err=%s\n", |
Sergei Poselenov | bc3d08d | 2008-06-06 15:42:45 +0200 | [diff] [blame] | 228 | fdt_strerror(rc)); |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 229 | |
| 230 | return 0; |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 231 | } |
Robert P. J. Day | 3c75700 | 2016-05-19 15:23:12 -0400 | [diff] [blame] | 232 | #endif /* CONFIG_OF_BOARD_SETUP */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 233 | |
Heiko Schocher | 66daf32 | 2019-10-16 05:55:49 +0200 | [diff] [blame] | 234 | #if defined(CONFIG_OF_SEPARATE) |
| 235 | void *board_fdt_blob_setup(void) |
| 236 | { |
| 237 | void *fw_dtb; |
| 238 | |
| 239 | fw_dtb = (void *)(CONFIG_SYS_TEXT_BASE - CONFIG_ENV_SECT_SIZE); |
| 240 | if (fdt_magic(fw_dtb) != FDT_MAGIC) { |
| 241 | printf("DTB is not passed via %x\n", (u32)fw_dtb); |
| 242 | return NULL; |
| 243 | } |
| 244 | |
| 245 | return fw_dtb; |
| 246 | } |
| 247 | #endif |
Heiko Schocher | 08ce372 | 2019-10-16 05:55:53 +0200 | [diff] [blame] | 248 | |
| 249 | int get_serial_clock(void) |
| 250 | { |
| 251 | return 333333330; |
| 252 | } |