blob: e66720447f85e22d9c4c97f6ffb24e005e09dc37 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00002#
3# (C) Copyright 2000-2003
4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5#
Ley Foon Tan5b7cea62017-04-26 02:44:48 +08006# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00007
Ley Foon Tan5b7cea62017-04-26 02:44:48 +08008obj-y += board.o
9obj-y += clock_manager.o
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080010obj-y += misc.o
11obj-y += reset_manager.o
Dinh Nguyen9365e902015-12-02 13:31:32 -060012
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080013ifdef CONFIG_TARGET_SOCFPGA_GEN5
14obj-y += clock_manager_gen5.o
15obj-y += misc_gen5.o
16obj-y += reset_manager_gen5.o
17obj-y += scan_manager.o
18obj-y += system_manager_gen5.o
Ley Foon Tan4eadafc22018-05-24 00:17:29 +080019obj-y += timer.o
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080020obj-y += wrap_pll_config.o
Tien Fong Chee31e50f42017-07-26 13:05:38 +080021obj-y += fpga_manager.o
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080022endif
Ley Foon Tan778ed2c2017-04-26 02:44:38 +080023
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080024ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
25obj-y += clock_manager_arria10.o
26obj-y += misc_arria10.o
27obj-y += pinmux_arria10.o
28obj-y += reset_manager_arria10.o
29endif
Marek Vasutaefb78d2015-08-02 21:12:09 +020030
Ley Foon Tan6751e7d2018-05-18 22:05:22 +080031ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
32obj-y += clock_manager_s10.o
Ley Foon Tane5b6a662018-05-24 00:17:25 +080033obj-y += mailbox_s10.o
Ley Foon Tanf80cb342018-05-24 00:17:24 +080034obj-y += misc_s10.o
Ley Foon Tanca6afad2018-05-24 00:17:26 +080035obj-y += mmu-arm64_s10.o
Ley Foon Tan449cbae2018-05-18 22:05:23 +080036obj-y += reset_manager_s10.o
Ley Foon Tan7cdb9122018-05-18 22:05:24 +080037obj-y += system_manager_s10.o
Ley Foon Tan4eadafc22018-05-24 00:17:29 +080038obj-y += timer_s10.o
Ley Foon Tan7cdb9122018-05-18 22:05:24 +080039obj-y += wrap_pinmux_config_s10.o
Ley Foon Tan6751e7d2018-05-18 22:05:22 +080040obj-y += wrap_pll_config_s10.o
41endif
Ley Foon Tan975e4962018-05-24 00:17:28 +080042
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080043ifdef CONFIG_SPL_BUILD
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080044ifdef CONFIG_TARGET_SOCFPGA_GEN5
Ley Foon Tan3305ba72018-05-24 00:17:27 +080045obj-y += spl_gen5.o
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080046obj-y += freeze_controller.o
47obj-y += wrap_iocsr_config.o
48obj-y += wrap_pinmux_config.o
49obj-y += wrap_sdram_config.o
50endif
Ley Foon Tan3305ba72018-05-24 00:17:27 +080051ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
52obj-y += spl_a10.o
53endif
Ley Foon Tan975e4962018-05-24 00:17:28 +080054ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
55obj-y += spl_s10.o
56endif
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080057endif
58
59ifdef CONFIG_TARGET_SOCFPGA_GEN5
Marek Vasutaefb78d2015-08-02 21:12:09 +020060# QTS-generated config file wrappers
Marek Vasutaefb78d2015-08-02 21:12:09 +020061CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
62CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
63CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
64CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)
Ley Foon Tan5b7cea62017-04-26 02:44:48 +080065endif