arm: socfpga: stratix10: Add timer support for Stratix10 SoC
Add timer support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 3131949..654999c 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -9,7 +9,6 @@
obj-y += clock_manager.o
obj-y += misc.o
obj-y += reset_manager.o
-obj-y += timer.o
ifdef CONFIG_TARGET_SOCFPGA_GEN5
obj-y += clock_manager_gen5.o
@@ -17,6 +16,7 @@
obj-y += reset_manager_gen5.o
obj-y += scan_manager.o
obj-y += system_manager_gen5.o
+obj-y += timer.o
obj-y += wrap_pll_config.o
obj-y += fpga_manager.o
endif
@@ -26,6 +26,7 @@
obj-y += misc_arria10.o
obj-y += pinmux_arria10.o
obj-y += reset_manager_arria10.o
+obj-y += timer.o
endif
ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
@@ -35,6 +36,7 @@
obj-y += mmu-arm64_s10.o
obj-y += reset_manager_s10.o
obj-y += system_manager_s10.o
+obj-y += timer_s10.o
obj-y += wrap_pinmux_config_s10.o
obj-y += wrap_pll_config_s10.o
endif