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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Ian Campbell6efe3692014-05-05 11:52:26 +010018/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010019/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050020#ifdef CONFIG_MACH_SUNIV
21/* suniv doesn't have apb2 and uart is connected to apb1 */
Tom Rinidf6a2152022-11-16 13:10:28 -050022#define CFG_SYS_NS16550_CLK 100000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050023#else
Tom Rinidf6a2152022-11-16 13:10:28 -050024#define CFG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050025#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080026#ifndef CONFIG_DM_SERIAL
Tom Rinidf6a2152022-11-16 13:10:28 -050027# define CFG_SYS_NS16550_COM1 SUNXI_UART0_BASE
28# define CFG_SYS_NS16550_COM2 SUNXI_UART1_BASE
29# define CFG_SYS_NS16550_COM3 SUNXI_UART2_BASE
30# define CFG_SYS_NS16550_COM4 SUNXI_UART3_BASE
31# define CFG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
Simon Glass66648982014-10-30 20:25:50 -060032#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010033
Paul Kocialkowskide05f942015-05-16 19:52:11 +020034/* CPU */
Paul Kocialkowskide05f942015-05-16 19:52:11 +020035
Hans de Goeded241ecf2015-05-19 22:12:31 +020036/*
37 * The DRAM Base differs between some models. We cannot use macros for the
38 * CONFIG_FOO defines which contain the DRAM base address since they end
39 * up unexpanded in include/autoconf.mk .
40 *
41 * So we have to have this #ifdef #else #endif block for these.
42 */
43#ifdef CONFIG_MACH_SUN9I
44#define SDRAM_OFFSET(x) 0x2##x
Tom Rinibb4dd962022-11-16 13:10:37 -050045#define CFG_SYS_SDRAM_BASE 0x20000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050046#elif defined(CONFIG_MACH_SUNIV)
47#define SDRAM_OFFSET(x) 0x8##x
Tom Rinibb4dd962022-11-16 13:10:37 -050048#define CFG_SYS_SDRAM_BASE 0x80000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020049#else
50#define SDRAM_OFFSET(x) 0x4##x
Tom Rinibb4dd962022-11-16 13:10:37 -050051#define CFG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080052/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goeded241ecf2015-05-19 22:12:31 +020053#endif
54
Hans de Goede0b95a282015-05-20 15:27:16 +020055/*
56 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
57 * slightly bigger. Note that it is possible to map the first 32 KiB of the
58 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
59 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
60 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080061 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
62 * is known yet.
63 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020064 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050065#define CFG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080066/* FIXME: this may be larger on some SoCs */
Tom Rini6a5dccc2022-11-16 13:10:41 -050067#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010068
Tom Rinibb4dd962022-11-16 13:10:37 -050069#define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE
Ian Campbell6efe3692014-05-05 11:52:26 +010070#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
71
Ian Campbell6efe3692014-05-05 11:52:26 +010072/*
73 * Miscellaneous configurable options
74 */
Ian Campbell6efe3692014-05-05 11:52:26 +010075
Ian Campbell6efe3692014-05-05 11:52:26 +010076/* FLASH and environment organization */
77
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080078/*
79 * We cannot use expressions here, because expressions won't be evaluated in
80 * autoconf.mk.
81 */
82#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Andre Przywaracced7482017-04-26 01:32:42 +010083#ifdef CONFIG_ARM64
84/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
85#define LOW_LEVEL_SRAM_STACK 0x00054000
86#else
Andre Przywarade454ec2017-02-16 01:20:23 +000087#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +010088#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +080089#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +010090#ifdef CONFIG_MACH_SUN50I_H616
Jernej Skrabece638e052021-01-11 21:11:46 +010091#define LOW_LEVEL_SRAM_STACK 0x58000
92#else
Icenowy Zheng73210762018-07-21 16:20:24 +080093/* end of SRAM A2 on H6 for now */
94#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +010095#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +020096#else
Andre Przywarade454ec2017-02-16 01:20:23 +000097#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +020098#endif
Ian Campbell140d8322014-05-05 11:52:30 +010099
Hans de Goede73d7d422014-06-09 11:37:00 +0200100/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200101
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100102#ifdef CONFIG_ARM64
103/*
104 * Boards seem to come with at least 512MB of DRAM.
105 * The kernel should go at 512K, which is the default text offset (that will
106 * be adjusted at runtime if needed).
107 * There is no compression for arm64 kernels (yet), so leave some space
108 * for really big kernels, say 256MB for now.
109 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100110 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100111#define BOOTM_SIZE __stringify(0xa000000)
112#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100113#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
114#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100115#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
116#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
117#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
118#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
119#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100120
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100121#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256)
122/*
123 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
124 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
125 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
126 */
127#define BOOTM_SIZE __stringify(0xa000000)
128#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
129#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
130#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
131#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
132#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
133#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
134
135#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500136/*
137 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
138 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
139 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
140 */
141#define BOOTM_SIZE __stringify(0x2e00000)
142#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
143#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
144#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
145#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
146#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
147#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
148
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100149#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500150/*
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100151 * 32M RAM minus 2.5MB for u-boot, heap, stack, etc.
152 * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script,
153 * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB)
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500154 */
155#define BOOTM_SIZE __stringify(0x1700000)
Andre Przywara7bf64ec2022-10-06 18:16:34 +0100156#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
157#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000))
158#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000))
159#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000))
160#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000))
161#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000))
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500162
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100163#else
Andre Przywaraa2860fb2022-07-03 00:47:20 +0100164#error Need at least 32MB of DRAM. Please adjust load addresses.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100165#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200166
Hans de Goede2f60c312014-08-01 09:37:58 +0200167#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800168 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200169 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
170 "fdt_addr_r=" FDT_ADDR_R "\0" \
171 "scriptaddr=" SCRIPT_ADDR_R "\0" \
172 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100173 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200174 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
175
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100176#ifdef CONFIG_ARM64
177
178#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
179 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
180 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
181
182#else
183
184#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
185
186#endif
187
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200188#define DFU_ALT_INFO_RAM \
189 "dfu_alt_info_ram=" \
190 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
191 "fdt ram " FDT_ADDR_R " 0x100000;" \
192 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200193
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800194#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100195#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200196#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
197 BOOTENV_DEV_MMC(MMC, mmc, 0) \
198 BOOTENV_DEV_MMC(MMC, mmc, 1) \
199 "bootcmd_mmc_auto=" \
200 "if test ${mmc_bootdev} -eq 1; then " \
201 "run bootcmd_mmc1; " \
202 "run bootcmd_mmc0; " \
203 "elif test ${mmc_bootdev} -eq 0; then " \
204 "run bootcmd_mmc0; " \
205 "run bootcmd_mmc1; " \
206 "fi\0"
207
208#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
209 "mmc_auto "
210
211#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100212#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200213#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100214#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800215#else
216#define BOOT_TARGET_DEVICES_MMC(func)
217#endif
218
Hans de Goede6f2da072014-07-31 23:04:45 +0200219#ifdef CONFIG_AHCI
220#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
221#else
222#define BOOT_TARGET_DEVICES_SCSI(func)
223#endif
224
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200225#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800226#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
227#else
228#define BOOT_TARGET_DEVICES_USB(func)
229#endif
230
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100231#ifdef CONFIG_CMD_PXE
232#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
233#else
234#define BOOT_TARGET_DEVICES_PXE(func)
235#endif
236
237#ifdef CONFIG_CMD_DHCP
238#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
239#else
240#define BOOT_TARGET_DEVICES_DHCP(func)
241#endif
242
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200243/* FEL boot support, auto-execute boot.scr if a script address was provided */
244#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
245 "bootcmd_fel=" \
246 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
247 "echo '(FEL boot)'; " \
248 "source ${fel_scriptaddr}; " \
249 "fi\0"
250#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
251 "fel "
252
Hans de Goede6f2da072014-07-31 23:04:45 +0200253#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200254 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800255 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200256 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800257 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100258 BOOT_TARGET_DEVICES_PXE(func) \
259 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200260
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100261#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
262#define BOOTCMD_SUNXI_COMPAT \
263 "bootcmd_sunxi_compat=" \
264 "setenv root /dev/mmcblk0p3 rootwait; " \
265 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
266 "echo Loaded environment from uEnv.txt; " \
267 "env import -t 0x44000000 ${filesize}; " \
268 "fi; " \
269 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
270 "ext2load mmc 0 0x43000000 script.bin && " \
271 "ext2load mmc 0 0x48000000 uImage && " \
272 "bootm 0x48000000\0"
273#else
274#define BOOTCMD_SUNXI_COMPAT
275#endif
276
Hans de Goede6f2da072014-07-31 23:04:45 +0200277#include <config_distro_bootcmd.h>
278
Hans de Goede16030822014-09-18 21:03:34 +0200279#ifdef CONFIG_USB_KEYBOARD
280#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200281 "stdin=serial,usbkbd\0"
282#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200283#define CONSOLE_STDIN_SETTINGS \
284 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200285#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200286
Simon Glass52cb5042022-10-18 07:46:31 -0600287#ifdef CONFIG_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200288#define CONSOLE_STDOUT_SETTINGS \
289 "stdout=serial,vidconsole\0" \
290 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200291#else
292#define CONSOLE_STDOUT_SETTINGS \
293 "stdout=serial\0" \
294 "stderr=serial\0"
295#endif
296
Maxime Ripard32c544d2017-11-14 21:24:00 +0100297#define PARTS_DEFAULT \
298 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
299 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
300 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
301 "name=system,size=-,uuid=${uuid_gpt_system};"
302
303#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
304
305#ifdef CONFIG_ARM64
306#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
307#else
308#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
309#endif
310
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200311#define CONSOLE_ENV_SETTINGS \
312 CONSOLE_STDIN_SETTINGS \
313 CONSOLE_STDOUT_SETTINGS
314
Andreas Färber26f00d22017-04-14 18:44:47 +0200315#ifdef CONFIG_ARM64
316#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
317#else
318#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
319#endif
320
Tom Rinic9edebe2022-12-04 10:03:50 -0500321#define CFG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200322 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200323 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100324 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200325 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200326 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200327 "console=ttyS0,115200\0" \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100328 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
329 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
330 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100331 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200332 BOOTENV
333
Ian Campbell6efe3692014-05-05 11:52:26 +0100334#endif /* _SUNXI_COMMON_CONFIG_H */