blob: 7d5598e1a3a44fa82500026190f48239310bdcbf [file] [log] [blame]
Ley Foon Tan4eadafc22018-05-24 00:17:29 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
4 *
5 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Ley Foon Tan4eadafc22018-05-24 00:17:29 +08009#include <asm/io.h>
10#include <asm/arch/timer.h>
11
12/*
13 * Timer initialization
14 */
15int timer_init(void)
16{
Chee Hong Ang92dc7ae2020-07-10 23:53:13 +080017#ifdef CONFIG_SPL_BUILD
Ley Foon Tan4eadafc22018-05-24 00:17:29 +080018 int enable = 0x3; /* timer enable + output signal masked */
19 int loadval = ~0;
20
21 /* enable system counter */
22 writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS);
23 /* enable processor pysical counter */
24 asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable));
25 asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval));
Chee Hong Ang92dc7ae2020-07-10 23:53:13 +080026#endif
Ley Foon Tan4eadafc22018-05-24 00:17:29 +080027 return 0;
28}