blob: 3ad98bdb251d0c1f88498ae65f247711b3825c9c [file] [log] [blame]
Ley Foon Tan4eadafc22018-05-24 00:17:29 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
4 *
5 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Ley Foon Tan4eadafc22018-05-24 00:17:29 +08009#include <asm/io.h>
10#include <asm/arch/timer.h>
11
12/*
13 * Timer initialization
14 */
15int timer_init(void)
16{
17 int enable = 0x3; /* timer enable + output signal masked */
18 int loadval = ~0;
19
20 /* enable system counter */
21 writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS);
22 /* enable processor pysical counter */
23 asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable));
24 asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval));
25
26 return 0;
27}