| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Gateworks Corporation | ||||
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 4 | */ |
| 5 | |||||
| 6 | #ifndef __CONFIG_H | ||||
| 7 | #define __CONFIG_H | ||||
| 8 | |||||
| 9 | #include "mx6_common.h" | ||||
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 10 | |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 11 | /* Serial */ |
| Tom Rini | a17aa19 | 2022-12-04 10:04:55 -0500 | [diff] [blame] | 12 | #define CFG_MXC_UART_BASE UART2_BASE |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 13 | |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 14 | /* MMC Configs */ |
| Tom Rini | 376b88a | 2022-10-28 20:27:13 -0400 | [diff] [blame] | 15 | #define CFG_SYS_FSL_ESDHC_ADDR 0 |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 16 | |
| Fabio Estevam | f5b11fa | 2024-08-16 00:22:17 -0300 | [diff] [blame] | 17 | /* PMIC */ |
| Tom Rini | f52f907 | 2022-12-04 10:13:35 -0500 | [diff] [blame] | 18 | #define CFG_POWER_PFUZE100_I2C_ADDR 0x08 |
| Tom Rini | 6e4344e | 2022-12-04 10:13:34 -0500 | [diff] [blame] | 19 | #define CFG_POWER_LTC3676_I2C_ADDR 0x3c |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 20 | |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 21 | /* USB Configs */ |
| Tom Rini | b9796e8 | 2022-12-04 10:04:56 -0500 | [diff] [blame] | 22 | #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 23 | #define CFG_MXC_USB_FLAGS 0 | ||||
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 24 | |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 25 | /* Physical Memory Map */ |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 26 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 27 | #define CFG_SYS_SDRAM_BASE PHYS_SDRAM |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 28 | #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 29 | #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE | ||||
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 30 | |
| Tim Harvey | 552c358 | 2014-03-06 07:46:30 -0800 | [diff] [blame] | 31 | #endif /* __CONFIG_H */ |