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git01.mediatek.com / filogic / uboot / b9796e8f106428be048f62872c349a16f3d2729f / . / include / configs / gw_ventana.h
blob: 0a9dfe736f7d8731e984ebbce8c284d50e820890 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]2/*
3 * Copyright (C) 2013 Gateworks Corporation
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]4 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
Tim Harveybfa2dae2014-06-02 16:13:27 -0700[diff] [blame]9/* SPL */
Tim Harveybfa2dae2014-06-02 16:13:27 -0700[diff] [blame]10/* Location in NAND to read U-Boot from */
Tim Harveybfa2dae2014-06-02 16:13:27 -0700[diff] [blame]11
Tim Harveyfdb5afa2015-05-08 18:28:42 -0700[diff] [blame]12/* Falcon Mode */
Tim Harveyfdb5afa2015-05-08 18:28:42 -0700[diff] [blame]13
Tim Harveyfdb5afa2015-05-08 18:28:42 -0700[diff] [blame]14/* Falcon Mode - MMC support: args@1MB kernel@2MB */
Tim Harveyfdb5afa2015-05-08 18:28:42 -0700[diff] [blame]15
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]16#include "mx6_common.h"
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]17
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]18/* Serial */
Tom Rinia17aa192022-12-04 10:04:55 -0500[diff] [blame]19#define CFG_MXC_UART_BASE UART2_BASE
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]20
Tim Harvey8da219f2021-03-01 14:33:36 -0800[diff] [blame]21/* NAND */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]22
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]23/* MMC Configs */
Tom Rini376b88a2022-10-28 20:27:13 -0400[diff] [blame]24#define CFG_SYS_FSL_ESDHC_ADDR 0
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]25
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]26/*
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]27 * PCI express
28 */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]29
30/*
31 * PMIC
32 */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]33#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
Tim Harvey0dff16f2014-05-05 08:22:25 -0700[diff] [blame]34#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]35
36/* Various command support */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]37
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]38/* USB Configs */
Tom Rinib9796e82022-12-04 10:04:56 -0500[diff] [blame^]39#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
40#define CFG_MXC_USB_FLAGS 0
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]41
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]42/* Miscellaneous configurable options */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]43
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]44/* Memory configuration */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]45
46/* Physical Memory Map */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]47#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
Tom Rinibb4dd962022-11-16 13:10:37 -0500[diff] [blame]48#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]49#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
50#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]51
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]52/*
53 * MTD Command for mtdparts
54 */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]55
56/* Persistent Environment Config */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]57
58/* Environment */
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]59
Tim Harvey552c3582014-03-06 07:46:30 -0800[diff] [blame]60#endif /* __CONFIG_H */