Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | dd6ab88 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2013 Google, Inc |
| 4 | * |
| 5 | * (C) Copyright 2012 |
| 6 | * Pavel Herrmann <morpheus.ibis@gmail.com> |
Simon Glass | dd6ab88 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _DM_UCLASS_ID_H |
| 10 | #define _DM_UCLASS_ID_H |
| 11 | |
| 12 | /* TODO(sjg@chromium.org): this could be compile-time generated */ |
| 13 | enum uclass_id { |
| 14 | /* These are used internally by driver model */ |
| 15 | UCLASS_ROOT = 0, |
| 16 | UCLASS_DEMO, |
| 17 | UCLASS_TEST, |
| 18 | UCLASS_TEST_FDT, |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 19 | UCLASS_TEST_BUS, |
Simon Glass | 9c433fe | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 20 | UCLASS_TEST_PROBE, |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 21 | UCLASS_TEST_DUMMY, |
Simon Glass | 204675c | 2019-12-29 21:19:25 -0700 | [diff] [blame] | 22 | UCLASS_TEST_DEVRES, |
Simon Glass | 2d67fdf | 2020-04-08 16:57:34 -0600 | [diff] [blame] | 23 | UCLASS_TEST_ACPI, |
Simon Glass | 10a4a33 | 2014-10-13 23:41:53 -0600 | [diff] [blame] | 24 | UCLASS_SPI_EMUL, /* sandbox SPI device emulator */ |
Simon Glass | daa5470 | 2014-12-10 08:55:49 -0700 | [diff] [blame] | 25 | UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ |
Simon Glass | 4b0ecc6 | 2018-11-18 08:14:33 -0700 | [diff] [blame] | 26 | UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */ |
Simon Glass | d9e90bb | 2015-03-05 12:25:28 -0700 | [diff] [blame] | 27 | UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 28 | UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */ |
Simon Glass | 59d66d2 | 2015-03-25 12:22:37 -0600 | [diff] [blame] | 29 | UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ |
Mario Six | f95104d | 2018-08-09 14:51:18 +0200 | [diff] [blame] | 30 | UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ |
Simon Glass | dd6ab88 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 31 | |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 32 | /* U-Boot uclasses start here - in alphabetical order */ |
Simon Glass | 5e5c0cd | 2019-12-06 21:41:53 -0700 | [diff] [blame] | 33 | UCLASS_ACPI_PMC, /* (x86) Power-management controller (PMC) */ |
Przemyslaw Marczak | e0cb85b | 2015-10-27 13:08:00 +0100 | [diff] [blame] | 34 | UCLASS_ADC, /* Analog-to-digital converter */ |
Simon Glass | 85ee165 | 2016-05-01 11:35:52 -0600 | [diff] [blame] | 35 | UCLASS_AHCI, /* SATA disk controller */ |
Simon Glass | ed96cde | 2018-12-10 10:37:33 -0700 | [diff] [blame] | 36 | UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */ |
Philipp Tomsich | 872f454 | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 37 | UCLASS_AXI, /* AXI bus */ |
Simon Glass | cceee55 | 2016-02-29 15:25:55 -0700 | [diff] [blame] | 38 | UCLASS_BLK, /* Block device */ |
Mario Six | 2161e55 | 2018-07-31 11:44:11 +0200 | [diff] [blame] | 39 | UCLASS_BOARD, /* Device information from hardware */ |
Philipp Tomsich | ce86031 | 2018-11-27 23:00:18 +0100 | [diff] [blame] | 40 | UCLASS_BOOTCOUNT, /* Bootcount backing store */ |
Dinh Nguyen | d94e18e | 2019-04-23 16:55:03 -0500 | [diff] [blame] | 41 | UCLASS_CACHE, /* Cache controller */ |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 42 | UCLASS_CLK, /* Clock source, e.g. used by peripherals */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 43 | UCLASS_CPU, /* CPU, typically part of an SoC */ |
| 44 | UCLASS_CROS_EC, /* Chrome OS EC */ |
Simon Glass | 7d3d776 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 45 | UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ |
Yannick Fertré | 9712c82 | 2019-10-07 15:29:05 +0200 | [diff] [blame] | 46 | UCLASS_DSI_HOST, /* Display Serial Interface host */ |
Mugunthan V N | 8c3c918 | 2016-02-15 15:31:37 +0530 | [diff] [blame] | 47 | UCLASS_DMA, /* Direct Memory Access */ |
Heinrich Schuchardt | 11206f4 | 2018-01-21 19:29:30 +0100 | [diff] [blame] | 48 | UCLASS_EFI, /* EFI managed devices */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 49 | UCLASS_ETH, /* Ethernet device */ |
Ye Li | cd5bb77 | 2020-05-03 22:41:14 +0800 | [diff] [blame] | 50 | UCLASS_ETH_PHY, /* Ethernet PHY device */ |
Philipp Tomsich | 872f454 | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 51 | UCLASS_FIRMWARE, /* Firmware */ |
Tien Fong Chee | 5ca878b | 2018-07-06 16:28:03 +0800 | [diff] [blame] | 52 | UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ |
Simon Glass | cebcebb | 2014-07-23 06:55:17 -0600 | [diff] [blame] | 53 | UCLASS_GPIO, /* Bank of general-purpose I/O pins */ |
Benjamin Gaignard | a550b54 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 54 | UCLASS_HWSPINLOCK, /* Hardware semaphores */ |
Simon Glass | c7a5890 | 2014-12-10 08:55:47 -0700 | [diff] [blame] | 55 | UCLASS_I2C, /* I2C bus */ |
Simon Glass | 6ca4ba0 | 2014-12-10 08:55:54 -0700 | [diff] [blame] | 56 | UCLASS_I2C_EEPROM, /* I2C EEPROM device */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 57 | UCLASS_I2C_GENERIC, /* Generic I2C device */ |
Simon Glass | 2a80c40 | 2015-08-03 08:19:21 -0600 | [diff] [blame] | 58 | UCLASS_I2C_MUX, /* I2C multiplexer */ |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 59 | UCLASS_I2S, /* I2S bus */ |
Bin Meng | b650afa | 2017-09-10 05:12:51 -0700 | [diff] [blame] | 60 | UCLASS_IDE, /* IDE device */ |
Simon Glass | 18a8e09 | 2016-01-19 21:32:25 -0700 | [diff] [blame] | 61 | UCLASS_IRQ, /* Interrupt controller */ |
Simon Glass | 02f0c28 | 2015-09-08 11:15:11 -0600 | [diff] [blame] | 62 | UCLASS_KEYBOARD, /* Keyboard input device */ |
Simon Glass | cce3aed | 2015-06-23 15:38:45 -0600 | [diff] [blame] | 63 | UCLASS_LED, /* Light-emitting diode (LED) */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 64 | UCLASS_LPC, /* x86 'low pin count' interface */ |
Stephen Warren | d010783 | 2016-05-13 15:50:29 -0600 | [diff] [blame] | 65 | UCLASS_MAILBOX, /* Mailbox controller */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 66 | UCLASS_MASS_STORAGE, /* Mass storage device */ |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 67 | UCLASS_MDIO, /* MDIO bus */ |
Alex Marginean | ab8c2a5 | 2019-07-12 10:13:50 +0300 | [diff] [blame] | 68 | UCLASS_MDIO_MUX, /* MDIO MUX/switch */ |
Thomas Chou | b1ed686 | 2015-10-07 20:20:51 +0800 | [diff] [blame] | 69 | UCLASS_MISC, /* Miscellaneous device */ |
Simon Glass | 1e8eb1b | 2015-06-23 15:38:48 -0600 | [diff] [blame] | 70 | UCLASS_MMC, /* SD / MMC card or chip */ |
Ruchika Gupta | 98ebb12 | 2015-01-23 16:01:52 +0530 | [diff] [blame] | 71 | UCLASS_MOD_EXP, /* RSA Mod Exp device */ |
Thomas Chou | e51b65e | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 72 | UCLASS_MTD, /* Memory Technology Device (MTD) device */ |
Jean-Jacques Hiblot | db97c7f | 2019-07-05 09:33:57 +0200 | [diff] [blame] | 73 | UCLASS_NOP, /* No-op devices */ |
Simon Glass | 29ce97e | 2016-01-17 16:11:14 -0700 | [diff] [blame] | 74 | UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ |
Zhikang Zhang | 182fccd | 2017-08-03 02:30:56 -0700 | [diff] [blame] | 75 | UCLASS_NVME, /* NVM Express device */ |
Simon Glass | 2ee1f6a | 2019-12-06 21:41:55 -0700 | [diff] [blame] | 76 | UCLASS_P2SB, /* (x86) Primary-to-Sideband Bus */ |
Simon Glass | 14d1c8e | 2016-01-21 19:44:58 -0700 | [diff] [blame] | 77 | UCLASS_PANEL, /* Display panel, such as an LCD */ |
Simon Glass | 8f79048 | 2016-01-21 19:44:56 -0700 | [diff] [blame] | 78 | UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 79 | UCLASS_PCH, /* x86 platform controller hub */ |
Simon Glass | b94dc89 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 80 | UCLASS_PCI, /* PCI bus */ |
Ramon Fried | 663686d | 2019-04-27 11:15:21 +0300 | [diff] [blame] | 81 | UCLASS_PCI_EP, /* PCI endpoint device */ |
Simon Glass | b94dc89 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 82 | UCLASS_PCI_GENERIC, /* Generic PCI bus device */ |
Jean-Jacques Hiblot | 4844778 | 2017-04-24 11:51:27 +0200 | [diff] [blame] | 83 | UCLASS_PHY, /* Physical Layer (PHY) device */ |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 84 | UCLASS_PINCONFIG, /* Pin configuration node device */ |
Bin Meng | 1cc7ecd | 2016-06-22 02:29:47 -0700 | [diff] [blame] | 85 | UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */ |
Simon Glass | 682ae86 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 86 | UCLASS_PMIC, /* PMIC I/O device */ |
Stephen Warren | 92c67fa | 2016-07-13 13:45:31 -0600 | [diff] [blame] | 87 | UCLASS_POWER_DOMAIN, /* (SoC) Power domains */ |
Philipp Tomsich | 872f454 | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 88 | UCLASS_PWM, /* Pulse-width modulator */ |
Simon Glass | c979517 | 2016-01-21 19:43:31 -0700 | [diff] [blame] | 89 | UCLASS_PWRSEQ, /* Power sequence device */ |
Bin Meng | 1cc7ecd | 2016-06-22 02:29:47 -0700 | [diff] [blame] | 90 | UCLASS_RAM, /* RAM controller */ |
Simon Glass | 682ae86 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 91 | UCLASS_REGULATOR, /* Regulator device */ |
Nishanth Menon | 08b9dc2 | 2015-09-17 15:42:39 -0500 | [diff] [blame] | 92 | UCLASS_REMOTEPROC, /* Remote Processor device */ |
Stephen Warren | 185ad87 | 2016-06-17 09:43:58 -0600 | [diff] [blame] | 93 | UCLASS_RESET, /* Reset controller device */ |
Sughosh Ganu | 90592ed | 2019-12-28 23:58:27 +0530 | [diff] [blame] | 94 | UCLASS_RNG, /* Random Number Generator */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 95 | UCLASS_RTC, /* Real time clock device */ |
Michal Simek | c886f35 | 2016-09-08 15:06:45 +0200 | [diff] [blame] | 96 | UCLASS_SCSI, /* SCSI device */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 97 | UCLASS_SERIAL, /* Serial UART */ |
Simon Glass | 78df8b4 | 2018-11-18 08:14:32 -0700 | [diff] [blame] | 98 | UCLASS_SIMPLE_BUS, /* Bus with child devices */ |
Ramon Fried | cf1e49f | 2018-07-02 02:57:55 +0300 | [diff] [blame] | 99 | UCLASS_SMEM, /* Shared memory interface */ |
Simon Glass | 76072ac | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 100 | UCLASS_SOUND, /* Playing simple sounds */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 101 | UCLASS_SPI, /* SPI bus */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 102 | UCLASS_SPI_FLASH, /* SPI flash */ |
Simon Glass | 682ae86 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 103 | UCLASS_SPI_GENERIC, /* Generic SPI flash target */ |
Philipp Tomsich | 872f454 | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 104 | UCLASS_SPMI, /* System Power Management Interface bus */ |
Simon Glass | 6a84aaf | 2015-06-23 15:38:43 -0600 | [diff] [blame] | 105 | UCLASS_SYSCON, /* System configuration device */ |
Stephen Warren | 859f256 | 2016-05-12 12:03:35 -0600 | [diff] [blame] | 106 | UCLASS_SYSRESET, /* System reset device */ |
Jens Wiklander | 1429044 | 2018-09-25 16:40:09 +0200 | [diff] [blame] | 107 | UCLASS_TEE, /* Trusted Execution Environment device */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 108 | UCLASS_THERMAL, /* Thermal sensor */ |
Thomas Chou | fb798b1 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 109 | UCLASS_TIMER, /* Timer device */ |
Simon Glass | 6c7a232 | 2015-08-22 18:31:31 -0600 | [diff] [blame] | 110 | UCLASS_TPM, /* Trusted Platform Module TIS interface */ |
Faiz Abbas | 5cc5107 | 2019-10-15 18:24:36 +0530 | [diff] [blame] | 111 | UCLASS_UFS, /* Universal Flash Storage */ |
Simon Glass | 9b82eeb | 2015-03-25 12:21:59 -0600 | [diff] [blame] | 112 | UCLASS_USB, /* USB bus */ |
Simon Glass | c79173e | 2015-03-25 12:22:31 -0600 | [diff] [blame] | 113 | UCLASS_USB_DEV_GENERIC, /* USB generic device */ |
Simon Glass | 10d8904f | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 114 | UCLASS_USB_HUB, /* USB hub */ |
Jean-Jacques Hiblot | 9dc0d5c | 2018-11-29 10:52:46 +0100 | [diff] [blame] | 115 | UCLASS_USB_GADGET_GENERIC, /* USB generic device */ |
Simon Glass | 623d28f | 2016-01-18 19:52:15 -0700 | [diff] [blame] | 116 | UCLASS_VIDEO, /* Video or LCD device */ |
Simon Glass | 7cf1757 | 2015-07-02 18:16:08 -0600 | [diff] [blame] | 117 | UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ |
Simon Glass | 84c7fb3 | 2016-01-18 19:52:17 -0700 | [diff] [blame] | 118 | UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ |
Mario Six | 1b77320 | 2018-09-27 09:19:29 +0200 | [diff] [blame] | 119 | UCLASS_VIDEO_OSD, /* On-screen display */ |
Bin Meng | db7ca2e | 2018-10-15 02:21:00 -0700 | [diff] [blame] | 120 | UCLASS_VIRTIO, /* VirtIO transport device */ |
Maxime Ripard | bdbdca3 | 2018-09-18 10:35:24 +0300 | [diff] [blame] | 121 | UCLASS_W1, /* Dallas 1-Wire bus */ |
Maxime Ripard | f674fc0 | 2018-09-18 10:35:27 +0300 | [diff] [blame] | 122 | UCLASS_W1_EEPROM, /* one-wire EEPROMs */ |
Chris Packham | f5c9811 | 2019-02-18 08:48:04 +1300 | [diff] [blame] | 123 | UCLASS_WDT, /* Watchdog Timer driver */ |
Simon Glass | dd6ab88 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 124 | |
Simon Glass | dd6ab88 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 125 | UCLASS_COUNT, |
| 126 | UCLASS_INVALID = -1, |
| 127 | }; |
| 128 | |
| 129 | #endif |