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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
5
6#include <config.h>
7#include <common.h>
Patrick Delaunayf2f25c32020-05-25 12:19:46 +02008#include <init.h>
Patrick Delaunay79c07912020-05-25 12:19:49 +02009#include <asm/io.h>
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020010#include <asm/arch/sys_proto.h>
Patrick Delaunay79c07912020-05-25 12:19:49 +020011#include <linux/bitops.h>
12#include <linux/delay.h>
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020013#include "../common/stpmic1.h"
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010014
Patrick Delaunay08c891a2020-05-25 12:19:47 +020015/* board early initialisation in board_f: need to use global variable */
16static u32 opp_voltage_mv __section(".data");
17
18void board_vddcore_init(u32 voltage_mv)
19{
Simon Glasse91ac4c2021-07-10 21:14:24 -060020 if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
Patrick Delaunay08c891a2020-05-25 12:19:47 +020021 opp_voltage_mv = voltage_mv;
22}
23
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020024int board_early_init_f(void)
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010025{
Simon Glasse91ac4c2021-07-10 21:14:24 -060026 if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
Patrick Delaunay08c891a2020-05-25 12:19:47 +020027 stpmic1_init(opp_voltage_mv);
Patrick Delaunaybff284f2019-07-30 19:16:20 +020028
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020029 return 0;
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010030}
Patrick Delaunay79c07912020-05-25 12:19:49 +020031
32#ifdef CONFIG_DEBUG_UART_BOARD_INIT
33void board_debug_uart_init(void)
34{
35#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE)
36
37#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
38#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
39
40 /* UART4 clock enable */
41 setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
42
43#define GPIOG_BASE 0x50008000
44 /* GPIOG clock enable */
45 writel(BIT(6), RCC_MP_AHB4ENSETR);
46 /* GPIO configuration for ST boards: Uart4 TX = G11 */
47 writel(0xffbfffff, GPIOG_BASE + 0x00);
48 writel(0x00006000, GPIOG_BASE + 0x24);
49#else
50
51#error("CONFIG_DEBUG_UART_BASE: not supported value")
52
53#endif
54}
55#endif