Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 Freescale Semiconductor |
Yangbo Lu | bb32e68 | 2021-06-03 10:51:19 +0800 | [diff] [blame] | 4 | * Copyright 2019-2021 NXP |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __LS1046A_COMMON_H |
| 8 | #define __LS1046A_COMMON_H |
| 9 | |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 10 | /* SPL build */ |
| 11 | #ifdef CONFIG_SPL_BUILD |
| 12 | #define SPL_NO_QBMAN |
| 13 | #define SPL_NO_FMAN |
| 14 | #define SPL_NO_ENV |
| 15 | #define SPL_NO_MISC |
| 16 | #define SPL_NO_QSPI |
| 17 | #define SPL_NO_USB |
| 18 | #define SPL_NO_SATA |
| 19 | #endif |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 20 | #if defined(CONFIG_SPL_BUILD) && \ |
| 21 | (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 22 | #define SPL_NO_MMC |
| 23 | #endif |
York Sun | c5c8e1e | 2018-06-08 16:37:27 -0700 | [diff] [blame] | 24 | #if defined(CONFIG_SPL_BUILD) && \ |
York Sun | c5c8e1e | 2018-06-08 16:37:27 -0700 | [diff] [blame] | 25 | !defined(CONFIG_SPL_FSL_LS_PPA) |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 26 | #define SPL_NO_IFC |
| 27 | #endif |
| 28 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 29 | #define CONFIG_REMAKE_ELF |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 30 | |
| 31 | #include <asm/arch/config.h> |
Bharat Bhushan | c882dd7 | 2017-03-22 12:06:28 +0530 | [diff] [blame] | 32 | #include <asm/arch/stream_id_lsch2.h> |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 33 | |
| 34 | /* Link Definitions */ |
Rajesh Bhagat | cb6153b | 2018-11-05 18:02:36 +0000 | [diff] [blame] | 35 | #ifdef CONFIG_TFABOOT |
| 36 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE |
| 37 | #else |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 38 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) |
Rajesh Bhagat | cb6153b | 2018-11-05 18:02:36 +0000 | [diff] [blame] | 39 | #endif |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 40 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 41 | #define CONFIG_VERY_BIG_RAM |
| 42 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
| 43 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 |
| 44 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 45 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL |
| 46 | |
Michael Walle | f056e0f | 2020-06-01 21:53:26 +0200 | [diff] [blame] | 47 | #define CPU_RELEASE_ADDR secondary_boot_addr |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 48 | |
| 49 | /* Generic Timer Definitions */ |
| 50 | #define COUNTER_FREQUENCY 25000000 /* 25MHz */ |
| 51 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 52 | /* Serial Port */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 53 | #define CONFIG_SYS_NS16550_SERIAL |
| 54 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Hou Zhiqiang | 3f91cda | 2017-01-10 16:44:15 +0800 | [diff] [blame] | 55 | #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 56 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 57 | /* SD boot SPL */ |
| 58 | #ifdef CONFIG_SD_BOOT |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 59 | #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */ |
| 60 | #define CONFIG_SPL_STACK 0x10020000 |
| 61 | #define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */ |
| 62 | #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 |
| 63 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 64 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
| 65 | CONFIG_SPL_BSS_MAX_SIZE) |
| 66 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 67 | |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 68 | #ifdef CONFIG_NXP_ESBC |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 69 | #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) |
| 70 | /* |
| 71 | * HDR would be appended at end of image and copied to DDR along |
| 72 | * with U-Boot image. Here u-boot max. size is 512K. So if binary |
| 73 | * size increases then increase this size in case of secure boot as |
| 74 | * it uses raw u-boot image instead of fit image. |
| 75 | */ |
| 76 | #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) |
| 77 | #else |
| 78 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 79 | #endif /* ifdef CONFIG_NXP_ESBC */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 80 | #endif |
| 81 | |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 82 | #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) |
| 83 | #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 84 | #define CONFIG_SPL_MAX_SIZE 0x1f000 |
| 85 | #define CONFIG_SPL_STACK 0x10020000 |
| 86 | #define CONFIG_SPL_PAD_TO 0x20000 |
| 87 | #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 |
| 88 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 89 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
| 90 | CONFIG_SPL_BSS_MAX_SIZE) |
| 91 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 |
| 92 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 93 | #endif |
| 94 | |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 95 | /* NAND SPL */ |
| 96 | #ifdef CONFIG_NAND_BOOT |
| 97 | #define CONFIG_SPL_PBL_PAD |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 98 | |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 99 | #define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 100 | #define CONFIG_SPL_STACK 0x1001f000 |
| 101 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE |
| 102 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 103 | |
| 104 | #define CONFIG_SPL_BSS_START_ADDR 0x8f000000 |
| 105 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 106 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
| 107 | CONFIG_SPL_BSS_MAX_SIZE) |
| 108 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 |
| 109 | #define CONFIG_SYS_MONITOR_LEN 0xa0000 |
| 110 | #endif |
| 111 | |
Biwen Li | 479b9bd | 2021-02-05 19:02:01 +0800 | [diff] [blame] | 112 | /* GPIO */ |
Biwen Li | 479b9bd | 2021-02-05 19:02:01 +0800 | [diff] [blame] | 113 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 114 | /* I2C */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 115 | |
Hou Zhiqiang | 105457e | 2017-04-14 16:49:01 +0800 | [diff] [blame] | 116 | /* PCIe */ |
| 117 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
| 118 | #define CONFIG_PCIE2 /* PCIE controller 2 */ |
| 119 | #define CONFIG_PCIE3 /* PCIE controller 3 */ |
| 120 | |
| 121 | #ifdef CONFIG_PCI |
| 122 | #define CONFIG_PCI_SCAN_SHOW |
Hou Zhiqiang | 105457e | 2017-04-14 16:49:01 +0800 | [diff] [blame] | 123 | #endif |
| 124 | |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 125 | /* SATA */ |
| 126 | #ifndef SPL_NO_SATA |
| 127 | #define CONFIG_SCSI_AHCI_PLAT |
| 128 | |
| 129 | #define CONFIG_SYS_SATA AHCI_BASE_ADDR |
| 130 | |
| 131 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
| 132 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 133 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 134 | CONFIG_SYS_SCSI_MAX_LUN) |
| 135 | #endif |
| 136 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 137 | /* FMan ucode */ |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 138 | #ifndef SPL_NO_FMAN |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 139 | #define CONFIG_SYS_DPAA_FMAN |
| 140 | #ifdef CONFIG_SYS_DPAA_FMAN |
| 141 | #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 142 | #endif |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 143 | #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) |
| 144 | #endif |
| 145 | |
| 146 | /* Miscellaneous configurable options */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 147 | |
| 148 | #define CONFIG_HWCONFIG |
| 149 | #define HWCONFIG_BUFFER_SIZE 128 |
| 150 | |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 151 | #ifndef CONFIG_SPL_BUILD |
| 152 | #define BOOT_TARGET_DEVICES(func) \ |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 153 | func(SCSI, scsi, 0) \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 154 | func(MMC, mmc, 0) \ |
Mian Yousaf Kaukab | e172158 | 2019-01-29 16:38:37 +0100 | [diff] [blame] | 155 | func(USB, usb, 0) \ |
| 156 | func(DHCP, dhcp, na) |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 157 | #include <config_distro_bootcmd.h> |
| 158 | #endif |
| 159 | |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 160 | #if defined(CONFIG_TARGET_LS1046AFRWY) |
| 161 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 162 | "boot_scripts=ls1046afrwy_boot.scr\0" \ |
| 163 | "boot_script_hdr=hdr_ls1046afrwy_bs.out\0" |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 164 | #elif defined(CONFIG_TARGET_LS1046AQDS) |
| 165 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 166 | "boot_scripts=ls1046aqds_boot.scr\0" \ |
| 167 | "boot_script_hdr=hdr_ls1046aqds_bs.out\0" |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 168 | #else |
| 169 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 170 | "boot_scripts=ls1046ardb_boot.scr\0" \ |
| 171 | "boot_script_hdr=hdr_ls1046ardb_bs.out\0" |
| 172 | #endif |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 173 | #ifndef SPL_NO_MISC |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 174 | /* Initial environment variables */ |
| 175 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 176 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 177 | "ramdisk_addr=0x800000\0" \ |
| 178 | "ramdisk_size=0x2000000\0" \ |
Yuantian Tang | e1786d3 | 2020-02-19 17:02:22 +0800 | [diff] [blame] | 179 | "bootm_size=0x10000000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 180 | "fdt_addr=0x64f00000\0" \ |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 181 | "kernel_addr=0x61000000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 182 | "scriptaddr=0x80000000\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 183 | "scripthdraddr=0x80080000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 184 | "fdtheader_addr_r=0x80100000\0" \ |
| 185 | "kernelheader_addr_r=0x80200000\0" \ |
| 186 | "load_addr=0xa0000000\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 187 | "kernel_addr_r=0x81000000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 188 | "fdt_addr_r=0x90000000\0" \ |
| 189 | "ramdisk_addr_r=0xa0000000\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 190 | "kernel_start=0x1000000\0" \ |
Priyanka Singh | a83b8db | 2020-01-22 10:29:46 +0000 | [diff] [blame] | 191 | "kernelheader_start=0x600000\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 192 | "kernel_load=0xa0000000\0" \ |
| 193 | "kernel_size=0x2800000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 194 | "kernelheader_size=0x40000\0" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 195 | "kernel_addr_sd=0x8000\0" \ |
| 196 | "kernel_size_sd=0x14000\0" \ |
Priyanka Singh | a83b8db | 2020-01-22 10:29:46 +0000 | [diff] [blame] | 197 | "kernelhdr_addr_sd=0x3000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 198 | "kernelhdr_size_sd=0x10\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 199 | "console=ttyS0,115200\0" \ |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 200 | CONFIG_MTDPARTS_DEFAULT "\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 201 | BOOTENV \ |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 202 | LS1046A_BOOT_SRC_AND_HDR \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 203 | "scan_dev_for_boot_part=" \ |
| 204 | "part list ${devtype} ${devnum} devplist; " \ |
| 205 | "env exists devplist || setenv devplist 1; " \ |
| 206 | "for distro_bootpart in ${devplist}; do " \ |
| 207 | "if fstype ${devtype} " \ |
| 208 | "${devnum}:${distro_bootpart} " \ |
| 209 | "bootfstype; then " \ |
| 210 | "run scan_dev_for_boot; " \ |
| 211 | "fi; " \ |
| 212 | "done\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 213 | "boot_a_script=" \ |
| 214 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 215 | "${scriptaddr} ${prefix}${script}; " \ |
| 216 | "env exists secureboot && load ${devtype} " \ |
| 217 | "${devnum}:${distro_bootpart} " \ |
Vinitha V Pillai | 25355ec | 2019-04-23 05:52:17 +0000 | [diff] [blame] | 218 | "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ |
| 219 | "env exists secureboot " \ |
| 220 | "&& esbc_validate ${scripthdraddr};" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 221 | "source ${scriptaddr}\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 222 | "qspi_bootcmd=echo Trying load from qspi..;" \ |
| 223 | "sf probe && sf read $load_addr " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 224 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 225 | "&& sf read $kernelheader_addr_r $kernelheader_start " \ |
| 226 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 227 | "bootm $load_addr#$board\0" \ |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 228 | "nand_bootcmd=echo Trying load from nand..;" \ |
| 229 | "nand info; nand read $load_addr " \ |
| 230 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 231 | "&& nand read $kernelheader_addr_r $kernelheader_start " \ |
| 232 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 233 | "bootm $load_addr#$board\0" \ |
| 234 | "nor_bootcmd=echo Trying load from nor..;" \ |
| 235 | "cp.b $kernel_addr $load_addr " \ |
| 236 | "$kernel_size; env exists secureboot " \ |
| 237 | "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ |
| 238 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 239 | "bootm $load_addr#$board\0" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 240 | "sd_bootcmd=echo Trying load from SD ..;" \ |
| 241 | "mmcinfo; mmc read $load_addr " \ |
| 242 | "$kernel_addr_sd $kernel_size_sd && " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 243 | "env exists secureboot && mmc read $kernelheader_addr_r " \ |
| 244 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ |
| 245 | " && esbc_validate ${kernelheader_addr_r};" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 246 | "bootm $load_addr#$board\0" |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 247 | |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 248 | #endif |
| 249 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 250 | /* Monitor Command Prompt */ |
| 251 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 252 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 253 | #define CONFIG_SYS_MAXARGS 64 /* max command args */ |
| 254 | |
| 255 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
| 256 | |
Simon Glass | 89e0a3a | 2017-05-17 08:23:10 -0600 | [diff] [blame] | 257 | #include <asm/arch/soc.h> |
| 258 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 259 | #endif /* __LS1046A_COMMON_H */ |