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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
5 select CPU_V7
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02008 help
9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
10 including NEON and GPU, Mali-400 graphics, several DDR3 options
11 and video codec support. Peripherals include Gigabit Ethernet,
12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
13
Kever Yangaa827752017-11-28 16:04:16 +080014config ROCKCHIP_RK3128
15 bool "Support Rockchip RK3128"
16 select CPU_V7
17 help
18 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
19 including NEON and GPU, Mali-400 graphics, several DDR3 options
20 and video codec support. Peripherals include Gigabit Ethernet,
21 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
22
Heiko Stübneref6db5e2017-02-18 19:46:36 +010023config ROCKCHIP_RK3188
24 bool "Support Rockchip RK3188"
25 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080026 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010027 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010028 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020029 select SPL_CLK
30 select SPL_PINCTRL
31 select SPL_REGMAP
32 select SPL_SYSCON
33 select SPL_RAM
34 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020035 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020036 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010037 select ROCKCHIP_BROM_HELPER
38 help
39 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
40 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
41 video interfaces, several memory options and video codec support.
42 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
43 UART, SPI, I2C and PWMs.
44
Kever Yang57d4dbf2017-06-23 17:17:52 +080045config ROCKCHIP_RK322X
46 bool "Support Rockchip RK3228/RK3229"
47 select CPU_V7
48 select SUPPORT_SPL
49 select SPL
50 select ROCKCHIP_BROM_HELPER
51 select DEBUG_UART_BOARD_INIT
52 help
53 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
54 including NEON and GPU, Mali-400 graphics, several DDR3 options
55 and video codec support. Peripherals include Gigabit Ethernet,
56 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
57
Simon Glass2cffe662015-08-30 16:55:38 -060058config ROCKCHIP_RK3288
59 bool "Support Rockchip RK3288"
Andreas Färber6c427032016-07-14 05:09:26 +020060 select CPU_V7
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080061 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080062 select SUPPORT_SPL
63 select SPL
Eddie Caib3501fe2017-12-15 08:17:13 +080064 imply USB_FUNCTION_ROCKUSB
65 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060066 help
67 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
68 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
69 video interfaces supporting HDMI and eDP, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +010071 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -060072
Kever Yangec02b3c2017-02-23 15:37:51 +080073config ROCKCHIP_RK3328
74 bool "Support Rockchip RK3328"
75 select ARM64
76 help
77 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
78 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
79 video interfaces supporting HDMI and eDP, several DDR3 options
80 and video codec support. Peripherals include Gigabit Ethernet,
81 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
82
Andreas Färber9e3ad682017-05-15 17:51:18 +080083config ROCKCHIP_RK3368
84 bool "Support Rockchip RK3368"
85 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +020086 select SUPPORT_SPL
87 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +020088 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
89 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +020090 imply SPL_SEPARATE_BSS
91 imply SPL_SERIAL_SUPPORT
92 imply TPL_SERIAL_SUPPORT
Philipp Tomsich84af43e2017-06-11 23:46:25 +020093 select DEBUG_UART_BOARD_INIT
Andreas Färber9e3ad682017-05-15 17:51:18 +080094 select SYS_NS16550
95 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +020096 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
97 into a big and little cluster with 4 cores each) Cortex-A53 including
98 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
99 (for the little cluster), PowerVR G6110 based graphics, one video
100 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
101 video codec support.
102
103 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
104 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800105
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200106if ROCKCHIP_RK3368
107
108config TPL_LDSCRIPT
109 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
110
Philipp Tomsich7d1319b2017-07-28 20:20:41 +0200111config TPL_TEXT_BASE
112 default 0xff8c1000
113
114config TPL_MAX_SIZE
115 default 28672
116
117config TPL_STACK
118 default 0xff8cffff
119
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200120endif
121
Kever Yang0d3d7832016-07-19 21:16:59 +0800122config ROCKCHIP_RK3399
123 bool "Support Rockchip RK3399"
124 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800125 select SUPPORT_SPL
126 select SPL
127 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200128 select SPL_SERIAL_SUPPORT
129 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich41029e62017-04-01 12:59:25 +0200130 select DEBUG_UART_BOARD_INIT
Andy Yan70378cb2017-10-11 15:00:16 +0800131 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800132 select ROCKCHIP_BROM_HELPER
Kever Yang0d3d7832016-07-19 21:16:59 +0800133 help
134 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
135 and quad-core Cortex-A53.
136 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
137 video interfaces supporting HDMI and eDP, several DDR3 options
138 and video codec support. Peripherals include Gigabit Ethernet,
139 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
140
Andy Yan2d982da2017-06-01 18:00:55 +0800141config ROCKCHIP_RV1108
142 bool "Support Rockchip RV1108"
143 select CPU_V7
144 help
145 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
146 and a DSP.
147
Philipp Tomsich798370f2017-06-29 11:21:15 +0200148config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800149 bool "SPL returns to bootrom"
150 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100151 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200152 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800153 help
154 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
155 SPL will return to the boot rom, which will then load the U-Boot
156 binary to keep going on.
157
Philipp Tomsich798370f2017-06-29 11:21:15 +0200158config TPL_ROCKCHIP_BACK_TO_BROM
159 bool "TPL returns to bootrom"
160 default y if ROCKCHIP_RK3368
161 select ROCKCHIP_BROM_HELPER
162 depends on TPL
163 help
164 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
165 SPL will return to the boot rom, which will then load the U-Boot
166 binary to keep going on.
167
Andy Yan70378cb2017-10-11 15:00:16 +0800168config ROCKCHIP_BOOT_MODE_REG
169 hex "Rockchip boot mode flag register address"
170 default 0x200081c8 if ROCKCHIP_RK3036
171 default 0x20004040 if ROCKCHIP_RK3188
172 default 0x110005c8 if ROCKCHIP_RK322X
173 default 0xff730094 if ROCKCHIP_RK3288
174 default 0xff738200 if ROCKCHIP_RK3368
175 default 0xff320300 if ROCKCHIP_RK3399
176 default 0x10300580 if ROCKCHIP_RV1108
177 default 0
178 help
179 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
180 according to the value from this register.
181
Kever Yange484f772017-04-20 17:03:46 +0800182config ROCKCHIP_SPL_RESERVE_IRAM
183 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800184 default 0
Kever Yange484f772017-04-20 17:03:46 +0800185 help
186 SPL may need reserve memory for firmware loaded by SPL, whose load
187 address is in IRAM and may overlay with SPL text area if not
188 reserved.
189
Heiko Stübner355a8802017-02-18 19:46:25 +0100190config ROCKCHIP_BROM_HELPER
191 bool
192
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200193config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
194 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
195 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
196 help
197 Some Rockchip BROM variants (e.g. on the RK3188) load the
198 first stage in segments and enter multiple times. E.g. on
199 the RK3188, the first 1KB of the first stage are loaded
200 first and entered; after returning to the BROM, the
201 remainder of the first stage is loaded, but the BROM
202 re-enters at the same address/to the same code as previously.
203
204 This enables support code in the BOOT0 hook for the SPL stage
205 to allow multiple entries.
206
207config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
208 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
209 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
210 help
211 Some Rockchip BROM variants (e.g. on the RK3188) load the
212 first stage in segments and enter multiple times. E.g. on
213 the RK3188, the first 1KB of the first stage are loaded
214 first and entered; after returning to the BROM, the
215 remainder of the first stage is loaded, but the BROM
216 re-enters at the same address/to the same code as previously.
217
218 This enables support code in the BOOT0 hook for the TPL stage
219 to allow multiple entries.
220
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400221config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200222 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400223
huang lin1115b642015-11-17 14:20:27 +0800224source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800225source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100226source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800227source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200228source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800229source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800230source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800231source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800232source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600233endif