blob: 0c295e7fe28822dbd6386da06d0872a0d8ea55e4 [file] [log] [blame]
Dave Gerlach96571ec2021-04-23 11:27:32 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * AM642: SoC specific initialization
4 *
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 * Keerthy <j-keerthy@ti.com>
7 * Dave Gerlach <d-gerlach@ti.com>
8 */
9
10#include <common.h>
Aswath Govindraju70bc5e32021-06-04 22:00:33 +053011#include <fdt_support.h>
Dave Gerlach96571ec2021-04-23 11:27:32 -050012#include <spl.h>
13#include <asm/io.h>
Keerthy05d670e2021-04-23 11:27:33 -050014#include <asm/arch/hardware.h>
Andrew Davisf1799852023-04-06 11:38:16 -050015#include "sysfw-loader.h"
Dave Gerlach96571ec2021-04-23 11:27:32 -050016#include "common.h"
Dave Gerlach8e0689b2021-04-23 11:27:36 -050017#include <linux/soc/ti/ti_sci_protocol.h>
18#include <dm.h>
19#include <dm/uclass-internal.h>
20#include <dm/pinctrl.h>
Dave Gerlacha89f7a42021-04-23 11:27:37 -050021#include <mmc.h>
Lokesh Vutla17ad6e02021-05-06 16:44:52 +053022#include <dm/root.h>
Dave Gerlach96571ec2021-04-23 11:27:32 -050023
Hari Nagallad383c5e2022-03-09 14:42:30 -060024#define CTRLMMR_MCU_RST_CTRL 0x04518170
Dave Gerlach96571ec2021-04-23 11:27:32 -050025
Dave Gerlacheaef1292021-04-23 11:27:34 -050026static void ctrl_mmr_unlock(void)
27{
28 /* Unlock all PADCFG_MMR1 module registers */
29 mmr_unlock(PADCFG_MMR1_BASE, 1);
30
Hari Nagallad383c5e2022-03-09 14:42:30 -060031 /* Unlock all MCU_CTRL_MMR0 module registers */
32 mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
33 mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
34 mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
35 mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
36 mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
37 mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
38
Dave Gerlacheaef1292021-04-23 11:27:34 -050039 /* Unlock all CTRL_MMR0 module registers */
40 mmr_unlock(CTRL_MMR0_BASE, 0);
41 mmr_unlock(CTRL_MMR0_BASE, 1);
42 mmr_unlock(CTRL_MMR0_BASE, 2);
43 mmr_unlock(CTRL_MMR0_BASE, 3);
44 mmr_unlock(CTRL_MMR0_BASE, 5);
45 mmr_unlock(CTRL_MMR0_BASE, 6);
Christian Gmeiner33a9d8e2022-05-12 08:21:01 +020046
47 /* Unlock all MCU_PADCFG_MMR1 module registers */
48 mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
Dave Gerlacheaef1292021-04-23 11:27:34 -050049}
50
Dave Gerlachb27a9f22021-04-23 11:27:35 -050051/*
52 * This uninitialized global variable would normal end up in the .bss section,
53 * but the .bss is cleared between writing and reading this variable, so move
54 * it to the .data section.
55 */
56u32 bootindex __section(".data");
Marek BehĂșn4bebdd32021-05-20 13:23:52 +020057static struct rom_extended_boot_data bootdata __section(".data");
Dave Gerlachb27a9f22021-04-23 11:27:35 -050058
59static void store_boot_info_from_rom(void)
60{
61 bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
Bryan Brattlof270537c2022-11-22 13:28:11 -060062 memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
Dave Gerlachb27a9f22021-04-23 11:27:35 -050063 sizeof(struct rom_extended_boot_data));
64}
65
Dave Gerlacha89f7a42021-04-23 11:27:37 -050066#if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
67void k3_mmc_stop_clock(void)
68{
69 if (spl_boot_device() == BOOT_DEVICE_MMC1) {
70 struct mmc *mmc = find_mmc_device(0);
71
72 if (!mmc)
73 return;
74
75 mmc->saved_clock = mmc->clock;
76 mmc_set_clock(mmc, 0, true);
77 }
78}
79
80void k3_mmc_restart_clock(void)
81{
82 if (spl_boot_device() == BOOT_DEVICE_MMC1) {
83 struct mmc *mmc = find_mmc_device(0);
84
85 if (!mmc)
86 return;
87
88 mmc_set_clock(mmc, mmc->saved_clock, false);
89 }
90}
91#else
92void k3_mmc_stop_clock(void) {}
93void k3_mmc_restart_clock(void) {}
94#endif
95
Lokesh Vutla17ad6e02021-05-06 16:44:52 +053096#ifdef CONFIG_SPL_OF_LIST
97void do_dt_magic(void)
98{
99 int ret, rescan;
100
Andrew Davis2dde9a72023-04-06 11:38:17 -0500101 /* Perform board detection */
102 do_board_detect();
Lokesh Vutla17ad6e02021-05-06 16:44:52 +0530103
104 /*
105 * Board detection has been done.
106 * Let us see if another dtb wouldn't be a better match
107 * for our board
108 */
109 if (IS_ENABLED(CONFIG_CPU_V7R)) {
110 ret = fdtdec_resetup(&rescan);
111 if (!ret && rescan) {
112 dm_uninit();
113 dm_init_and_scan(true);
114 }
115 }
116}
117#endif
118
Aswath Govindraju70bc5e32021-06-04 22:00:33 +0530119#if CONFIG_IS_ENABLED(USB_STORAGE)
120static int fixup_usb_boot(const void *fdt_blob)
121{
122 int ret = 0;
123
124 switch (spl_boot_device()) {
125 case BOOT_DEVICE_USB:
126 /*
127 * If the boot mode is host, fixup the dr_mode to host
128 * before cdns3 bind takes place
129 */
130 ret = fdt_find_and_setprop((void *)fdt_blob,
131 "/bus@f4000/cdns-usb@f900000/usb@f400000",
132 "dr_mode", "host", 5, 0);
133 if (ret)
134 printf("%s: fdt_find_and_setprop() failed:%d\n",
135 __func__, ret);
136 fallthrough;
137 default:
138 break;
139 }
140
141 return ret;
142}
143
144int fdtdec_board_setup(const void *fdt_blob)
145{
146 /* Can use the pointer from the function parameters */
147 return fixup_usb_boot(fdt_blob);
148}
149#endif
150
Hari Nagallad383c5e2022-03-09 14:42:30 -0600151#if defined(CONFIG_ESM_K3)
152static void enable_mcu_esm_reset(void)
153{
154 /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z to '0' (low active) */
155 u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
156
157 stat &= 0xFFFDFFFF;
158 writel(stat, CTRLMMR_MCU_RST_CTRL);
159}
160#endif
161
Dave Gerlach96571ec2021-04-23 11:27:32 -0500162void board_init_f(ulong dummy)
163{
Hari Nagallad383c5e2022-03-09 14:42:30 -0600164#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3)
Dave Gerlach8e0689b2021-04-23 11:27:36 -0500165 struct udevice *dev;
166 int ret;
167#endif
168
Dave Gerlach96571ec2021-04-23 11:27:32 -0500169#if defined(CONFIG_CPU_V7R)
170 setup_k3_mpu_regions();
171#endif
172
Dave Gerlachb27a9f22021-04-23 11:27:35 -0500173 /*
174 * Cannot delay this further as there is a chance that
175 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
176 */
177 store_boot_info_from_rom();
178
Dave Gerlacheaef1292021-04-23 11:27:34 -0500179 ctrl_mmr_unlock();
180
Dave Gerlach96571ec2021-04-23 11:27:32 -0500181 /* Init DM early */
182 spl_early_init();
183
184 preloader_console_init();
Dave Gerlach8e0689b2021-04-23 11:27:36 -0500185
186#if defined(CONFIG_K3_LOAD_SYSFW)
187 /*
188 * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
189 * regardless of the result of pinctrl. Do this without probing the
190 * device, but instead by searching the device that would request the
191 * given sequence number if probed. The UART will be used by the system
192 * firmware (SYSFW) image for various purposes and SYSFW depends on us
193 * to initialize its pin settings.
194 */
195 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
196 if (!ret)
197 pinctrl_select_state(dev, "default");
198
199 /*
200 * Load, start up, and configure system controller firmware.
201 * This will determine whether or not ROM has already loaded
202 * system firmware and if so, will only perform needed config
203 * and not attempt to load firmware again.
204 */
Dave Gerlacha89f7a42021-04-23 11:27:37 -0500205 k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
206 k3_mmc_restart_clock);
Dave Gerlach8e0689b2021-04-23 11:27:36 -0500207#endif
208
209 /* Output System Firmware version info */
210 k3_sysfw_print_ver();
Dave Gerlachad38f512021-05-04 18:00:53 -0500211
Christian Gmeinerfe8b5452023-03-28 16:13:14 +0200212 do_dt_magic();
213
Hari Nagallad383c5e2022-03-09 14:42:30 -0600214#if defined(CONFIG_ESM_K3)
215 /* Probe/configure ESM0 */
216 ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
217 if (ret)
218 printf("esm main init failed: %d\n", ret);
219
220 /* Probe/configure MCUESM */
221 ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
222 if (ret)
223 printf("esm mcu init failed: %d\n", ret);
224
225 enable_mcu_esm_reset();
226#endif
227
Dave Gerlachad38f512021-05-04 18:00:53 -0500228#if defined(CONFIG_K3_AM64_DDRSS)
229 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
230 if (ret)
231 panic("DRAM init failed: %d\n", ret);
232#endif
Vignesh Raghavendra82cc43e2021-12-24 12:55:32 +0530233 if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) &&
234 spl_boot_device() == BOOT_DEVICE_ETHERNET) {
235 struct udevice *cpswdev;
236
237 if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss), &cpswdev))
238 printf("Failed to probe am65_cpsw_nuss driver\n");
239 }
Dave Gerlach96571ec2021-04-23 11:27:32 -0500240}
Keerthy05d670e2021-04-23 11:27:33 -0500241
Andre Przywara3cb12ef2021-07-12 11:06:49 +0100242u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
Keerthy05d670e2021-04-23 11:27:33 -0500243{
244 switch (boot_device) {
245 case BOOT_DEVICE_MMC1:
246 return MMCSD_MODE_EMMCBOOT;
247
248 case BOOT_DEVICE_MMC2:
249 return MMCSD_MODE_FS;
250
251 default:
252 return MMCSD_MODE_RAW;
253 }
254}
255
256static u32 __get_backup_bootmedia(u32 main_devstat)
257{
258 u32 bkup_bootmode =
259 (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
260 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
261 u32 bkup_bootmode_cfg =
262 (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
263 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
264
265 switch (bkup_bootmode) {
266 case BACKUP_BOOT_DEVICE_UART:
267 return BOOT_DEVICE_UART;
268
Aswath Govindraju8a05c9a2021-06-04 22:00:32 +0530269 case BACKUP_BOOT_DEVICE_DFU:
270 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
271 return BOOT_DEVICE_USB;
272 return BOOT_DEVICE_DFU;
273
Keerthy05d670e2021-04-23 11:27:33 -0500274
275 case BACKUP_BOOT_DEVICE_ETHERNET:
276 return BOOT_DEVICE_ETHERNET;
277
278 case BACKUP_BOOT_DEVICE_MMC:
279 if (bkup_bootmode_cfg)
280 return BOOT_DEVICE_MMC2;
281 return BOOT_DEVICE_MMC1;
282
283 case BACKUP_BOOT_DEVICE_SPI:
284 return BOOT_DEVICE_SPI;
285
286 case BACKUP_BOOT_DEVICE_I2C:
287 return BOOT_DEVICE_I2C;
288 };
289
290 return BOOT_DEVICE_RAM;
291}
292
293static u32 __get_primary_bootmedia(u32 main_devstat)
294{
295 u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
296 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
297 u32 bootmode_cfg =
298 (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
299 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
300
301 switch (bootmode) {
302 case BOOT_DEVICE_OSPI:
303 fallthrough;
304 case BOOT_DEVICE_QSPI:
305 fallthrough;
306 case BOOT_DEVICE_XSPI:
307 fallthrough;
308 case BOOT_DEVICE_SPI:
309 return BOOT_DEVICE_SPI;
310
311 case BOOT_DEVICE_ETHERNET_RGMII:
312 fallthrough;
313 case BOOT_DEVICE_ETHERNET_RMII:
314 return BOOT_DEVICE_ETHERNET;
315
316 case BOOT_DEVICE_EMMC:
317 return BOOT_DEVICE_MMC1;
318
319 case BOOT_DEVICE_MMC:
320 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
321 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
322 return BOOT_DEVICE_MMC2;
323 return BOOT_DEVICE_MMC1;
324
Aswath Govindraju8a05c9a2021-06-04 22:00:32 +0530325 case BOOT_DEVICE_DFU:
326 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
327 MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
328 return BOOT_DEVICE_USB;
329 return BOOT_DEVICE_DFU;
330
Keerthy05d670e2021-04-23 11:27:33 -0500331 case BOOT_DEVICE_NOBOOT:
332 return BOOT_DEVICE_RAM;
333 }
334
335 return bootmode;
336}
337
338u32 spl_boot_device(void)
339{
340 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
341
342 if (bootindex == K3_PRIMARY_BOOTMODE)
343 return __get_primary_bootmedia(devstat);
344 else
345 return __get_backup_bootmedia(devstat);
346}