Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014-2015 Samsung Electronics |
| 4 | * Przemyslaw Marczak <p.marczak@samsung.com> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 5 | */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 6 | |
Patrick Delaunay | 8131335 | 2021-04-27 11:02:19 +0200 | [diff] [blame] | 7 | #define LOG_CATEGORY UCLASS_REGULATOR |
| 8 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 9 | #include <common.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 10 | #include <errno.h> |
| 11 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 13 | #include <dm/uclass-internal.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 14 | #include <linux/delay.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 15 | #include <power/pmic.h> |
| 16 | #include <power/regulator.h> |
| 17 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 18 | int regulator_mode(struct udevice *dev, struct dm_regulator_mode **modep) |
| 19 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 20 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 21 | |
| 22 | *modep = NULL; |
| 23 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 24 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 25 | if (!uc_pdata) |
| 26 | return -ENXIO; |
| 27 | |
| 28 | *modep = uc_pdata->mode; |
| 29 | return uc_pdata->mode_count; |
| 30 | } |
| 31 | |
| 32 | int regulator_get_value(struct udevice *dev) |
| 33 | { |
| 34 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 35 | |
| 36 | if (!ops || !ops->get_value) |
| 37 | return -ENOSYS; |
| 38 | |
| 39 | return ops->get_value(dev); |
| 40 | } |
| 41 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 42 | static void regulator_set_value_ramp_delay(struct udevice *dev, int old_uV, |
| 43 | int new_uV, unsigned int ramp_delay) |
| 44 | { |
| 45 | int delay = DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay); |
| 46 | |
| 47 | debug("regulator %s: delay %u us (%d uV -> %d uV)\n", dev->name, delay, |
| 48 | old_uV, new_uV); |
| 49 | |
| 50 | udelay(delay); |
| 51 | } |
| 52 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 53 | int regulator_set_value(struct udevice *dev, int uV) |
| 54 | { |
| 55 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 56 | struct dm_regulator_uclass_plat *uc_pdata; |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 57 | int ret, old_uV = uV, is_enabled = 0; |
Keerthy | c6e6669 | 2016-10-26 13:42:31 +0530 | [diff] [blame] | 58 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 59 | uc_pdata = dev_get_uclass_plat(dev); |
Keerthy | c6e6669 | 2016-10-26 13:42:31 +0530 | [diff] [blame] | 60 | if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV) |
| 61 | return -EINVAL; |
| 62 | if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV) |
| 63 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 64 | |
| 65 | if (!ops || !ops->set_value) |
| 66 | return -ENOSYS; |
| 67 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 68 | if (uc_pdata->ramp_delay) { |
| 69 | is_enabled = regulator_get_enable(dev); |
| 70 | old_uV = regulator_get_value(dev); |
| 71 | } |
| 72 | |
| 73 | ret = ops->set_value(dev, uV); |
| 74 | |
| 75 | if (!ret) { |
| 76 | if (uc_pdata->ramp_delay && old_uV > 0 && is_enabled) |
| 77 | regulator_set_value_ramp_delay(dev, old_uV, uV, |
| 78 | uc_pdata->ramp_delay); |
| 79 | } |
| 80 | |
| 81 | return ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 82 | } |
| 83 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 84 | int regulator_set_suspend_value(struct udevice *dev, int uV) |
| 85 | { |
| 86 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 87 | struct dm_regulator_uclass_plat *uc_pdata; |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 88 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 89 | uc_pdata = dev_get_uclass_plat(dev); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 90 | if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV) |
| 91 | return -EINVAL; |
| 92 | if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV) |
| 93 | return -EINVAL; |
| 94 | |
| 95 | if (!ops->set_suspend_value) |
| 96 | return -ENOSYS; |
| 97 | |
| 98 | return ops->set_suspend_value(dev, uV); |
| 99 | } |
| 100 | |
| 101 | int regulator_get_suspend_value(struct udevice *dev) |
| 102 | { |
| 103 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 104 | |
| 105 | if (!ops->get_suspend_value) |
| 106 | return -ENOSYS; |
| 107 | |
| 108 | return ops->get_suspend_value(dev); |
| 109 | } |
| 110 | |
Keerthy | 162c02e | 2016-10-26 13:42:30 +0530 | [diff] [blame] | 111 | /* |
| 112 | * To be called with at most caution as there is no check |
| 113 | * before setting the actual voltage value. |
| 114 | */ |
| 115 | int regulator_set_value_force(struct udevice *dev, int uV) |
| 116 | { |
| 117 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 118 | |
| 119 | if (!ops || !ops->set_value) |
| 120 | return -ENOSYS; |
| 121 | |
| 122 | return ops->set_value(dev, uV); |
| 123 | } |
| 124 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 125 | int regulator_get_current(struct udevice *dev) |
| 126 | { |
| 127 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 128 | |
| 129 | if (!ops || !ops->get_current) |
| 130 | return -ENOSYS; |
| 131 | |
| 132 | return ops->get_current(dev); |
| 133 | } |
| 134 | |
| 135 | int regulator_set_current(struct udevice *dev, int uA) |
| 136 | { |
| 137 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 138 | struct dm_regulator_uclass_plat *uc_pdata; |
Keerthy | ce152be | 2016-10-26 13:42:32 +0530 | [diff] [blame] | 139 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 140 | uc_pdata = dev_get_uclass_plat(dev); |
Keerthy | ce152be | 2016-10-26 13:42:32 +0530 | [diff] [blame] | 141 | if (uc_pdata->min_uA != -ENODATA && uA < uc_pdata->min_uA) |
| 142 | return -EINVAL; |
| 143 | if (uc_pdata->max_uA != -ENODATA && uA > uc_pdata->max_uA) |
| 144 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 145 | |
| 146 | if (!ops || !ops->set_current) |
| 147 | return -ENOSYS; |
| 148 | |
| 149 | return ops->set_current(dev, uA); |
| 150 | } |
| 151 | |
Keerthy | 23be7fb | 2017-06-13 09:53:45 +0530 | [diff] [blame] | 152 | int regulator_get_enable(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 153 | { |
| 154 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 155 | |
| 156 | if (!ops || !ops->get_enable) |
| 157 | return -ENOSYS; |
| 158 | |
| 159 | return ops->get_enable(dev); |
| 160 | } |
| 161 | |
| 162 | int regulator_set_enable(struct udevice *dev, bool enable) |
| 163 | { |
| 164 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 165 | struct dm_regulator_uclass_plat *uc_pdata; |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 166 | int ret, old_enable = 0; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 167 | |
| 168 | if (!ops || !ops->set_enable) |
| 169 | return -ENOSYS; |
| 170 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 171 | uc_pdata = dev_get_uclass_plat(dev); |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 172 | if (!enable && uc_pdata->always_on) |
Lokesh Vutla | f870da2 | 2019-01-11 15:15:50 +0530 | [diff] [blame] | 173 | return -EACCES; |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 174 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 175 | if (uc_pdata->ramp_delay) |
| 176 | old_enable = regulator_get_enable(dev); |
| 177 | |
| 178 | ret = ops->set_enable(dev, enable); |
| 179 | if (!ret) { |
| 180 | if (uc_pdata->ramp_delay && !old_enable && enable) { |
| 181 | int uV = regulator_get_value(dev); |
| 182 | |
| 183 | if (uV > 0) { |
| 184 | regulator_set_value_ramp_delay(dev, 0, uV, |
| 185 | uc_pdata->ramp_delay); |
| 186 | } |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | return ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 191 | } |
| 192 | |
Lokesh Vutla | 7106b78 | 2019-01-11 15:15:51 +0530 | [diff] [blame] | 193 | int regulator_set_enable_if_allowed(struct udevice *dev, bool enable) |
| 194 | { |
| 195 | int ret; |
| 196 | |
| 197 | ret = regulator_set_enable(dev, enable); |
| 198 | if (ret == -ENOSYS || ret == -EACCES) |
| 199 | return 0; |
| 200 | |
| 201 | return ret; |
| 202 | } |
| 203 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 204 | int regulator_set_suspend_enable(struct udevice *dev, bool enable) |
| 205 | { |
| 206 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 207 | |
| 208 | if (!ops->set_suspend_enable) |
| 209 | return -ENOSYS; |
| 210 | |
| 211 | return ops->set_suspend_enable(dev, enable); |
| 212 | } |
| 213 | |
| 214 | int regulator_get_suspend_enable(struct udevice *dev) |
| 215 | { |
| 216 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 217 | |
| 218 | if (!ops->get_suspend_enable) |
| 219 | return -ENOSYS; |
| 220 | |
| 221 | return ops->get_suspend_enable(dev); |
| 222 | } |
| 223 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 224 | int regulator_get_mode(struct udevice *dev) |
| 225 | { |
| 226 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 227 | |
| 228 | if (!ops || !ops->get_mode) |
| 229 | return -ENOSYS; |
| 230 | |
| 231 | return ops->get_mode(dev); |
| 232 | } |
| 233 | |
| 234 | int regulator_set_mode(struct udevice *dev, int mode) |
| 235 | { |
| 236 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 237 | |
| 238 | if (!ops || !ops->set_mode) |
| 239 | return -ENOSYS; |
| 240 | |
| 241 | return ops->set_mode(dev, mode); |
| 242 | } |
| 243 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 244 | int regulator_get_by_platname(const char *plat_name, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 245 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 246 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 247 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 248 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 249 | |
| 250 | *devp = NULL; |
| 251 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 252 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 253 | ret = uclass_find_next_device(&dev)) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 254 | if (ret) { |
| 255 | debug("regulator %s, ret=%d\n", dev->name, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 256 | continue; |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 257 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 258 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 259 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 260 | if (!uc_pdata || strcmp(plat_name, uc_pdata->name)) |
| 261 | continue; |
| 262 | |
| 263 | return uclass_get_device_tail(dev, 0, devp); |
| 264 | } |
| 265 | |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 266 | debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 267 | |
| 268 | return -ENODEV; |
| 269 | } |
| 270 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 271 | int regulator_get_by_devname(const char *devname, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 272 | { |
| 273 | return uclass_get_device_by_name(UCLASS_REGULATOR, devname, devp); |
| 274 | } |
| 275 | |
Przemyslaw Marczak | c900103 | 2015-10-27 13:07:59 +0100 | [diff] [blame] | 276 | int device_get_supply_regulator(struct udevice *dev, const char *supply_name, |
| 277 | struct udevice **devp) |
| 278 | { |
| 279 | return uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, |
| 280 | supply_name, devp); |
| 281 | } |
| 282 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 283 | int regulator_autoset(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 284 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 285 | struct dm_regulator_uclass_plat *uc_pdata; |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 286 | int ret = 0; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 287 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 288 | uc_pdata = dev_get_uclass_plat(dev); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 289 | |
| 290 | ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on); |
| 291 | if (!ret && uc_pdata->suspend_on) { |
| 292 | ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV); |
| 293 | if (!ret) |
| 294 | return ret; |
| 295 | } |
| 296 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 297 | if (!uc_pdata->always_on && !uc_pdata->boot_on) |
| 298 | return -EMEDIUMTYPE; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 299 | |
Sven Schwermer | d033cbf | 2019-06-12 08:32:38 +0200 | [diff] [blame] | 300 | if (uc_pdata->type == REGULATOR_TYPE_FIXED) |
| 301 | return regulator_set_enable(dev, true); |
| 302 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 303 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 304 | ret = regulator_set_value(dev, uc_pdata->min_uV); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 305 | if (uc_pdata->init_uV > 0) |
| 306 | ret = regulator_set_value(dev, uc_pdata->init_uV); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 307 | if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)) |
| 308 | ret = regulator_set_current(dev, uc_pdata->min_uA); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 309 | |
| 310 | if (!ret) |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 311 | ret = regulator_set_enable(dev, true); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 312 | |
| 313 | return ret; |
| 314 | } |
| 315 | |
Konstantin Porotchkin | 621dab5 | 2017-05-29 15:59:38 +0300 | [diff] [blame] | 316 | int regulator_unset(struct udevice *dev) |
| 317 | { |
| 318 | struct dm_regulator_uclass_plat *uc_pdata; |
| 319 | |
| 320 | uc_pdata = dev_get_uclass_plat(dev); |
| 321 | if (uc_pdata && uc_pdata->force_off) |
| 322 | return regulator_set_enable(dev, false); |
| 323 | |
| 324 | return -EMEDIUMTYPE; |
| 325 | } |
| 326 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 327 | static void regulator_show(struct udevice *dev, int ret) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 328 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 329 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 330 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 331 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 332 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 333 | printf("%s@%s: ", dev->name, uc_pdata->name); |
| 334 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 335 | printf("set %d uV", uc_pdata->min_uV); |
| 336 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA) |
| 337 | printf("; set %d uA", uc_pdata->min_uA); |
| 338 | printf("; enabling"); |
| 339 | if (ret) |
Simon Glass | 46ad8cb | 2016-01-21 19:43:58 -0700 | [diff] [blame] | 340 | printf(" (ret: %d)", ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 341 | printf("\n"); |
| 342 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 343 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 344 | int regulator_autoset_by_name(const char *platname, struct udevice **devp) |
| 345 | { |
| 346 | struct udevice *dev; |
| 347 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 348 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 349 | ret = regulator_get_by_platname(platname, &dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 350 | if (devp) |
| 351 | *devp = dev; |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 352 | if (ret) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 353 | debug("Can get the regulator: %s (err=%d)\n", platname, ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 354 | return ret; |
| 355 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 356 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 357 | return regulator_autoset(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 358 | } |
| 359 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 360 | int regulator_list_autoset(const char *list_platname[], |
| 361 | struct udevice *list_devp[], |
| 362 | bool verbose) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 363 | { |
| 364 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 365 | int error = 0, i = 0, ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 366 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 367 | while (list_platname[i]) { |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 368 | ret = regulator_autoset_by_name(list_platname[i], &dev); |
| 369 | if (ret != -EMEDIUMTYPE && verbose) |
| 370 | regulator_show(dev, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 371 | if (ret & !error) |
| 372 | error = ret; |
| 373 | |
| 374 | if (list_devp) |
| 375 | list_devp[i] = dev; |
| 376 | |
| 377 | i++; |
| 378 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 379 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 380 | return error; |
| 381 | } |
| 382 | |
| 383 | static bool regulator_name_is_unique(struct udevice *check_dev, |
| 384 | const char *check_name) |
| 385 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 386 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 387 | struct udevice *dev; |
| 388 | int check_len = strlen(check_name); |
| 389 | int ret; |
| 390 | int len; |
| 391 | |
| 392 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 393 | ret = uclass_find_next_device(&dev)) { |
| 394 | if (ret || dev == check_dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 395 | continue; |
| 396 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 397 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 398 | len = strlen(uc_pdata->name); |
| 399 | if (len != check_len) |
| 400 | continue; |
| 401 | |
| 402 | if (!strcmp(uc_pdata->name, check_name)) |
| 403 | return false; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 404 | } |
| 405 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 406 | return true; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | static int regulator_post_bind(struct udevice *dev) |
| 410 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 411 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 412 | const char *property = "regulator-name"; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 413 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 414 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 415 | |
| 416 | /* Regulator's mandatory constraint */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 417 | uc_pdata->name = dev_read_string(dev, property); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 418 | if (!uc_pdata->name) { |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 419 | debug("%s: dev '%s' has no property '%s'\n", |
| 420 | __func__, dev->name, property); |
| 421 | uc_pdata->name = dev_read_name(dev); |
Peng Fan | cd672d4 | 2015-08-07 16:43:42 +0800 | [diff] [blame] | 422 | if (!uc_pdata->name) |
| 423 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 424 | } |
| 425 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 426 | if (regulator_name_is_unique(dev, uc_pdata->name)) |
| 427 | return 0; |
| 428 | |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 429 | debug("'%s' of dev: '%s', has nonunique value: '%s\n", |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 430 | property, dev->name, uc_pdata->name); |
| 431 | |
| 432 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | static int regulator_pre_probe(struct udevice *dev) |
| 436 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 437 | struct dm_regulator_uclass_plat *uc_pdata; |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 438 | ofnode node; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 439 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 440 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 441 | if (!uc_pdata) |
| 442 | return -ENXIO; |
| 443 | |
| 444 | /* Regulator's optional constraints */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 445 | uc_pdata->min_uV = dev_read_u32_default(dev, "regulator-min-microvolt", |
| 446 | -ENODATA); |
| 447 | uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt", |
| 448 | -ENODATA); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 449 | uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt", |
| 450 | -ENODATA); |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 451 | uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp", |
| 452 | -ENODATA); |
| 453 | uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp", |
| 454 | -ENODATA); |
| 455 | uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on"); |
| 456 | uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on"); |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 457 | uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay", |
| 458 | 0); |
Konstantin Porotchkin | 621dab5 | 2017-05-29 15:59:38 +0300 | [diff] [blame] | 459 | uc_pdata->force_off = dev_read_bool(dev, "regulator-force-boot-off"); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 460 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 461 | node = dev_read_subnode(dev, "regulator-state-mem"); |
| 462 | if (ofnode_valid(node)) { |
| 463 | uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend"); |
| 464 | if (ofnode_read_u32(node, "regulator-suspend-microvolt", &uc_pdata->suspend_uV)) |
| 465 | uc_pdata->suspend_uV = uc_pdata->max_uV; |
| 466 | } else { |
| 467 | uc_pdata->suspend_on = true; |
| 468 | uc_pdata->suspend_uV = uc_pdata->max_uV; |
| 469 | } |
| 470 | |
Simon Glass | 991f9bc | 2015-06-23 15:38:57 -0600 | [diff] [blame] | 471 | /* Those values are optional (-ENODATA if unset) */ |
| 472 | if ((uc_pdata->min_uV != -ENODATA) && |
| 473 | (uc_pdata->max_uV != -ENODATA) && |
| 474 | (uc_pdata->min_uV == uc_pdata->max_uV)) |
| 475 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UV; |
| 476 | |
| 477 | /* Those values are optional (-ENODATA if unset) */ |
| 478 | if ((uc_pdata->min_uA != -ENODATA) && |
| 479 | (uc_pdata->max_uA != -ENODATA) && |
| 480 | (uc_pdata->min_uA == uc_pdata->max_uA)) |
| 481 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UA; |
| 482 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 483 | return 0; |
| 484 | } |
| 485 | |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 486 | int regulators_enable_boot_on(bool verbose) |
| 487 | { |
| 488 | struct udevice *dev; |
| 489 | struct uclass *uc; |
| 490 | int ret; |
| 491 | |
| 492 | ret = uclass_get(UCLASS_REGULATOR, &uc); |
| 493 | if (ret) |
| 494 | return ret; |
| 495 | for (uclass_first_device(UCLASS_REGULATOR, &dev); |
Simon Glass | c7298e7 | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 496 | dev; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 497 | uclass_next_device(&dev)) { |
| 498 | ret = regulator_autoset(dev); |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 499 | if (ret == -EMEDIUMTYPE) { |
| 500 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 501 | continue; |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 502 | } |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 503 | if (verbose) |
| 504 | regulator_show(dev, ret); |
Simon Glass | d6eddad | 2016-01-21 19:43:59 -0700 | [diff] [blame] | 505 | if (ret == -ENOSYS) |
| 506 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 507 | } |
| 508 | |
| 509 | return ret; |
| 510 | } |
| 511 | |
Konstantin Porotchkin | 621dab5 | 2017-05-29 15:59:38 +0300 | [diff] [blame] | 512 | int regulators_enable_boot_off(bool verbose) |
| 513 | { |
| 514 | struct udevice *dev; |
| 515 | struct uclass *uc; |
| 516 | int ret; |
| 517 | |
| 518 | ret = uclass_get(UCLASS_REGULATOR, &uc); |
| 519 | if (ret) |
| 520 | return ret; |
| 521 | for (uclass_first_device(UCLASS_REGULATOR, &dev); |
| 522 | dev; |
| 523 | uclass_next_device(&dev)) { |
| 524 | ret = regulator_unset(dev); |
| 525 | if (ret == -EMEDIUMTYPE) { |
| 526 | ret = 0; |
| 527 | continue; |
| 528 | } |
| 529 | if (verbose) |
| 530 | regulator_show(dev, ret); |
| 531 | if (ret == -ENOSYS) |
| 532 | ret = 0; |
| 533 | } |
| 534 | |
| 535 | return ret; |
| 536 | } |
| 537 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 538 | UCLASS_DRIVER(regulator) = { |
| 539 | .id = UCLASS_REGULATOR, |
| 540 | .name = "regulator", |
| 541 | .post_bind = regulator_post_bind, |
| 542 | .pre_probe = regulator_pre_probe, |
Simon Glass | 33b2efb | 2020-12-03 16:55:22 -0700 | [diff] [blame] | 543 | .per_device_plat_auto = sizeof(struct dm_regulator_uclass_plat), |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 544 | }; |