Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014-2015 Samsung Electronics |
| 4 | * Przemyslaw Marczak <p.marczak@samsung.com> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 5 | */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 6 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 7 | #include <common.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 8 | #include <errno.h> |
| 9 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 11 | #include <dm/uclass-internal.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 12 | #include <linux/delay.h> |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 13 | #include <power/pmic.h> |
| 14 | #include <power/regulator.h> |
| 15 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 16 | int regulator_mode(struct udevice *dev, struct dm_regulator_mode **modep) |
| 17 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 18 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 19 | |
| 20 | *modep = NULL; |
| 21 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 22 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 23 | if (!uc_pdata) |
| 24 | return -ENXIO; |
| 25 | |
| 26 | *modep = uc_pdata->mode; |
| 27 | return uc_pdata->mode_count; |
| 28 | } |
| 29 | |
| 30 | int regulator_get_value(struct udevice *dev) |
| 31 | { |
| 32 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 33 | |
| 34 | if (!ops || !ops->get_value) |
| 35 | return -ENOSYS; |
| 36 | |
| 37 | return ops->get_value(dev); |
| 38 | } |
| 39 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 40 | static void regulator_set_value_ramp_delay(struct udevice *dev, int old_uV, |
| 41 | int new_uV, unsigned int ramp_delay) |
| 42 | { |
| 43 | int delay = DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay); |
| 44 | |
| 45 | debug("regulator %s: delay %u us (%d uV -> %d uV)\n", dev->name, delay, |
| 46 | old_uV, new_uV); |
| 47 | |
| 48 | udelay(delay); |
| 49 | } |
| 50 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 51 | int regulator_set_value(struct udevice *dev, int uV) |
| 52 | { |
| 53 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 54 | struct dm_regulator_uclass_plat *uc_pdata; |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 55 | int ret, old_uV = uV, is_enabled = 0; |
Keerthy | c6e6669 | 2016-10-26 13:42:31 +0530 | [diff] [blame] | 56 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 57 | uc_pdata = dev_get_uclass_plat(dev); |
Keerthy | c6e6669 | 2016-10-26 13:42:31 +0530 | [diff] [blame] | 58 | if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV) |
| 59 | return -EINVAL; |
| 60 | if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV) |
| 61 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 62 | |
| 63 | if (!ops || !ops->set_value) |
| 64 | return -ENOSYS; |
| 65 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 66 | if (uc_pdata->ramp_delay) { |
| 67 | is_enabled = regulator_get_enable(dev); |
| 68 | old_uV = regulator_get_value(dev); |
| 69 | } |
| 70 | |
| 71 | ret = ops->set_value(dev, uV); |
| 72 | |
| 73 | if (!ret) { |
| 74 | if (uc_pdata->ramp_delay && old_uV > 0 && is_enabled) |
| 75 | regulator_set_value_ramp_delay(dev, old_uV, uV, |
| 76 | uc_pdata->ramp_delay); |
| 77 | } |
| 78 | |
| 79 | return ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 80 | } |
| 81 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 82 | int regulator_set_suspend_value(struct udevice *dev, int uV) |
| 83 | { |
| 84 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 85 | struct dm_regulator_uclass_plat *uc_pdata; |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 86 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 87 | uc_pdata = dev_get_uclass_plat(dev); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 88 | if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV) |
| 89 | return -EINVAL; |
| 90 | if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV) |
| 91 | return -EINVAL; |
| 92 | |
| 93 | if (!ops->set_suspend_value) |
| 94 | return -ENOSYS; |
| 95 | |
| 96 | return ops->set_suspend_value(dev, uV); |
| 97 | } |
| 98 | |
| 99 | int regulator_get_suspend_value(struct udevice *dev) |
| 100 | { |
| 101 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 102 | |
| 103 | if (!ops->get_suspend_value) |
| 104 | return -ENOSYS; |
| 105 | |
| 106 | return ops->get_suspend_value(dev); |
| 107 | } |
| 108 | |
Keerthy | 162c02e | 2016-10-26 13:42:30 +0530 | [diff] [blame] | 109 | /* |
| 110 | * To be called with at most caution as there is no check |
| 111 | * before setting the actual voltage value. |
| 112 | */ |
| 113 | int regulator_set_value_force(struct udevice *dev, int uV) |
| 114 | { |
| 115 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 116 | |
| 117 | if (!ops || !ops->set_value) |
| 118 | return -ENOSYS; |
| 119 | |
| 120 | return ops->set_value(dev, uV); |
| 121 | } |
| 122 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 123 | int regulator_get_current(struct udevice *dev) |
| 124 | { |
| 125 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 126 | |
| 127 | if (!ops || !ops->get_current) |
| 128 | return -ENOSYS; |
| 129 | |
| 130 | return ops->get_current(dev); |
| 131 | } |
| 132 | |
| 133 | int regulator_set_current(struct udevice *dev, int uA) |
| 134 | { |
| 135 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 136 | struct dm_regulator_uclass_plat *uc_pdata; |
Keerthy | ce152be | 2016-10-26 13:42:32 +0530 | [diff] [blame] | 137 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 138 | uc_pdata = dev_get_uclass_plat(dev); |
Keerthy | ce152be | 2016-10-26 13:42:32 +0530 | [diff] [blame] | 139 | if (uc_pdata->min_uA != -ENODATA && uA < uc_pdata->min_uA) |
| 140 | return -EINVAL; |
| 141 | if (uc_pdata->max_uA != -ENODATA && uA > uc_pdata->max_uA) |
| 142 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 143 | |
| 144 | if (!ops || !ops->set_current) |
| 145 | return -ENOSYS; |
| 146 | |
| 147 | return ops->set_current(dev, uA); |
| 148 | } |
| 149 | |
Keerthy | 23be7fb | 2017-06-13 09:53:45 +0530 | [diff] [blame] | 150 | int regulator_get_enable(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 151 | { |
| 152 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 153 | |
| 154 | if (!ops || !ops->get_enable) |
| 155 | return -ENOSYS; |
| 156 | |
| 157 | return ops->get_enable(dev); |
| 158 | } |
| 159 | |
| 160 | int regulator_set_enable(struct udevice *dev, bool enable) |
| 161 | { |
| 162 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 163 | struct dm_regulator_uclass_plat *uc_pdata; |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 164 | int ret, old_enable = 0; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 165 | |
| 166 | if (!ops || !ops->set_enable) |
| 167 | return -ENOSYS; |
| 168 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 169 | uc_pdata = dev_get_uclass_plat(dev); |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 170 | if (!enable && uc_pdata->always_on) |
Lokesh Vutla | f870da2 | 2019-01-11 15:15:50 +0530 | [diff] [blame] | 171 | return -EACCES; |
Patrick Delaunay | d7585f2 | 2018-11-15 13:45:31 +0100 | [diff] [blame] | 172 | |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 173 | if (uc_pdata->ramp_delay) |
| 174 | old_enable = regulator_get_enable(dev); |
| 175 | |
| 176 | ret = ops->set_enable(dev, enable); |
| 177 | if (!ret) { |
| 178 | if (uc_pdata->ramp_delay && !old_enable && enable) { |
| 179 | int uV = regulator_get_value(dev); |
| 180 | |
| 181 | if (uV > 0) { |
| 182 | regulator_set_value_ramp_delay(dev, 0, uV, |
| 183 | uc_pdata->ramp_delay); |
| 184 | } |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | return ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 189 | } |
| 190 | |
Lokesh Vutla | 7106b78 | 2019-01-11 15:15:51 +0530 | [diff] [blame] | 191 | int regulator_set_enable_if_allowed(struct udevice *dev, bool enable) |
| 192 | { |
| 193 | int ret; |
| 194 | |
| 195 | ret = regulator_set_enable(dev, enable); |
| 196 | if (ret == -ENOSYS || ret == -EACCES) |
| 197 | return 0; |
| 198 | |
| 199 | return ret; |
| 200 | } |
| 201 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 202 | int regulator_set_suspend_enable(struct udevice *dev, bool enable) |
| 203 | { |
| 204 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 205 | |
| 206 | if (!ops->set_suspend_enable) |
| 207 | return -ENOSYS; |
| 208 | |
| 209 | return ops->set_suspend_enable(dev, enable); |
| 210 | } |
| 211 | |
| 212 | int regulator_get_suspend_enable(struct udevice *dev) |
| 213 | { |
| 214 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 215 | |
| 216 | if (!ops->get_suspend_enable) |
| 217 | return -ENOSYS; |
| 218 | |
| 219 | return ops->get_suspend_enable(dev); |
| 220 | } |
| 221 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 222 | int regulator_get_mode(struct udevice *dev) |
| 223 | { |
| 224 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 225 | |
| 226 | if (!ops || !ops->get_mode) |
| 227 | return -ENOSYS; |
| 228 | |
| 229 | return ops->get_mode(dev); |
| 230 | } |
| 231 | |
| 232 | int regulator_set_mode(struct udevice *dev, int mode) |
| 233 | { |
| 234 | const struct dm_regulator_ops *ops = dev_get_driver_ops(dev); |
| 235 | |
| 236 | if (!ops || !ops->set_mode) |
| 237 | return -ENOSYS; |
| 238 | |
| 239 | return ops->set_mode(dev, mode); |
| 240 | } |
| 241 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 242 | int regulator_get_by_platname(const char *plat_name, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 243 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 244 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 245 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 246 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 247 | |
| 248 | *devp = NULL; |
| 249 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 250 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 251 | ret = uclass_find_next_device(&dev)) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 252 | if (ret) { |
| 253 | debug("regulator %s, ret=%d\n", dev->name, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 254 | continue; |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 255 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 256 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 257 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 258 | if (!uc_pdata || strcmp(plat_name, uc_pdata->name)) |
| 259 | continue; |
| 260 | |
| 261 | return uclass_get_device_tail(dev, 0, devp); |
| 262 | } |
| 263 | |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 264 | debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 265 | |
| 266 | return -ENODEV; |
| 267 | } |
| 268 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 269 | int regulator_get_by_devname(const char *devname, struct udevice **devp) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 270 | { |
| 271 | return uclass_get_device_by_name(UCLASS_REGULATOR, devname, devp); |
| 272 | } |
| 273 | |
Przemyslaw Marczak | c900103 | 2015-10-27 13:07:59 +0100 | [diff] [blame] | 274 | int device_get_supply_regulator(struct udevice *dev, const char *supply_name, |
| 275 | struct udevice **devp) |
| 276 | { |
| 277 | return uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, |
| 278 | supply_name, devp); |
| 279 | } |
| 280 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 281 | int regulator_autoset(struct udevice *dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 282 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 283 | struct dm_regulator_uclass_plat *uc_pdata; |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 284 | int ret = 0; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 285 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 286 | uc_pdata = dev_get_uclass_plat(dev); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 287 | |
| 288 | ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on); |
| 289 | if (!ret && uc_pdata->suspend_on) { |
| 290 | ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV); |
| 291 | if (!ret) |
| 292 | return ret; |
| 293 | } |
| 294 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 295 | if (!uc_pdata->always_on && !uc_pdata->boot_on) |
| 296 | return -EMEDIUMTYPE; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 297 | |
Sven Schwermer | d033cbf | 2019-06-12 08:32:38 +0200 | [diff] [blame] | 298 | if (uc_pdata->type == REGULATOR_TYPE_FIXED) |
| 299 | return regulator_set_enable(dev, true); |
| 300 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 301 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 302 | ret = regulator_set_value(dev, uc_pdata->min_uV); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 303 | if (uc_pdata->init_uV > 0) |
| 304 | ret = regulator_set_value(dev, uc_pdata->init_uV); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 305 | if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)) |
| 306 | ret = regulator_set_current(dev, uc_pdata->min_uA); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 307 | |
| 308 | if (!ret) |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 309 | ret = regulator_set_enable(dev, true); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 310 | |
| 311 | return ret; |
| 312 | } |
| 313 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 314 | static void regulator_show(struct udevice *dev, int ret) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 315 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 316 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 317 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 318 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 319 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 320 | printf("%s@%s: ", dev->name, uc_pdata->name); |
| 321 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) |
| 322 | printf("set %d uV", uc_pdata->min_uV); |
| 323 | if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA) |
| 324 | printf("; set %d uA", uc_pdata->min_uA); |
| 325 | printf("; enabling"); |
| 326 | if (ret) |
Simon Glass | 46ad8cb | 2016-01-21 19:43:58 -0700 | [diff] [blame] | 327 | printf(" (ret: %d)", ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 328 | printf("\n"); |
| 329 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 330 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 331 | int regulator_autoset_by_name(const char *platname, struct udevice **devp) |
| 332 | { |
| 333 | struct udevice *dev; |
| 334 | int ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 335 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 336 | ret = regulator_get_by_platname(platname, &dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 337 | if (devp) |
| 338 | *devp = dev; |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 339 | if (ret) { |
Simon Glass | fc3ebf1 | 2017-05-31 17:57:15 -0600 | [diff] [blame] | 340 | debug("Can get the regulator: %s (err=%d)\n", platname, ret); |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 341 | return ret; |
| 342 | } |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 343 | |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 344 | return regulator_autoset(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 345 | } |
| 346 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 347 | int regulator_list_autoset(const char *list_platname[], |
| 348 | struct udevice *list_devp[], |
| 349 | bool verbose) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 350 | { |
| 351 | struct udevice *dev; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 352 | int error = 0, i = 0, ret; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 353 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 354 | while (list_platname[i]) { |
Simon Glass | 46cb824 | 2015-06-23 15:38:58 -0600 | [diff] [blame] | 355 | ret = regulator_autoset_by_name(list_platname[i], &dev); |
| 356 | if (ret != -EMEDIUMTYPE && verbose) |
| 357 | regulator_show(dev, ret); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 358 | if (ret & !error) |
| 359 | error = ret; |
| 360 | |
| 361 | if (list_devp) |
| 362 | list_devp[i] = dev; |
| 363 | |
| 364 | i++; |
| 365 | } |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 366 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 367 | return error; |
| 368 | } |
| 369 | |
| 370 | static bool regulator_name_is_unique(struct udevice *check_dev, |
| 371 | const char *check_name) |
| 372 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 373 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 374 | struct udevice *dev; |
| 375 | int check_len = strlen(check_name); |
| 376 | int ret; |
| 377 | int len; |
| 378 | |
| 379 | for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; |
| 380 | ret = uclass_find_next_device(&dev)) { |
| 381 | if (ret || dev == check_dev) |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 382 | continue; |
| 383 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 384 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 385 | len = strlen(uc_pdata->name); |
| 386 | if (len != check_len) |
| 387 | continue; |
| 388 | |
| 389 | if (!strcmp(uc_pdata->name, check_name)) |
| 390 | return false; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 391 | } |
| 392 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 393 | return true; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | static int regulator_post_bind(struct udevice *dev) |
| 397 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 398 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 399 | const char *property = "regulator-name"; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 400 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 401 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 402 | |
| 403 | /* Regulator's mandatory constraint */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 404 | uc_pdata->name = dev_read_string(dev, property); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 405 | if (!uc_pdata->name) { |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 406 | debug("%s: dev '%s' has no property '%s'\n", |
| 407 | __func__, dev->name, property); |
| 408 | uc_pdata->name = dev_read_name(dev); |
Peng Fan | cd672d4 | 2015-08-07 16:43:42 +0800 | [diff] [blame] | 409 | if (!uc_pdata->name) |
| 410 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 411 | } |
| 412 | |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 413 | if (regulator_name_is_unique(dev, uc_pdata->name)) |
| 414 | return 0; |
| 415 | |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 416 | debug("'%s' of dev: '%s', has nonunique value: '%s\n", |
Przemyslaw Marczak | 75692a3 | 2015-05-13 13:38:27 +0200 | [diff] [blame] | 417 | property, dev->name, uc_pdata->name); |
| 418 | |
| 419 | return -EINVAL; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | static int regulator_pre_probe(struct udevice *dev) |
| 423 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 424 | struct dm_regulator_uclass_plat *uc_pdata; |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 425 | ofnode node; |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 426 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 427 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 428 | if (!uc_pdata) |
| 429 | return -ENXIO; |
| 430 | |
| 431 | /* Regulator's optional constraints */ |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 432 | uc_pdata->min_uV = dev_read_u32_default(dev, "regulator-min-microvolt", |
| 433 | -ENODATA); |
| 434 | uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt", |
| 435 | -ENODATA); |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 436 | uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt", |
| 437 | -ENODATA); |
Simon Glass | eeb99de | 2017-05-18 20:09:34 -0600 | [diff] [blame] | 438 | uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp", |
| 439 | -ENODATA); |
| 440 | uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp", |
| 441 | -ENODATA); |
| 442 | uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on"); |
| 443 | uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on"); |
Krzysztof Kozlowski | e2fa397 | 2019-03-06 19:37:54 +0100 | [diff] [blame] | 444 | uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay", |
| 445 | 0); |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 446 | |
Joseph Chen | bb51132 | 2019-09-26 15:43:52 +0800 | [diff] [blame] | 447 | node = dev_read_subnode(dev, "regulator-state-mem"); |
| 448 | if (ofnode_valid(node)) { |
| 449 | uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend"); |
| 450 | if (ofnode_read_u32(node, "regulator-suspend-microvolt", &uc_pdata->suspend_uV)) |
| 451 | uc_pdata->suspend_uV = uc_pdata->max_uV; |
| 452 | } else { |
| 453 | uc_pdata->suspend_on = true; |
| 454 | uc_pdata->suspend_uV = uc_pdata->max_uV; |
| 455 | } |
| 456 | |
Simon Glass | 991f9bc | 2015-06-23 15:38:57 -0600 | [diff] [blame] | 457 | /* Those values are optional (-ENODATA if unset) */ |
| 458 | if ((uc_pdata->min_uV != -ENODATA) && |
| 459 | (uc_pdata->max_uV != -ENODATA) && |
| 460 | (uc_pdata->min_uV == uc_pdata->max_uV)) |
| 461 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UV; |
| 462 | |
| 463 | /* Those values are optional (-ENODATA if unset) */ |
| 464 | if ((uc_pdata->min_uA != -ENODATA) && |
| 465 | (uc_pdata->max_uA != -ENODATA) && |
| 466 | (uc_pdata->min_uA == uc_pdata->max_uA)) |
| 467 | uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UA; |
| 468 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 469 | return 0; |
| 470 | } |
| 471 | |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 472 | int regulators_enable_boot_on(bool verbose) |
| 473 | { |
| 474 | struct udevice *dev; |
| 475 | struct uclass *uc; |
| 476 | int ret; |
| 477 | |
| 478 | ret = uclass_get(UCLASS_REGULATOR, &uc); |
| 479 | if (ret) |
| 480 | return ret; |
| 481 | for (uclass_first_device(UCLASS_REGULATOR, &dev); |
Simon Glass | c7298e7 | 2016-02-11 13:23:26 -0700 | [diff] [blame] | 482 | dev; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 483 | uclass_next_device(&dev)) { |
| 484 | ret = regulator_autoset(dev); |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 485 | if (ret == -EMEDIUMTYPE) { |
| 486 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 487 | continue; |
Simon Glass | f55c951 | 2015-07-02 18:16:06 -0600 | [diff] [blame] | 488 | } |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 489 | if (verbose) |
| 490 | regulator_show(dev, ret); |
Simon Glass | d6eddad | 2016-01-21 19:43:59 -0700 | [diff] [blame] | 491 | if (ret == -ENOSYS) |
| 492 | ret = 0; |
Simon Glass | efeeb2c | 2015-06-23 15:38:59 -0600 | [diff] [blame] | 493 | } |
| 494 | |
| 495 | return ret; |
| 496 | } |
| 497 | |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 498 | UCLASS_DRIVER(regulator) = { |
| 499 | .id = UCLASS_REGULATOR, |
| 500 | .name = "regulator", |
| 501 | .post_bind = regulator_post_bind, |
| 502 | .pre_probe = regulator_pre_probe, |
Simon Glass | 33b2efb | 2020-12-03 16:55:22 -0700 | [diff] [blame^] | 503 | .per_device_plat_auto = sizeof(struct dm_regulator_uclass_plat), |
Przemyslaw Marczak | 08edd00 | 2015-04-20 20:07:42 +0200 | [diff] [blame] | 504 | }; |