Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2008, Freescale Semiconductor, Inc |
Yangbo Lu | f9049b2 | 2020-06-17 18:08:58 +0800 | [diff] [blame] | 4 | * Copyright 2020 NXP |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 5 | * Andy Fleming |
| 6 | * |
| 7 | * Based vaguely on the Linux code |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <config.h> |
| 11 | #include <common.h> |
Simon Glass | 655306c | 2020-05-10 11:39:58 -0600 | [diff] [blame] | 12 | #include <blk.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 13 | #include <command.h> |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 14 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 15 | #include <log.h> |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 16 | #include <dm/device-internal.h> |
Stephen Warren | bf0c785 | 2014-05-23 12:47:06 -0600 | [diff] [blame] | 17 | #include <errno.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 18 | #include <mmc.h> |
| 19 | #include <part.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 20 | #include <linux/bitops.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 21 | #include <linux/delay.h> |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 22 | #include <power/regulator.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 23 | #include <malloc.h> |
Simon Glass | 2dd337a | 2015-09-02 17:24:58 -0600 | [diff] [blame] | 24 | #include <memalign.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 25 | #include <linux/list.h> |
Rabin Vincent | 69d4e2c | 2009-04-05 13:30:54 +0530 | [diff] [blame] | 26 | #include <div64.h> |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 27 | #include "mmc_private.h" |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 28 | |
Jean-Jacques Hiblot | 201559c | 2019-07-02 10:53:54 +0200 | [diff] [blame] | 29 | #define DEFAULT_CMD6_TIMEOUT_MS 500 |
| 30 | |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 31 | static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage); |
Marek Vasut | f537e39 | 2016-12-01 02:06:33 +0100 | [diff] [blame] | 32 | |
Simon Glass | eba48f9 | 2017-07-29 11:35:31 -0600 | [diff] [blame] | 33 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 34 | |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 35 | static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 36 | { |
Loic Poulain | 9c32f4f | 2022-05-26 16:37:21 +0200 | [diff] [blame] | 37 | if (mmc->cfg->ops->wait_dat0) |
| 38 | return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us); |
| 39 | |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 40 | return -ENOSYS; |
| 41 | } |
| 42 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 43 | __weak int board_mmc_getwp(struct mmc *mmc) |
Nikita Kiryanov | 020f261 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 44 | { |
| 45 | return -1; |
| 46 | } |
| 47 | |
| 48 | int mmc_getwp(struct mmc *mmc) |
| 49 | { |
| 50 | int wp; |
| 51 | |
| 52 | wp = board_mmc_getwp(mmc); |
| 53 | |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 54 | if (wp < 0) { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 55 | if (mmc->cfg->ops->getwp) |
| 56 | wp = mmc->cfg->ops->getwp(mmc); |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 57 | else |
| 58 | wp = 0; |
| 59 | } |
Nikita Kiryanov | 020f261 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 60 | |
| 61 | return wp; |
| 62 | } |
| 63 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 64 | __weak int board_mmc_getcd(struct mmc *mmc) |
| 65 | { |
Stefano Babic | 6e00edf | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 66 | return -1; |
| 67 | } |
Simon Glass | 394dfc0 | 2016-06-12 23:30:22 -0600 | [diff] [blame] | 68 | #endif |
Stefano Babic | 6e00edf | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 69 | |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 70 | #ifdef CONFIG_MMC_TRACE |
| 71 | void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 72 | { |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 73 | printf("CMD_SEND:%d\n", cmd->cmdidx); |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 74 | printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg); |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 75 | } |
Marek Vasut | dccb608 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 76 | |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 77 | void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret) |
| 78 | { |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 79 | int i; |
| 80 | u8 *ptr; |
| 81 | |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 82 | if (ret) { |
| 83 | printf("\t\tRET\t\t\t %d\n", ret); |
| 84 | } else { |
| 85 | switch (cmd->resp_type) { |
| 86 | case MMC_RSP_NONE: |
| 87 | printf("\t\tMMC_RSP_NONE\n"); |
| 88 | break; |
| 89 | case MMC_RSP_R1: |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 90 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 91 | cmd->response[0]); |
| 92 | break; |
| 93 | case MMC_RSP_R1b: |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 94 | printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 95 | cmd->response[0]); |
| 96 | break; |
| 97 | case MMC_RSP_R2: |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 98 | printf("\t\tMMC_RSP_R2\t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 99 | cmd->response[0]); |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 100 | printf("\t\t \t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 101 | cmd->response[1]); |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 102 | printf("\t\t \t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 103 | cmd->response[2]); |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 104 | printf("\t\t \t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 105 | cmd->response[3]); |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 106 | printf("\n"); |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 107 | printf("\t\t\t\t\tDUMPING DATA\n"); |
| 108 | for (i = 0; i < 4; i++) { |
| 109 | int j; |
| 110 | printf("\t\t\t\t\t%03d - ", i*4); |
| 111 | ptr = (u8 *)&cmd->response[i]; |
| 112 | ptr += 3; |
| 113 | for (j = 0; j < 4; j++) |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 114 | printf("%02x ", *ptr--); |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 115 | printf("\n"); |
| 116 | } |
| 117 | break; |
| 118 | case MMC_RSP_R3: |
Marek Vasut | 6eeee30 | 2019-03-23 18:54:45 +0100 | [diff] [blame] | 119 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n", |
Bin Meng | 8d1ad1e | 2016-03-17 21:53:14 -0700 | [diff] [blame] | 120 | cmd->response[0]); |
| 121 | break; |
| 122 | default: |
| 123 | printf("\t\tERROR MMC rsp not supported\n"); |
| 124 | break; |
Bin Meng | 4a4ef87 | 2016-03-17 21:53:13 -0700 | [diff] [blame] | 125 | } |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 126 | } |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd) |
| 130 | { |
| 131 | int status; |
| 132 | |
| 133 | status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9; |
| 134 | printf("CURR STATE:%d\n", status); |
| 135 | } |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 136 | #endif |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 137 | |
Pali Rohár | 377ecee | 2022-04-03 00:20:10 +0200 | [diff] [blame] | 138 | #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG) || CONFIG_VAL(LOGLEVEL) >= LOGL_DEBUG |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 139 | const char *mmc_mode_name(enum bus_mode mode) |
| 140 | { |
| 141 | static const char *const names[] = { |
| 142 | [MMC_LEGACY] = "MMC legacy", |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 143 | [MMC_HS] = "MMC High Speed (26MHz)", |
| 144 | [SD_HS] = "SD High Speed (50MHz)", |
| 145 | [UHS_SDR12] = "UHS SDR12 (25MHz)", |
| 146 | [UHS_SDR25] = "UHS SDR25 (50MHz)", |
| 147 | [UHS_SDR50] = "UHS SDR50 (100MHz)", |
| 148 | [UHS_SDR104] = "UHS SDR104 (208MHz)", |
| 149 | [UHS_DDR50] = "UHS DDR50 (50MHz)", |
| 150 | [MMC_HS_52] = "MMC High Speed (52MHz)", |
| 151 | [MMC_DDR_52] = "MMC DDR52 (52MHz)", |
| 152 | [MMC_HS_200] = "HS200 (200MHz)", |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 153 | [MMC_HS_400] = "HS400 (200MHz)", |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 154 | [MMC_HS_400_ES] = "HS400ES (200MHz)", |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 155 | }; |
| 156 | |
| 157 | if (mode >= MMC_MODES_END) |
| 158 | return "Unknown mode"; |
| 159 | else |
| 160 | return names[mode]; |
| 161 | } |
| 162 | #endif |
| 163 | |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 164 | static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode) |
| 165 | { |
| 166 | static const int freqs[] = { |
Jaehoon Chung | 7c5c730 | 2018-01-30 14:10:16 +0900 | [diff] [blame] | 167 | [MMC_LEGACY] = 25000000, |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 168 | [MMC_HS] = 26000000, |
| 169 | [SD_HS] = 50000000, |
Jaehoon Chung | 7c5c730 | 2018-01-30 14:10:16 +0900 | [diff] [blame] | 170 | [MMC_HS_52] = 52000000, |
| 171 | [MMC_DDR_52] = 52000000, |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 172 | [UHS_SDR12] = 25000000, |
| 173 | [UHS_SDR25] = 50000000, |
| 174 | [UHS_SDR50] = 100000000, |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 175 | [UHS_DDR50] = 50000000, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 176 | [UHS_SDR104] = 208000000, |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 177 | [MMC_HS_200] = 200000000, |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 178 | [MMC_HS_400] = 200000000, |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 179 | [MMC_HS_400_ES] = 200000000, |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 180 | }; |
| 181 | |
| 182 | if (mode == MMC_LEGACY) |
| 183 | return mmc->legacy_speed; |
| 184 | else if (mode >= MMC_MODES_END) |
| 185 | return 0; |
| 186 | else |
| 187 | return freqs[mode]; |
| 188 | } |
| 189 | |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 190 | static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode) |
| 191 | { |
| 192 | mmc->selected_mode = mode; |
Jean-Jacques Hiblot | 7842231 | 2017-09-21 16:29:55 +0200 | [diff] [blame] | 193 | mmc->tran_speed = mmc_mode2freq(mmc, mode); |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 194 | mmc->ddr_mode = mmc_is_mode_ddr(mode); |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 195 | pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode), |
| 196 | mmc->tran_speed / 1000000); |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 197 | return 0; |
| 198 | } |
| 199 | |
Simon Glass | eba48f9 | 2017-07-29 11:35:31 -0600 | [diff] [blame] | 200 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Simon Glass | b23d96e | 2016-06-12 23:30:20 -0600 | [diff] [blame] | 201 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
| 202 | { |
| 203 | int ret; |
| 204 | |
| 205 | mmmc_trace_before_send(mmc, cmd); |
| 206 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
| 207 | mmmc_trace_after_send(mmc, cmd, ret); |
| 208 | |
Marek Vasut | dccb608 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 209 | return ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 210 | } |
Simon Glass | 394dfc0 | 2016-06-12 23:30:22 -0600 | [diff] [blame] | 211 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 212 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 213 | /** |
| 214 | * mmc_send_cmd_retry() - send a command to the mmc device, retrying on error |
| 215 | * |
| 216 | * @dev: device to receive the command |
| 217 | * @cmd: command to send |
| 218 | * @data: additional data to send/receive |
| 219 | * @retries: how many times to retry; mmc_send_cmd is always called at least |
| 220 | * once |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 221 | * Return: 0 if ok, -ve on error |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 222 | */ |
| 223 | static int mmc_send_cmd_retry(struct mmc *mmc, struct mmc_cmd *cmd, |
| 224 | struct mmc_data *data, uint retries) |
| 225 | { |
| 226 | int ret; |
| 227 | |
| 228 | do { |
| 229 | ret = mmc_send_cmd(mmc, cmd, data); |
| 230 | } while (ret && retries--); |
| 231 | |
| 232 | return ret; |
| 233 | } |
| 234 | |
| 235 | /** |
| 236 | * mmc_send_cmd_quirks() - send a command to the mmc device, retrying if a |
| 237 | * specific quirk is enabled |
| 238 | * |
| 239 | * @dev: device to receive the command |
| 240 | * @cmd: command to send |
| 241 | * @data: additional data to send/receive |
| 242 | * @quirk: retry only if this quirk is enabled |
| 243 | * @retries: how many times to retry; mmc_send_cmd is always called at least |
| 244 | * once |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 245 | * Return: 0 if ok, -ve on error |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 246 | */ |
| 247 | static int mmc_send_cmd_quirks(struct mmc *mmc, struct mmc_cmd *cmd, |
| 248 | struct mmc_data *data, u32 quirk, uint retries) |
| 249 | { |
Simon Glass | 68f3ced | 2023-02-05 15:40:16 -0700 | [diff] [blame] | 250 | if (IS_ENABLED(CONFIG_MMC_QUIRKS) && mmc->quirks & quirk) |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 251 | return mmc_send_cmd_retry(mmc, cmd, data, retries); |
| 252 | else |
| 253 | return mmc_send_cmd(mmc, cmd, data); |
| 254 | } |
| 255 | |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 256 | int mmc_send_status(struct mmc *mmc, unsigned int *status) |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 257 | { |
| 258 | struct mmc_cmd cmd; |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 259 | int ret; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 260 | |
| 261 | cmd.cmdidx = MMC_CMD_SEND_STATUS; |
| 262 | cmd.resp_type = MMC_RSP_R1; |
Marek Vasut | c442739 | 2011-08-10 09:24:48 +0200 | [diff] [blame] | 263 | if (!mmc_host_is_spi(mmc)) |
| 264 | cmd.cmdarg = mmc->rca << 16; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 265 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 266 | ret = mmc_send_cmd_retry(mmc, &cmd, NULL, 4); |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 267 | mmc_trace_state(mmc, &cmd); |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 268 | if (!ret) |
| 269 | *status = cmd.response[0]; |
| 270 | |
| 271 | return ret; |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 272 | } |
| 273 | |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 274 | int mmc_poll_for_busy(struct mmc *mmc, int timeout_ms) |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 275 | { |
| 276 | unsigned int status; |
| 277 | int err; |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 278 | |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 279 | err = mmc_wait_dat0(mmc, 1, timeout_ms * 1000); |
Jean-Jacques Hiblot | 4f04a32 | 2019-07-02 10:53:53 +0200 | [diff] [blame] | 280 | if (err != -ENOSYS) |
| 281 | return err; |
| 282 | |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 283 | while (1) { |
| 284 | err = mmc_send_status(mmc, &status); |
| 285 | if (err) |
| 286 | return err; |
| 287 | |
| 288 | if ((status & MMC_STATUS_RDY_FOR_DATA) && |
| 289 | (status & MMC_STATUS_CURR_STATE) != |
| 290 | MMC_STATE_PRG) |
| 291 | break; |
| 292 | |
| 293 | if (status & MMC_STATUS_MASK) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 294 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 295 | pr_err("Status Error: 0x%08x\n", status); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 296 | #endif |
Jean-Jacques Hiblot | 443edbe | 2019-07-02 10:53:52 +0200 | [diff] [blame] | 297 | return -ECOMM; |
| 298 | } |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 299 | |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 300 | if (timeout_ms-- <= 0) |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 301 | break; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 302 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 303 | udelay(1000); |
| 304 | } |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 305 | |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 306 | if (timeout_ms <= 0) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 307 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 308 | pr_err("Timeout waiting card ready\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 309 | #endif |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 310 | return -ETIMEDOUT; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 311 | } |
| 312 | |
| 313 | return 0; |
| 314 | } |
| 315 | |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 316 | int mmc_set_blocklen(struct mmc *mmc, int len) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 317 | { |
| 318 | struct mmc_cmd cmd; |
| 319 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 320 | if (mmc->ddr_mode) |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 321 | return 0; |
| 322 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 323 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; |
| 324 | cmd.resp_type = MMC_RSP_R1; |
| 325 | cmd.cmdarg = len; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 326 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 327 | return mmc_send_cmd_quirks(mmc, &cmd, NULL, |
| 328 | MMC_QUIRK_RETRY_SET_BLOCKLEN, 4); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 329 | } |
| 330 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 331 | #ifdef MMC_SUPPORTS_TUNING |
Jean-Jacques Hiblot | 71264bb | 2017-09-21 16:30:12 +0200 | [diff] [blame] | 332 | static const u8 tuning_blk_pattern_4bit[] = { |
| 333 | 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, |
| 334 | 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, |
| 335 | 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, |
| 336 | 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, |
| 337 | 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, |
| 338 | 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, |
| 339 | 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, |
| 340 | 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, |
| 341 | }; |
| 342 | |
| 343 | static const u8 tuning_blk_pattern_8bit[] = { |
| 344 | 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, |
| 345 | 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, |
| 346 | 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, |
| 347 | 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, |
| 348 | 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, |
| 349 | 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, |
| 350 | 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, |
| 351 | 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, |
| 352 | 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, |
| 353 | 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, |
| 354 | 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, |
| 355 | 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, |
| 356 | 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, |
| 357 | 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, |
| 358 | 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, |
| 359 | 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, |
| 360 | }; |
| 361 | |
| 362 | int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error) |
| 363 | { |
| 364 | struct mmc_cmd cmd; |
| 365 | struct mmc_data data; |
| 366 | const u8 *tuning_block_pattern; |
| 367 | int size, err; |
| 368 | |
| 369 | if (mmc->bus_width == 8) { |
| 370 | tuning_block_pattern = tuning_blk_pattern_8bit; |
| 371 | size = sizeof(tuning_blk_pattern_8bit); |
| 372 | } else if (mmc->bus_width == 4) { |
| 373 | tuning_block_pattern = tuning_blk_pattern_4bit; |
| 374 | size = sizeof(tuning_blk_pattern_4bit); |
| 375 | } else { |
| 376 | return -EINVAL; |
| 377 | } |
| 378 | |
| 379 | ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size); |
| 380 | |
| 381 | cmd.cmdidx = opcode; |
| 382 | cmd.cmdarg = 0; |
| 383 | cmd.resp_type = MMC_RSP_R1; |
| 384 | |
| 385 | data.dest = (void *)data_buf; |
| 386 | data.blocks = 1; |
| 387 | data.blocksize = size; |
| 388 | data.flags = MMC_DATA_READ; |
| 389 | |
| 390 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 391 | if (err) |
| 392 | return err; |
| 393 | |
| 394 | if (memcmp(data_buf, tuning_block_pattern, size)) |
| 395 | return -EIO; |
| 396 | |
| 397 | return 0; |
| 398 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 399 | #endif |
Jean-Jacques Hiblot | 71264bb | 2017-09-21 16:30:12 +0200 | [diff] [blame] | 400 | |
Sascha Silbe | 4bdf6fd | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 401 | static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 402 | lbaint_t blkcnt) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 403 | { |
| 404 | struct mmc_cmd cmd; |
| 405 | struct mmc_data data; |
| 406 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 407 | if (blkcnt > 1) |
| 408 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; |
| 409 | else |
| 410 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 411 | |
| 412 | if (mmc->high_capacity) |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 413 | cmd.cmdarg = start; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 414 | else |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 415 | cmd.cmdarg = start * mmc->read_bl_len; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 416 | |
| 417 | cmd.resp_type = MMC_RSP_R1; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 418 | |
| 419 | data.dest = dst; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 420 | data.blocks = blkcnt; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 421 | data.blocksize = mmc->read_bl_len; |
| 422 | data.flags = MMC_DATA_READ; |
| 423 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 424 | if (mmc_send_cmd(mmc, &cmd, &data)) |
| 425 | return 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 426 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 427 | if (blkcnt > 1) { |
| 428 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
| 429 | cmd.cmdarg = 0; |
| 430 | cmd.resp_type = MMC_RSP_R1b; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 431 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 432 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 433 | pr_err("mmc fail to send stop cmd\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 434 | #endif |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 435 | return 0; |
| 436 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 437 | } |
| 438 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 439 | return blkcnt; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 440 | } |
| 441 | |
Marek Vasut | 31976d9 | 2020-04-04 12:45:05 +0200 | [diff] [blame] | 442 | #if !CONFIG_IS_ENABLED(DM_MMC) |
| 443 | static int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt) |
| 444 | { |
| 445 | if (mmc->cfg->ops->get_b_max) |
| 446 | return mmc->cfg->ops->get_b_max(mmc, dst, blkcnt); |
| 447 | else |
| 448 | return mmc->cfg->b_max; |
| 449 | } |
| 450 | #endif |
| 451 | |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 452 | #if CONFIG_IS_ENABLED(BLK) |
Simon Glass | 62e293a | 2016-06-12 23:30:15 -0600 | [diff] [blame] | 453 | ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst) |
Simon Glass | 59bc6f2 | 2016-05-01 13:52:41 -0600 | [diff] [blame] | 454 | #else |
Simon Glass | 62e293a | 2016-06-12 23:30:15 -0600 | [diff] [blame] | 455 | ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, |
| 456 | void *dst) |
Simon Glass | 59bc6f2 | 2016-05-01 13:52:41 -0600 | [diff] [blame] | 457 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 458 | { |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 459 | #if CONFIG_IS_ENABLED(BLK) |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 460 | struct blk_desc *block_dev = dev_get_uclass_plat(dev); |
Simon Glass | 59bc6f2 | 2016-05-01 13:52:41 -0600 | [diff] [blame] | 461 | #endif |
Simon Glass | 2f26fff | 2016-02-29 15:25:51 -0700 | [diff] [blame] | 462 | int dev_num = block_dev->devnum; |
Stephen Warren | 1e0f92a | 2015-12-07 11:38:49 -0700 | [diff] [blame] | 463 | int err; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 464 | lbaint_t cur, blocks_todo = blkcnt; |
Marek Vasut | 31976d9 | 2020-04-04 12:45:05 +0200 | [diff] [blame] | 465 | uint b_max; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 466 | |
| 467 | if (blkcnt == 0) |
| 468 | return 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 469 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 470 | struct mmc *mmc = find_mmc_device(dev_num); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 471 | if (!mmc) |
| 472 | return 0; |
| 473 | |
Marek Vasut | f537e39 | 2016-12-01 02:06:33 +0100 | [diff] [blame] | 474 | if (CONFIG_IS_ENABLED(MMC_TINY)) |
| 475 | err = mmc_switch_part(mmc, block_dev->hwpart); |
| 476 | else |
| 477 | err = blk_dselect_hwpart(block_dev, block_dev->hwpart); |
| 478 | |
Stephen Warren | 1e0f92a | 2015-12-07 11:38:49 -0700 | [diff] [blame] | 479 | if (err < 0) |
| 480 | return 0; |
| 481 | |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 482 | if ((start + blkcnt) > block_dev->lba) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 483 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 484 | pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", |
| 485 | start + blkcnt, block_dev->lba); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 486 | #endif |
Lei Wen | e1cc9c8 | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 487 | return 0; |
| 488 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 489 | |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 490 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 491 | pr_debug("%s: Failed to set blocklen\n", __func__); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 492 | return 0; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 493 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 494 | |
Marek Vasut | 31976d9 | 2020-04-04 12:45:05 +0200 | [diff] [blame] | 495 | b_max = mmc_get_b_max(mmc, dst, blkcnt); |
| 496 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 497 | do { |
Marek Vasut | 31976d9 | 2020-04-04 12:45:05 +0200 | [diff] [blame] | 498 | cur = (blocks_todo > b_max) ? b_max : blocks_todo; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 499 | if (mmc_read_blocks(mmc, dst, start, cur) != cur) { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 500 | pr_debug("%s: Failed to read blocks\n", __func__); |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 501 | return 0; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 502 | } |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 503 | blocks_todo -= cur; |
| 504 | start += cur; |
| 505 | dst += cur * mmc->read_bl_len; |
| 506 | } while (blocks_todo > 0); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 507 | |
| 508 | return blkcnt; |
| 509 | } |
| 510 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 511 | static int mmc_go_idle(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 512 | { |
| 513 | struct mmc_cmd cmd; |
| 514 | int err; |
| 515 | |
| 516 | udelay(1000); |
| 517 | |
| 518 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; |
| 519 | cmd.cmdarg = 0; |
| 520 | cmd.resp_type = MMC_RSP_NONE; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 521 | |
| 522 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 523 | |
| 524 | if (err) |
| 525 | return err; |
| 526 | |
| 527 | udelay(2000); |
| 528 | |
| 529 | return 0; |
| 530 | } |
| 531 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 532 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 533 | static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage) |
| 534 | { |
| 535 | struct mmc_cmd cmd; |
| 536 | int err = 0; |
| 537 | |
| 538 | /* |
| 539 | * Send CMD11 only if the request is to switch the card to |
| 540 | * 1.8V signalling. |
| 541 | */ |
| 542 | if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) |
| 543 | return mmc_set_signal_voltage(mmc, signal_voltage); |
| 544 | |
| 545 | cmd.cmdidx = SD_CMD_SWITCH_UHS18V; |
| 546 | cmd.cmdarg = 0; |
| 547 | cmd.resp_type = MMC_RSP_R1; |
| 548 | |
| 549 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 550 | if (err) |
| 551 | return err; |
| 552 | |
| 553 | if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR)) |
| 554 | return -EIO; |
| 555 | |
| 556 | /* |
| 557 | * The card should drive cmd and dat[0:3] low immediately |
| 558 | * after the response of cmd11, but wait 100 us to be sure |
| 559 | */ |
| 560 | err = mmc_wait_dat0(mmc, 0, 100); |
| 561 | if (err == -ENOSYS) |
| 562 | udelay(100); |
| 563 | else if (err) |
| 564 | return -ETIMEDOUT; |
| 565 | |
| 566 | /* |
| 567 | * During a signal voltage level switch, the clock must be gated |
| 568 | * for 5 ms according to the SD spec |
| 569 | */ |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 570 | mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE); |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 571 | |
| 572 | err = mmc_set_signal_voltage(mmc, signal_voltage); |
| 573 | if (err) |
| 574 | return err; |
| 575 | |
| 576 | /* Keep clock gated for at least 10 ms, though spec only says 5 ms */ |
| 577 | mdelay(10); |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 578 | mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE); |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 579 | |
| 580 | /* |
| 581 | * Failure to switch is indicated by the card holding |
| 582 | * dat[0:3] low. Wait for at least 1 ms according to spec |
| 583 | */ |
| 584 | err = mmc_wait_dat0(mmc, 1, 1000); |
| 585 | if (err == -ENOSYS) |
| 586 | udelay(1000); |
| 587 | else if (err) |
| 588 | return -ETIMEDOUT; |
| 589 | |
| 590 | return 0; |
| 591 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 592 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 593 | |
| 594 | static int sd_send_op_cond(struct mmc *mmc, bool uhs_en) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 595 | { |
| 596 | int timeout = 1000; |
| 597 | int err; |
| 598 | struct mmc_cmd cmd; |
| 599 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 600 | while (1) { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 601 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 602 | cmd.resp_type = MMC_RSP_R1; |
| 603 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 604 | |
| 605 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 606 | |
| 607 | if (err) |
| 608 | return err; |
| 609 | |
| 610 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; |
| 611 | cmd.resp_type = MMC_RSP_R3; |
Stefano Babic | f8e9a21 | 2010-01-20 18:20:39 +0100 | [diff] [blame] | 612 | |
| 613 | /* |
| 614 | * Most cards do not answer if some reserved bits |
| 615 | * in the ocr are set. However, Some controller |
| 616 | * can set bit 7 (reserved for low voltages), but |
| 617 | * how to manage low voltages SD card is not yet |
| 618 | * specified. |
| 619 | */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 620 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 621 | (mmc->cfg->voltages & 0xff8000); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 622 | |
| 623 | if (mmc->version == SD_VERSION_2) |
| 624 | cmd.cmdarg |= OCR_HCS; |
| 625 | |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 626 | if (uhs_en) |
| 627 | cmd.cmdarg |= OCR_S18R; |
| 628 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 629 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 630 | |
| 631 | if (err) |
| 632 | return err; |
| 633 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 634 | if (cmd.response[0] & OCR_BUSY) |
| 635 | break; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 636 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 637 | if (timeout-- <= 0) |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 638 | return -EOPNOTSUPP; |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 639 | |
| 640 | udelay(1000); |
| 641 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 642 | |
| 643 | if (mmc->version != SD_VERSION_2) |
| 644 | mmc->version = SD_VERSION_1_0; |
| 645 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 646 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 647 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 648 | cmd.resp_type = MMC_RSP_R3; |
| 649 | cmd.cmdarg = 0; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 650 | |
| 651 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 652 | |
| 653 | if (err) |
| 654 | return err; |
| 655 | } |
| 656 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 657 | mmc->ocr = cmd.response[0]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 658 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 659 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 660 | if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000) |
| 661 | == 0x41000000) { |
| 662 | err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180); |
| 663 | if (err) |
| 664 | return err; |
| 665 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 666 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 667 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 668 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
| 669 | mmc->rca = 0; |
| 670 | |
| 671 | return 0; |
| 672 | } |
| 673 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 674 | static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 675 | { |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 676 | struct mmc_cmd cmd; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 677 | int err; |
| 678 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 679 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; |
| 680 | cmd.resp_type = MMC_RSP_R3; |
| 681 | cmd.cmdarg = 0; |
Rob Herring | 5fd3edd | 2015-03-23 17:56:59 -0500 | [diff] [blame] | 682 | if (use_arg && !mmc_host_is_spi(mmc)) |
| 683 | cmd.cmdarg = OCR_HCS | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 684 | (mmc->cfg->voltages & |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 685 | (mmc->ocr & OCR_VOLTAGE_MASK)) | |
| 686 | (mmc->ocr & OCR_ACCESS_MODE); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 687 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 688 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 689 | if (err) |
| 690 | return err; |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 691 | mmc->ocr = cmd.response[0]; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 692 | return 0; |
| 693 | } |
| 694 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 695 | static int mmc_send_op_cond(struct mmc *mmc) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 696 | { |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 697 | int err, i; |
Haibo Chen | 7194951 | 2020-06-15 17:18:12 +0800 | [diff] [blame] | 698 | int timeout = 1000; |
| 699 | uint start; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 700 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 701 | /* Some cards seem to need this */ |
| 702 | mmc_go_idle(mmc); |
| 703 | |
Haibo Chen | 7194951 | 2020-06-15 17:18:12 +0800 | [diff] [blame] | 704 | start = get_timer(0); |
Wolfgang Denk | 62fb2b4 | 2021-09-27 17:42:39 +0200 | [diff] [blame] | 705 | /* Asking to the card its capabilities */ |
Haibo Chen | 7194951 | 2020-06-15 17:18:12 +0800 | [diff] [blame] | 706 | for (i = 0; ; i++) { |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 707 | err = mmc_send_op_cond_iter(mmc, i != 0); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 708 | if (err) |
| 709 | return err; |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 710 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 711 | /* exit if not busy (flag seems to be inverted) */ |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 712 | if (mmc->ocr & OCR_BUSY) |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 713 | break; |
Haibo Chen | 7194951 | 2020-06-15 17:18:12 +0800 | [diff] [blame] | 714 | |
| 715 | if (get_timer(start) > timeout) |
| 716 | return -ETIMEDOUT; |
| 717 | udelay(100); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 718 | } |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 719 | mmc->op_cond_pending = 1; |
| 720 | return 0; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 721 | } |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 722 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 723 | static int mmc_complete_op_cond(struct mmc *mmc) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 724 | { |
| 725 | struct mmc_cmd cmd; |
| 726 | int timeout = 1000; |
Vipul Kumar | dbad7b4 | 2018-05-03 12:20:54 +0530 | [diff] [blame] | 727 | ulong start; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 728 | int err; |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 729 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 730 | mmc->op_cond_pending = 0; |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 731 | if (!(mmc->ocr & OCR_BUSY)) { |
Yangbo Lu | 9c72061 | 2016-08-02 15:33:18 +0800 | [diff] [blame] | 732 | /* Some cards seem to need this */ |
| 733 | mmc_go_idle(mmc); |
| 734 | |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 735 | start = get_timer(0); |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 736 | while (1) { |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 737 | err = mmc_send_op_cond_iter(mmc, 1); |
| 738 | if (err) |
| 739 | return err; |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 740 | if (mmc->ocr & OCR_BUSY) |
| 741 | break; |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 742 | if (get_timer(start) > timeout) |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 743 | return -EOPNOTSUPP; |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 744 | udelay(100); |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 745 | } |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 746 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 747 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 748 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 749 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 750 | cmd.resp_type = MMC_RSP_R3; |
| 751 | cmd.cmdarg = 0; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 752 | |
| 753 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 754 | |
| 755 | if (err) |
| 756 | return err; |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 757 | |
| 758 | mmc->ocr = cmd.response[0]; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 759 | } |
| 760 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 761 | mmc->version = MMC_VERSION_UNKNOWN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 762 | |
| 763 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
Stephen Warren | f6545f1 | 2014-01-30 16:11:12 -0700 | [diff] [blame] | 764 | mmc->rca = 1; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 765 | |
| 766 | return 0; |
| 767 | } |
| 768 | |
| 769 | |
Heinrich Schuchardt | bf230e1 | 2020-03-30 07:24:17 +0200 | [diff] [blame] | 770 | int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 771 | { |
| 772 | struct mmc_cmd cmd; |
| 773 | struct mmc_data data; |
| 774 | int err; |
| 775 | |
| 776 | /* Get the Card Status Register */ |
| 777 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; |
| 778 | cmd.resp_type = MMC_RSP_R1; |
| 779 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 780 | |
Yoshihiro Shimoda | f6bec73 | 2012-06-07 19:09:11 +0000 | [diff] [blame] | 781 | data.dest = (char *)ext_csd; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 782 | data.blocks = 1; |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 783 | data.blocksize = MMC_MAX_BLOCK_LEN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 784 | data.flags = MMC_DATA_READ; |
| 785 | |
| 786 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 787 | |
| 788 | return err; |
| 789 | } |
| 790 | |
Marek Vasut | 8a96647 | 2019-02-06 11:34:27 +0100 | [diff] [blame] | 791 | static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, |
| 792 | bool send_status) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 793 | { |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 794 | unsigned int status, start; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 795 | struct mmc_cmd cmd; |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 796 | int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS; |
Jean-Jacques Hiblot | 7f5b169 | 2019-07-02 10:53:55 +0200 | [diff] [blame] | 797 | bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) && |
| 798 | (index == EXT_CSD_PART_CONF); |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 799 | int ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 800 | |
Jean-Jacques Hiblot | 201559c | 2019-07-02 10:53:54 +0200 | [diff] [blame] | 801 | if (mmc->gen_cmd6_time) |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 802 | timeout_ms = mmc->gen_cmd6_time * 10; |
Jean-Jacques Hiblot | 201559c | 2019-07-02 10:53:54 +0200 | [diff] [blame] | 803 | |
Jean-Jacques Hiblot | 7f5b169 | 2019-07-02 10:53:55 +0200 | [diff] [blame] | 804 | if (is_part_switch && mmc->part_switch_time) |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 805 | timeout_ms = mmc->part_switch_time * 10; |
Jean-Jacques Hiblot | 7f5b169 | 2019-07-02 10:53:55 +0200 | [diff] [blame] | 806 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 807 | cmd.cmdidx = MMC_CMD_SWITCH; |
| 808 | cmd.resp_type = MMC_RSP_R1b; |
| 809 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 810 | (index << 16) | |
| 811 | (value << 8); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 812 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 813 | ret = mmc_send_cmd_retry(mmc, &cmd, NULL, 3); |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 814 | if (ret) |
| 815 | return ret; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 816 | |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 817 | start = get_timer(0); |
Marek Vasut | 8a96647 | 2019-02-06 11:34:27 +0100 | [diff] [blame] | 818 | |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 819 | /* poll dat0 for rdy/buys status */ |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 820 | ret = mmc_wait_dat0(mmc, 1, timeout_ms * 1000); |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 821 | if (ret && ret != -ENOSYS) |
| 822 | return ret; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 823 | |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 824 | /* |
Kirill Kapranov | cd9ea64 | 2021-10-09 23:49:59 +0300 | [diff] [blame] | 825 | * In cases when neiter allowed to poll by using CMD13 nor we are |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 826 | * capable of polling by using mmc_wait_dat0, then rely on waiting the |
| 827 | * stated timeout to be sufficient. |
| 828 | */ |
Kirill Kapranov | cd9ea64 | 2021-10-09 23:49:59 +0300 | [diff] [blame] | 829 | if (ret == -ENOSYS && !send_status) { |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 830 | mdelay(timeout_ms); |
Haibo Chen | d8de5e4 | 2020-09-22 18:11:42 +0800 | [diff] [blame] | 831 | return 0; |
| 832 | } |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 833 | |
Marek Vasut | 946e06f | 2022-07-15 01:58:24 +0200 | [diff] [blame] | 834 | if (!send_status) |
| 835 | return 0; |
| 836 | |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 837 | /* Finally wait until the card is ready or indicates a failure |
| 838 | * to switch. It doesn't hurt to use CMD13 here even if send_status |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 839 | * is false, because by now (after 'timeout_ms' ms) the bus should be |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 840 | * reliable. |
| 841 | */ |
| 842 | do { |
| 843 | ret = mmc_send_status(mmc, &status); |
| 844 | |
| 845 | if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) { |
| 846 | pr_debug("switch failed %d/%d/0x%x !\n", set, index, |
| 847 | value); |
| 848 | return -EIO; |
| 849 | } |
Stefan Bosch | a463bbe | 2021-01-23 13:37:41 +0100 | [diff] [blame] | 850 | if (!ret && (status & MMC_STATUS_RDY_FOR_DATA) && |
| 851 | (status & MMC_STATUS_CURR_STATE) == MMC_STATE_TRANS) |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 852 | return 0; |
| 853 | udelay(100); |
Sam Protsenko | db174c6 | 2019-08-14 22:52:51 +0300 | [diff] [blame] | 854 | } while (get_timer(start) < timeout_ms); |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 855 | |
Jean-Jacques Hiblot | 5a7cf40 | 2019-07-02 10:53:56 +0200 | [diff] [blame] | 856 | return -ETIMEDOUT; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 857 | } |
| 858 | |
Marek Vasut | 8a96647 | 2019-02-06 11:34:27 +0100 | [diff] [blame] | 859 | int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) |
| 860 | { |
| 861 | return __mmc_switch(mmc, set, index, value, true); |
| 862 | } |
| 863 | |
Heinrich Schuchardt | 75e5a64 | 2020-03-30 07:24:19 +0200 | [diff] [blame] | 864 | int mmc_boot_wp(struct mmc *mmc) |
| 865 | { |
| 866 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 1); |
| 867 | } |
| 868 | |
Ying-Chun Liu (PaulLiu) | 4493cb5 | 2022-04-25 21:59:02 +0800 | [diff] [blame] | 869 | int mmc_boot_wp_single_partition(struct mmc *mmc, int partition) |
| 870 | { |
| 871 | u8 value; |
| 872 | int ret; |
| 873 | |
| 874 | value = EXT_CSD_BOOT_WP_B_PWR_WP_EN; |
| 875 | |
| 876 | if (partition == 0) { |
| 877 | value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL; |
| 878 | ret = mmc_switch(mmc, |
| 879 | EXT_CSD_CMD_SET_NORMAL, |
| 880 | EXT_CSD_BOOT_WP, |
| 881 | value); |
| 882 | } else if (partition == 1) { |
| 883 | value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL; |
| 884 | value |= EXT_CSD_BOOT_WP_B_PWR_WP_SEC_SEL; |
| 885 | ret = mmc_switch(mmc, |
| 886 | EXT_CSD_CMD_SET_NORMAL, |
| 887 | EXT_CSD_BOOT_WP, |
| 888 | value); |
| 889 | } else { |
| 890 | ret = mmc_boot_wp(mmc); |
| 891 | } |
| 892 | |
| 893 | return ret; |
| 894 | } |
| 895 | |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 896 | #if !CONFIG_IS_ENABLED(MMC_TINY) |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 897 | static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode, |
| 898 | bool hsdowngrade) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 899 | { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 900 | int err; |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 901 | int speed_bits; |
| 902 | |
| 903 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); |
| 904 | |
| 905 | switch (mode) { |
| 906 | case MMC_HS: |
| 907 | case MMC_HS_52: |
| 908 | case MMC_DDR_52: |
| 909 | speed_bits = EXT_CSD_TIMING_HS; |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 910 | break; |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 911 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 912 | case MMC_HS_200: |
| 913 | speed_bits = EXT_CSD_TIMING_HS200; |
| 914 | break; |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 915 | #endif |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 916 | #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) |
| 917 | case MMC_HS_400: |
| 918 | speed_bits = EXT_CSD_TIMING_HS400; |
| 919 | break; |
| 920 | #endif |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 921 | #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
| 922 | case MMC_HS_400_ES: |
| 923 | speed_bits = EXT_CSD_TIMING_HS400; |
| 924 | break; |
| 925 | #endif |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 926 | case MMC_LEGACY: |
| 927 | speed_bits = EXT_CSD_TIMING_LEGACY; |
| 928 | break; |
| 929 | default: |
| 930 | return -EINVAL; |
| 931 | } |
Marek Vasut | 8a96647 | 2019-02-06 11:34:27 +0100 | [diff] [blame] | 932 | |
| 933 | err = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, |
| 934 | speed_bits, !hsdowngrade); |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 935 | if (err) |
| 936 | return err; |
| 937 | |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 938 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ |
| 939 | CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) |
| 940 | /* |
| 941 | * In case the eMMC is in HS200/HS400 mode and we are downgrading |
| 942 | * to HS mode, the card clock are still running much faster than |
| 943 | * the supported HS mode clock, so we can not reliably read out |
| 944 | * Extended CSD. Reconfigure the controller to run at HS mode. |
| 945 | */ |
| 946 | if (hsdowngrade) { |
| 947 | mmc_select_mode(mmc, MMC_HS); |
| 948 | mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false); |
| 949 | } |
| 950 | #endif |
| 951 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 952 | if ((mode == MMC_HS) || (mode == MMC_HS_52)) { |
| 953 | /* Now check to see that it worked */ |
| 954 | err = mmc_send_ext_csd(mmc, test_csd); |
| 955 | if (err) |
| 956 | return err; |
| 957 | |
| 958 | /* No high-speed support */ |
| 959 | if (!test_csd[EXT_CSD_HS_TIMING]) |
| 960 | return -ENOTSUPP; |
| 961 | } |
| 962 | |
| 963 | return 0; |
| 964 | } |
| 965 | |
| 966 | static int mmc_get_capabilities(struct mmc *mmc) |
| 967 | { |
| 968 | u8 *ext_csd = mmc->ext_csd; |
| 969 | char cardtype; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 970 | |
Jean-Jacques Hiblot | 3f2ffc2 | 2017-11-30 17:43:56 +0100 | [diff] [blame] | 971 | mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 972 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 973 | if (mmc_host_is_spi(mmc)) |
| 974 | return 0; |
| 975 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 976 | /* Only version 4 supports high-speed */ |
| 977 | if (mmc->version < MMC_VERSION_4) |
| 978 | return 0; |
| 979 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 980 | if (!ext_csd) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 981 | pr_err("No ext_csd found!\n"); /* this should enver happen */ |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 982 | return -ENOTSUPP; |
| 983 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 984 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 985 | mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 986 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 987 | cardtype = ext_csd[EXT_CSD_CARD_TYPE]; |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 988 | mmc->cardtype = cardtype; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 989 | |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 990 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 991 | if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V | |
| 992 | EXT_CSD_CARD_TYPE_HS200_1_8V)) { |
| 993 | mmc->card_caps |= MMC_MODE_HS200; |
| 994 | } |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 995 | #endif |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 996 | #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \ |
| 997 | CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 998 | if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V | |
| 999 | EXT_CSD_CARD_TYPE_HS400_1_8V)) { |
| 1000 | mmc->card_caps |= MMC_MODE_HS400; |
| 1001 | } |
| 1002 | #endif |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 1003 | if (cardtype & EXT_CSD_CARD_TYPE_52) { |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1004 | if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 1005 | mmc->card_caps |= MMC_MODE_DDR_52MHz; |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1006 | mmc->card_caps |= MMC_MODE_HS_52MHz; |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 1007 | } |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1008 | if (cardtype & EXT_CSD_CARD_TYPE_26) |
| 1009 | mmc->card_caps |= MMC_MODE_HS; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1010 | |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 1011 | #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
| 1012 | if (ext_csd[EXT_CSD_STROBE_SUPPORT] && |
| 1013 | (mmc->card_caps & MMC_MODE_HS400)) { |
| 1014 | mmc->card_caps |= MMC_MODE_HS400_ES; |
| 1015 | } |
| 1016 | #endif |
| 1017 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1018 | return 0; |
| 1019 | } |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 1020 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1021 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1022 | static int mmc_set_capacity(struct mmc *mmc, int part_num) |
| 1023 | { |
| 1024 | switch (part_num) { |
| 1025 | case 0: |
| 1026 | mmc->capacity = mmc->capacity_user; |
| 1027 | break; |
| 1028 | case 1: |
| 1029 | case 2: |
| 1030 | mmc->capacity = mmc->capacity_boot; |
| 1031 | break; |
| 1032 | case 3: |
| 1033 | mmc->capacity = mmc->capacity_rpmb; |
| 1034 | break; |
| 1035 | case 4: |
| 1036 | case 5: |
| 1037 | case 6: |
| 1038 | case 7: |
| 1039 | mmc->capacity = mmc->capacity_gp[part_num - 4]; |
| 1040 | break; |
| 1041 | default: |
| 1042 | return -1; |
| 1043 | } |
| 1044 | |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 1045 | mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len); |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1046 | |
| 1047 | return 0; |
| 1048 | } |
| 1049 | |
Simon Glass | 62e293a | 2016-06-12 23:30:15 -0600 | [diff] [blame] | 1050 | int mmc_switch_part(struct mmc *mmc, unsigned int part_num) |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1051 | { |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1052 | int ret; |
Jean-Jacques Hiblot | faf5c95 | 2019-07-02 10:53:58 +0200 | [diff] [blame] | 1053 | int retry = 3; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1054 | |
Jean-Jacques Hiblot | faf5c95 | 2019-07-02 10:53:58 +0200 | [diff] [blame] | 1055 | do { |
| 1056 | ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1057 | EXT_CSD_PART_CONF, |
| 1058 | (mmc->part_config & ~PART_ACCESS_MASK) |
| 1059 | | (part_num & PART_ACCESS_MASK)); |
| 1060 | } while (ret && retry--); |
Peter Bigot | 45fde89 | 2014-09-02 18:31:23 -0500 | [diff] [blame] | 1061 | |
| 1062 | /* |
| 1063 | * Set the capacity if the switch succeeded or was intended |
| 1064 | * to return to representing the raw device. |
| 1065 | */ |
Stephen Warren | 1e0f92a | 2015-12-07 11:38:49 -0700 | [diff] [blame] | 1066 | if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) { |
Peter Bigot | 45fde89 | 2014-09-02 18:31:23 -0500 | [diff] [blame] | 1067 | ret = mmc_set_capacity(mmc, part_num); |
Simon Glass | 984db5d | 2016-05-01 13:52:37 -0600 | [diff] [blame] | 1068 | mmc_get_blk_desc(mmc)->hwpart = part_num; |
Stephen Warren | 1e0f92a | 2015-12-07 11:38:49 -0700 | [diff] [blame] | 1069 | } |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1070 | |
Peter Bigot | 45fde89 | 2014-09-02 18:31:23 -0500 | [diff] [blame] | 1071 | return ret; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1072 | } |
| 1073 | |
Jean-Jacques Hiblot | 1d7769a | 2017-11-30 17:44:02 +0100 | [diff] [blame] | 1074 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1075 | int mmc_hwpart_config(struct mmc *mmc, |
| 1076 | const struct mmc_hwpart_conf *conf, |
| 1077 | enum mmc_hwpart_conf_mode mode) |
| 1078 | { |
| 1079 | u8 part_attrs = 0; |
| 1080 | u32 enh_size_mult; |
| 1081 | u32 enh_start_addr; |
| 1082 | u32 gp_size_mult[4]; |
| 1083 | u32 max_enh_size_mult; |
| 1084 | u32 tot_enh_size_mult = 0; |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 1085 | u8 wr_rel_set; |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1086 | int i, pidx, err; |
| 1087 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
| 1088 | |
| 1089 | if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) |
| 1090 | return -EINVAL; |
| 1091 | |
| 1092 | if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1093 | pr_err("eMMC >= 4.4 required for enhanced user data area\n"); |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1094 | return -EMEDIUMTYPE; |
| 1095 | } |
| 1096 | |
| 1097 | if (!(mmc->part_support & PART_SUPPORT)) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1098 | pr_err("Card does not support partitioning\n"); |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1099 | return -EMEDIUMTYPE; |
| 1100 | } |
| 1101 | |
| 1102 | if (!mmc->hc_wp_grp_size) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1103 | pr_err("Card does not define HC WP group size\n"); |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1104 | return -EMEDIUMTYPE; |
| 1105 | } |
| 1106 | |
| 1107 | /* check partition alignment and total enhanced size */ |
| 1108 | if (conf->user.enh_size) { |
| 1109 | if (conf->user.enh_size % mmc->hc_wp_grp_size || |
| 1110 | conf->user.enh_start % mmc->hc_wp_grp_size) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1111 | pr_err("User data enhanced area not HC WP group " |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1112 | "size aligned\n"); |
| 1113 | return -EINVAL; |
| 1114 | } |
| 1115 | part_attrs |= EXT_CSD_ENH_USR; |
| 1116 | enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; |
| 1117 | if (mmc->high_capacity) { |
| 1118 | enh_start_addr = conf->user.enh_start; |
| 1119 | } else { |
| 1120 | enh_start_addr = (conf->user.enh_start << 9); |
| 1121 | } |
| 1122 | } else { |
| 1123 | enh_size_mult = 0; |
| 1124 | enh_start_addr = 0; |
| 1125 | } |
| 1126 | tot_enh_size_mult += enh_size_mult; |
| 1127 | |
| 1128 | for (pidx = 0; pidx < 4; pidx++) { |
| 1129 | if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1130 | pr_err("GP%i partition not HC WP group size " |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1131 | "aligned\n", pidx+1); |
| 1132 | return -EINVAL; |
| 1133 | } |
| 1134 | gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; |
| 1135 | if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { |
| 1136 | part_attrs |= EXT_CSD_ENH_GP(pidx); |
| 1137 | tot_enh_size_mult += gp_size_mult[pidx]; |
| 1138 | } |
| 1139 | } |
| 1140 | |
| 1141 | if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1142 | pr_err("Card does not support enhanced attribute\n"); |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1143 | return -EMEDIUMTYPE; |
| 1144 | } |
| 1145 | |
| 1146 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 1147 | if (err) |
| 1148 | return err; |
| 1149 | |
| 1150 | max_enh_size_mult = |
| 1151 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + |
| 1152 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + |
| 1153 | ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; |
| 1154 | if (tot_enh_size_mult > max_enh_size_mult) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1155 | pr_err("Total enhanced size exceeds maximum (%u > %u)\n", |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1156 | tot_enh_size_mult, max_enh_size_mult); |
| 1157 | return -EMEDIUMTYPE; |
| 1158 | } |
| 1159 | |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 1160 | /* The default value of EXT_CSD_WR_REL_SET is device |
| 1161 | * dependent, the values can only be changed if the |
| 1162 | * EXT_CSD_HS_CTRL_REL bit is set. The values can be |
| 1163 | * changed only once and before partitioning is completed. */ |
| 1164 | wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; |
| 1165 | if (conf->user.wr_rel_change) { |
| 1166 | if (conf->user.wr_rel_set) |
| 1167 | wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; |
| 1168 | else |
| 1169 | wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; |
| 1170 | } |
| 1171 | for (pidx = 0; pidx < 4; pidx++) { |
| 1172 | if (conf->gp_part[pidx].wr_rel_change) { |
| 1173 | if (conf->gp_part[pidx].wr_rel_set) |
| 1174 | wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); |
| 1175 | else |
| 1176 | wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); |
| 1177 | } |
| 1178 | } |
| 1179 | |
| 1180 | if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && |
| 1181 | !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { |
| 1182 | puts("Card does not support host controlled partition write " |
| 1183 | "reliability settings\n"); |
| 1184 | return -EMEDIUMTYPE; |
| 1185 | } |
| 1186 | |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1187 | if (ext_csd[EXT_CSD_PARTITION_SETTING] & |
| 1188 | EXT_CSD_PARTITION_SETTING_COMPLETED) { |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1189 | pr_err("Card already partitioned\n"); |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1190 | return -EPERM; |
| 1191 | } |
| 1192 | |
| 1193 | if (mode == MMC_HWPART_CONF_CHECK) |
| 1194 | return 0; |
| 1195 | |
| 1196 | /* Partitioning requires high-capacity size definitions */ |
| 1197 | if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { |
| 1198 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1199 | EXT_CSD_ERASE_GROUP_DEF, 1); |
| 1200 | |
| 1201 | if (err) |
| 1202 | return err; |
| 1203 | |
| 1204 | ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; |
| 1205 | |
Jaehoon Chung | 58b9eb8 | 2020-01-17 15:06:54 +0900 | [diff] [blame] | 1206 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1207 | /* update erase group size to be high-capacity */ |
| 1208 | mmc->erase_grp_size = |
| 1209 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; |
Jaehoon Chung | 58b9eb8 | 2020-01-17 15:06:54 +0900 | [diff] [blame] | 1210 | #endif |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1211 | |
| 1212 | } |
| 1213 | |
| 1214 | /* all OK, write the configuration */ |
| 1215 | for (i = 0; i < 4; i++) { |
| 1216 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1217 | EXT_CSD_ENH_START_ADDR+i, |
| 1218 | (enh_start_addr >> (i*8)) & 0xFF); |
| 1219 | if (err) |
| 1220 | return err; |
| 1221 | } |
| 1222 | for (i = 0; i < 3; i++) { |
| 1223 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1224 | EXT_CSD_ENH_SIZE_MULT+i, |
| 1225 | (enh_size_mult >> (i*8)) & 0xFF); |
| 1226 | if (err) |
| 1227 | return err; |
| 1228 | } |
| 1229 | for (pidx = 0; pidx < 4; pidx++) { |
| 1230 | for (i = 0; i < 3; i++) { |
| 1231 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1232 | EXT_CSD_GP_SIZE_MULT+pidx*3+i, |
| 1233 | (gp_size_mult[pidx] >> (i*8)) & 0xFF); |
| 1234 | if (err) |
| 1235 | return err; |
| 1236 | } |
| 1237 | } |
| 1238 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1239 | EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); |
| 1240 | if (err) |
| 1241 | return err; |
| 1242 | |
| 1243 | if (mode == MMC_HWPART_CONF_SET) |
| 1244 | return 0; |
| 1245 | |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 1246 | /* The WR_REL_SET is a write-once register but shall be |
| 1247 | * written before setting PART_SETTING_COMPLETED. As it is |
| 1248 | * write-once we can only write it when completing the |
| 1249 | * partitioning. */ |
| 1250 | if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { |
| 1251 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1252 | EXT_CSD_WR_REL_SET, wr_rel_set); |
| 1253 | if (err) |
| 1254 | return err; |
| 1255 | } |
| 1256 | |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1257 | /* Setting PART_SETTING_COMPLETED confirms the partition |
| 1258 | * configuration but it only becomes effective after power |
| 1259 | * cycle, so we do not adjust the partition related settings |
| 1260 | * in the mmc struct. */ |
| 1261 | |
| 1262 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1263 | EXT_CSD_PARTITION_SETTING, |
| 1264 | EXT_CSD_PARTITION_SETTING_COMPLETED); |
| 1265 | if (err) |
| 1266 | return err; |
| 1267 | |
| 1268 | return 0; |
| 1269 | } |
Jean-Jacques Hiblot | 1d7769a | 2017-11-30 17:44:02 +0100 | [diff] [blame] | 1270 | #endif |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 1271 | |
Simon Glass | eba48f9 | 2017-07-29 11:35:31 -0600 | [diff] [blame] | 1272 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1273 | int mmc_getcd(struct mmc *mmc) |
| 1274 | { |
| 1275 | int cd; |
| 1276 | |
| 1277 | cd = board_mmc_getcd(mmc); |
| 1278 | |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 1279 | if (cd < 0) { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1280 | if (mmc->cfg->ops->getcd) |
| 1281 | cd = mmc->cfg->ops->getcd(mmc); |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 1282 | else |
| 1283 | cd = 1; |
| 1284 | } |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1285 | |
| 1286 | return cd; |
| 1287 | } |
Simon Glass | 394dfc0 | 2016-06-12 23:30:22 -0600 | [diff] [blame] | 1288 | #endif |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1289 | |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 1290 | #if !CONFIG_IS_ENABLED(MMC_TINY) |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 1291 | static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1292 | { |
| 1293 | struct mmc_cmd cmd; |
| 1294 | struct mmc_data data; |
| 1295 | |
| 1296 | /* Switch the frequency */ |
| 1297 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; |
| 1298 | cmd.resp_type = MMC_RSP_R1; |
| 1299 | cmd.cmdarg = (mode << 31) | 0xffffff; |
| 1300 | cmd.cmdarg &= ~(0xf << (group * 4)); |
| 1301 | cmd.cmdarg |= value << (group * 4); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1302 | |
| 1303 | data.dest = (char *)resp; |
| 1304 | data.blocksize = 64; |
| 1305 | data.blocks = 1; |
| 1306 | data.flags = MMC_DATA_READ; |
| 1307 | |
| 1308 | return mmc_send_cmd(mmc, &cmd, &data); |
| 1309 | } |
| 1310 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1311 | static int sd_get_capabilities(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1312 | { |
| 1313 | int err; |
| 1314 | struct mmc_cmd cmd; |
Suniel Mahesh | 2f423da | 2017-10-05 11:32:00 +0530 | [diff] [blame] | 1315 | ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2); |
| 1316 | ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1317 | struct mmc_data data; |
| 1318 | int timeout; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1319 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1320 | u32 sd3_bus_mode; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1321 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1322 | |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 1323 | mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1324 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1325 | if (mmc_host_is_spi(mmc)) |
| 1326 | return 0; |
| 1327 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1328 | /* Read the SCR to find out if this card supports higher speeds */ |
| 1329 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 1330 | cmd.resp_type = MMC_RSP_R1; |
| 1331 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1332 | |
| 1333 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1334 | |
| 1335 | if (err) |
| 1336 | return err; |
| 1337 | |
| 1338 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; |
| 1339 | cmd.resp_type = MMC_RSP_R1; |
| 1340 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1341 | |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 1342 | data.dest = (char *)scr; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1343 | data.blocksize = 8; |
| 1344 | data.blocks = 1; |
| 1345 | data.flags = MMC_DATA_READ; |
| 1346 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 1347 | err = mmc_send_cmd_retry(mmc, &cmd, &data, 3); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1348 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 1349 | if (err) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1350 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1351 | |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 1352 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
| 1353 | mmc->scr[1] = __be32_to_cpu(scr[1]); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1354 | |
| 1355 | switch ((mmc->scr[0] >> 24) & 0xf) { |
Bin Meng | 4a4ef87 | 2016-03-17 21:53:13 -0700 | [diff] [blame] | 1356 | case 0: |
| 1357 | mmc->version = SD_VERSION_1_0; |
| 1358 | break; |
| 1359 | case 1: |
| 1360 | mmc->version = SD_VERSION_1_10; |
| 1361 | break; |
| 1362 | case 2: |
| 1363 | mmc->version = SD_VERSION_2; |
| 1364 | if ((mmc->scr[0] >> 15) & 0x1) |
| 1365 | mmc->version = SD_VERSION_3; |
| 1366 | break; |
| 1367 | default: |
| 1368 | mmc->version = SD_VERSION_1_0; |
| 1369 | break; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1370 | } |
| 1371 | |
Alagu Sankar | 24bb5ab | 2010-05-12 15:08:24 +0530 | [diff] [blame] | 1372 | if (mmc->scr[0] & SD_DATA_4BIT) |
| 1373 | mmc->card_caps |= MMC_MODE_4BIT; |
| 1374 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1375 | /* Version 1.0 doesn't support switching */ |
| 1376 | if (mmc->version == SD_VERSION_1_0) |
| 1377 | return 0; |
| 1378 | |
| 1379 | timeout = 4; |
| 1380 | while (timeout--) { |
| 1381 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 1382 | (u8 *)switch_status); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1383 | |
| 1384 | if (err) |
| 1385 | return err; |
| 1386 | |
| 1387 | /* The high-speed function is busy. Try again */ |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 1388 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1389 | break; |
| 1390 | } |
| 1391 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1392 | /* If high-speed isn't supported, we return */ |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1393 | if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED) |
| 1394 | mmc->card_caps |= MMC_CAP(SD_HS); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1395 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1396 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1397 | /* Version before 3.0 don't support UHS modes */ |
| 1398 | if (mmc->version < SD_VERSION_3) |
| 1399 | return 0; |
| 1400 | |
| 1401 | sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f; |
| 1402 | if (sd3_bus_mode & SD_MODE_UHS_SDR104) |
| 1403 | mmc->card_caps |= MMC_CAP(UHS_SDR104); |
| 1404 | if (sd3_bus_mode & SD_MODE_UHS_SDR50) |
| 1405 | mmc->card_caps |= MMC_CAP(UHS_SDR50); |
| 1406 | if (sd3_bus_mode & SD_MODE_UHS_SDR25) |
| 1407 | mmc->card_caps |= MMC_CAP(UHS_SDR25); |
| 1408 | if (sd3_bus_mode & SD_MODE_UHS_SDR12) |
| 1409 | mmc->card_caps |= MMC_CAP(UHS_SDR12); |
| 1410 | if (sd3_bus_mode & SD_MODE_UHS_DDR50) |
| 1411 | mmc->card_caps |= MMC_CAP(UHS_DDR50); |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1412 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1413 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1414 | return 0; |
| 1415 | } |
| 1416 | |
| 1417 | static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode) |
| 1418 | { |
| 1419 | int err; |
| 1420 | |
| 1421 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1422 | int speed; |
Macpaul Lin | 24e92ec | 2011-11-28 16:31:09 +0000 | [diff] [blame] | 1423 | |
Marek Vasut | 4105e97 | 2018-11-18 03:25:08 +0100 | [diff] [blame] | 1424 | /* SD version 1.00 and 1.01 does not support CMD 6 */ |
| 1425 | if (mmc->version == SD_VERSION_1_0) |
| 1426 | return 0; |
| 1427 | |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1428 | switch (mode) { |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 1429 | case MMC_LEGACY: |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1430 | speed = UHS_SDR12_BUS_SPEED; |
| 1431 | break; |
| 1432 | case SD_HS: |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 1433 | speed = HIGH_SPEED_BUS_SPEED; |
| 1434 | break; |
| 1435 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
| 1436 | case UHS_SDR12: |
| 1437 | speed = UHS_SDR12_BUS_SPEED; |
| 1438 | break; |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1439 | case UHS_SDR25: |
| 1440 | speed = UHS_SDR25_BUS_SPEED; |
| 1441 | break; |
| 1442 | case UHS_SDR50: |
| 1443 | speed = UHS_SDR50_BUS_SPEED; |
| 1444 | break; |
| 1445 | case UHS_DDR50: |
| 1446 | speed = UHS_DDR50_BUS_SPEED; |
| 1447 | break; |
| 1448 | case UHS_SDR104: |
| 1449 | speed = UHS_SDR104_BUS_SPEED; |
| 1450 | break; |
Jean-Jacques Hiblot | 74c98b2 | 2018-01-04 15:23:30 +0100 | [diff] [blame] | 1451 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1452 | default: |
| 1453 | return -EINVAL; |
| 1454 | } |
| 1455 | |
| 1456 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status); |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1457 | if (err) |
| 1458 | return err; |
| 1459 | |
Jean-Jacques Hiblot | e7f664e | 2018-02-09 12:09:27 +0100 | [diff] [blame] | 1460 | if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1461 | return -ENOTSUPP; |
| 1462 | |
| 1463 | return 0; |
| 1464 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1465 | |
Marek Vasut | 8ff55fb | 2018-04-15 00:36:45 +0200 | [diff] [blame] | 1466 | static int sd_select_bus_width(struct mmc *mmc, int w) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1467 | { |
| 1468 | int err; |
| 1469 | struct mmc_cmd cmd; |
| 1470 | |
| 1471 | if ((w != 4) && (w != 1)) |
| 1472 | return -EINVAL; |
| 1473 | |
| 1474 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 1475 | cmd.resp_type = MMC_RSP_R1; |
| 1476 | cmd.cmdarg = mmc->rca << 16; |
| 1477 | |
| 1478 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1479 | if (err) |
| 1480 | return err; |
| 1481 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1482 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; |
| 1483 | cmd.resp_type = MMC_RSP_R1; |
| 1484 | if (w == 4) |
| 1485 | cmd.cmdarg = 2; |
| 1486 | else if (w == 1) |
| 1487 | cmd.cmdarg = 0; |
| 1488 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1489 | if (err) |
| 1490 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1491 | |
| 1492 | return 0; |
| 1493 | } |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 1494 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1495 | |
Jean-Jacques Hiblot | cb534f0 | 2018-01-04 15:23:33 +0100 | [diff] [blame] | 1496 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1497 | static int sd_read_ssr(struct mmc *mmc) |
| 1498 | { |
Jean-Jacques Hiblot | cb534f0 | 2018-01-04 15:23:33 +0100 | [diff] [blame] | 1499 | static const unsigned int sd_au_size[] = { |
| 1500 | 0, SZ_16K / 512, SZ_32K / 512, |
| 1501 | SZ_64K / 512, SZ_128K / 512, SZ_256K / 512, |
| 1502 | SZ_512K / 512, SZ_1M / 512, SZ_2M / 512, |
| 1503 | SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512, |
| 1504 | SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, |
| 1505 | SZ_64M / 512, |
| 1506 | }; |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1507 | int err, i; |
| 1508 | struct mmc_cmd cmd; |
| 1509 | ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16); |
| 1510 | struct mmc_data data; |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1511 | unsigned int au, eo, et, es; |
| 1512 | |
| 1513 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 1514 | cmd.resp_type = MMC_RSP_R1; |
| 1515 | cmd.cmdarg = mmc->rca << 16; |
| 1516 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 1517 | err = mmc_send_cmd_quirks(mmc, &cmd, NULL, MMC_QUIRK_RETRY_APP_CMD, 4); |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1518 | if (err) |
| 1519 | return err; |
| 1520 | |
| 1521 | cmd.cmdidx = SD_CMD_APP_SD_STATUS; |
| 1522 | cmd.resp_type = MMC_RSP_R1; |
| 1523 | cmd.cmdarg = 0; |
| 1524 | |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1525 | data.dest = (char *)ssr; |
| 1526 | data.blocksize = 64; |
| 1527 | data.blocks = 1; |
| 1528 | data.flags = MMC_DATA_READ; |
| 1529 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 1530 | err = mmc_send_cmd_retry(mmc, &cmd, &data, 3); |
| 1531 | if (err) |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1532 | return err; |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1533 | |
| 1534 | for (i = 0; i < 16; i++) |
| 1535 | ssr[i] = be32_to_cpu(ssr[i]); |
| 1536 | |
| 1537 | au = (ssr[2] >> 12) & 0xF; |
| 1538 | if ((au <= 9) || (mmc->version == SD_VERSION_3)) { |
| 1539 | mmc->ssr.au = sd_au_size[au]; |
| 1540 | es = (ssr[3] >> 24) & 0xFF; |
| 1541 | es |= (ssr[2] & 0xFF) << 8; |
| 1542 | et = (ssr[3] >> 18) & 0x3F; |
| 1543 | if (es && et) { |
| 1544 | eo = (ssr[3] >> 16) & 0x3; |
| 1545 | mmc->ssr.erase_timeout = (et * 1000) / es; |
| 1546 | mmc->ssr.erase_offset = eo * 1000; |
| 1547 | } |
| 1548 | } else { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1549 | pr_debug("Invalid Allocation Unit Size.\n"); |
Peng Fan | b3fcf1e | 2016-09-01 11:13:38 +0800 | [diff] [blame] | 1550 | } |
| 1551 | |
| 1552 | return 0; |
| 1553 | } |
Jean-Jacques Hiblot | cb534f0 | 2018-01-04 15:23:33 +0100 | [diff] [blame] | 1554 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1555 | /* frequency bases */ |
| 1556 | /* divided by 10 to be nice to platforms without floating point */ |
Mike Frysinger | b588caf | 2010-10-20 01:15:53 +0000 | [diff] [blame] | 1557 | static const int fbase[] = { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1558 | 10000, |
| 1559 | 100000, |
| 1560 | 1000000, |
| 1561 | 10000000, |
| 1562 | }; |
| 1563 | |
| 1564 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice |
| 1565 | * to platforms without floating point. |
| 1566 | */ |
Simon Glass | 03317cc | 2016-05-14 14:02:57 -0600 | [diff] [blame] | 1567 | static const u8 multipliers[] = { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1568 | 0, /* reserved */ |
| 1569 | 10, |
| 1570 | 12, |
| 1571 | 13, |
| 1572 | 15, |
| 1573 | 20, |
| 1574 | 25, |
| 1575 | 30, |
| 1576 | 35, |
| 1577 | 40, |
| 1578 | 45, |
| 1579 | 50, |
| 1580 | 55, |
| 1581 | 60, |
| 1582 | 70, |
| 1583 | 80, |
| 1584 | }; |
| 1585 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1586 | static inline int bus_width(uint cap) |
| 1587 | { |
| 1588 | if (cap == MMC_MODE_8BIT) |
| 1589 | return 8; |
| 1590 | if (cap == MMC_MODE_4BIT) |
| 1591 | return 4; |
| 1592 | if (cap == MMC_MODE_1BIT) |
| 1593 | return 1; |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 1594 | pr_warn("invalid bus witdh capability 0x%x\n", cap); |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1595 | return 0; |
| 1596 | } |
| 1597 | |
Simon Glass | eba48f9 | 2017-07-29 11:35:31 -0600 | [diff] [blame] | 1598 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1599 | #ifdef MMC_SUPPORTS_TUNING |
Kishon Vijay Abraham I | ae7174f | 2017-09-21 16:30:05 +0200 | [diff] [blame] | 1600 | static int mmc_execute_tuning(struct mmc *mmc, uint opcode) |
| 1601 | { |
| 1602 | return -ENOTSUPP; |
| 1603 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1604 | #endif |
Kishon Vijay Abraham I | ae7174f | 2017-09-21 16:30:05 +0200 | [diff] [blame] | 1605 | |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1606 | static int mmc_set_ios(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1607 | { |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1608 | int ret = 0; |
| 1609 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1610 | if (mmc->cfg->ops->set_ios) |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1611 | ret = mmc->cfg->ops->set_ios(mmc); |
| 1612 | |
| 1613 | return ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1614 | } |
Yann Gautier | 6f55833 | 2019-09-19 17:56:12 +0200 | [diff] [blame] | 1615 | |
| 1616 | static int mmc_host_power_cycle(struct mmc *mmc) |
| 1617 | { |
| 1618 | int ret = 0; |
| 1619 | |
| 1620 | if (mmc->cfg->ops->host_power_cycle) |
| 1621 | ret = mmc->cfg->ops->host_power_cycle(mmc); |
| 1622 | |
| 1623 | return ret; |
| 1624 | } |
Simon Glass | 394dfc0 | 2016-06-12 23:30:22 -0600 | [diff] [blame] | 1625 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1626 | |
Kishon Vijay Abraham I | d6246bf | 2017-09-21 16:30:03 +0200 | [diff] [blame] | 1627 | int mmc_set_clock(struct mmc *mmc, uint clock, bool disable) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1628 | { |
Jaehoon Chung | ab4d405 | 2018-01-23 14:04:30 +0900 | [diff] [blame] | 1629 | if (!disable) { |
Jaehoon Chung | 8a93329 | 2018-01-17 19:36:58 +0900 | [diff] [blame] | 1630 | if (clock > mmc->cfg->f_max) |
| 1631 | clock = mmc->cfg->f_max; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1632 | |
Jaehoon Chung | 8a93329 | 2018-01-17 19:36:58 +0900 | [diff] [blame] | 1633 | if (clock < mmc->cfg->f_min) |
| 1634 | clock = mmc->cfg->f_min; |
| 1635 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1636 | |
| 1637 | mmc->clock = clock; |
Kishon Vijay Abraham I | d6246bf | 2017-09-21 16:30:03 +0200 | [diff] [blame] | 1638 | mmc->clk_disable = disable; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1639 | |
Jaehoon Chung | c8477d6 | 2018-01-26 19:25:30 +0900 | [diff] [blame] | 1640 | debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock); |
| 1641 | |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1642 | return mmc_set_ios(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1643 | } |
| 1644 | |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1645 | static int mmc_set_bus_width(struct mmc *mmc, uint width) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1646 | { |
| 1647 | mmc->bus_width = width; |
| 1648 | |
Kishon Vijay Abraham I | e178c11 | 2017-09-21 16:29:59 +0200 | [diff] [blame] | 1649 | return mmc_set_ios(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1650 | } |
| 1651 | |
Jean-Jacques Hiblot | 00de504 | 2017-09-21 16:29:54 +0200 | [diff] [blame] | 1652 | #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG) |
| 1653 | /* |
| 1654 | * helper function to display the capabilities in a human |
| 1655 | * friendly manner. The capabilities include bus width and |
| 1656 | * supported modes. |
| 1657 | */ |
| 1658 | void mmc_dump_capabilities(const char *text, uint caps) |
| 1659 | { |
| 1660 | enum bus_mode mode; |
| 1661 | |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1662 | pr_debug("%s: widths [", text); |
Jean-Jacques Hiblot | 00de504 | 2017-09-21 16:29:54 +0200 | [diff] [blame] | 1663 | if (caps & MMC_MODE_8BIT) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1664 | pr_debug("8, "); |
Jean-Jacques Hiblot | 00de504 | 2017-09-21 16:29:54 +0200 | [diff] [blame] | 1665 | if (caps & MMC_MODE_4BIT) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1666 | pr_debug("4, "); |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1667 | if (caps & MMC_MODE_1BIT) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1668 | pr_debug("1, "); |
| 1669 | pr_debug("\b\b] modes ["); |
Jean-Jacques Hiblot | 00de504 | 2017-09-21 16:29:54 +0200 | [diff] [blame] | 1670 | for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++) |
| 1671 | if (MMC_CAP(mode) & caps) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1672 | pr_debug("%s, ", mmc_mode_name(mode)); |
| 1673 | pr_debug("\b\b]\n"); |
Jean-Jacques Hiblot | 00de504 | 2017-09-21 16:29:54 +0200 | [diff] [blame] | 1674 | } |
| 1675 | #endif |
| 1676 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1677 | struct mode_width_tuning { |
| 1678 | enum bus_mode mode; |
| 1679 | uint widths; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1680 | #ifdef MMC_SUPPORTS_TUNING |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 1681 | uint tuning; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1682 | #endif |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1683 | }; |
| 1684 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1685 | #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE) |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1686 | int mmc_voltage_to_mv(enum mmc_voltage voltage) |
| 1687 | { |
| 1688 | switch (voltage) { |
| 1689 | case MMC_SIGNAL_VOLTAGE_000: return 0; |
| 1690 | case MMC_SIGNAL_VOLTAGE_330: return 3300; |
| 1691 | case MMC_SIGNAL_VOLTAGE_180: return 1800; |
| 1692 | case MMC_SIGNAL_VOLTAGE_120: return 1200; |
| 1693 | } |
| 1694 | return -EINVAL; |
| 1695 | } |
| 1696 | |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 1697 | static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) |
| 1698 | { |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1699 | int err; |
| 1700 | |
| 1701 | if (mmc->signal_voltage == signal_voltage) |
| 1702 | return 0; |
| 1703 | |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 1704 | mmc->signal_voltage = signal_voltage; |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1705 | err = mmc_set_ios(mmc); |
| 1706 | if (err) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1707 | pr_debug("unable to set voltage (err %d)\n", err); |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1708 | |
| 1709 | return err; |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 1710 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1711 | #else |
| 1712 | static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) |
| 1713 | { |
| 1714 | return 0; |
| 1715 | } |
| 1716 | #endif |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 1717 | |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 1718 | #if !CONFIG_IS_ENABLED(MMC_TINY) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1719 | static const struct mode_width_tuning sd_modes_by_pref[] = { |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1720 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
| 1721 | #ifdef MMC_SUPPORTS_TUNING |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1722 | { |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1723 | .mode = UHS_SDR104, |
| 1724 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1725 | .tuning = MMC_CMD_SEND_TUNING_BLOCK |
| 1726 | }, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1727 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1728 | { |
| 1729 | .mode = UHS_SDR50, |
| 1730 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1731 | }, |
| 1732 | { |
| 1733 | .mode = UHS_DDR50, |
| 1734 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1735 | }, |
| 1736 | { |
| 1737 | .mode = UHS_SDR25, |
| 1738 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1739 | }, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1740 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1741 | { |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1742 | .mode = SD_HS, |
| 1743 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1744 | }, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1745 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1746 | { |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1747 | .mode = UHS_SDR12, |
| 1748 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1749 | }, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1750 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1751 | { |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 1752 | .mode = MMC_LEGACY, |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1753 | .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1754 | } |
| 1755 | }; |
| 1756 | |
| 1757 | #define for_each_sd_mode_by_pref(caps, mwt) \ |
| 1758 | for (mwt = sd_modes_by_pref;\ |
| 1759 | mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\ |
| 1760 | mwt++) \ |
| 1761 | if (caps & MMC_CAP(mwt->mode)) |
| 1762 | |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 1763 | static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps) |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1764 | { |
| 1765 | int err; |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1766 | uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT}; |
| 1767 | const struct mode_width_tuning *mwt; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1768 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1769 | bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false; |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1770 | #else |
| 1771 | bool uhs_en = false; |
| 1772 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1773 | uint caps; |
| 1774 | |
Jean-Jacques Hiblot | 93c31d1 | 2017-11-30 17:43:54 +0100 | [diff] [blame] | 1775 | #ifdef DEBUG |
| 1776 | mmc_dump_capabilities("sd card", card_caps); |
Jean-Jacques Hiblot | d7e5e03 | 2017-11-30 17:43:57 +0100 | [diff] [blame] | 1777 | mmc_dump_capabilities("host", mmc->host_caps); |
Jean-Jacques Hiblot | 93c31d1 | 2017-11-30 17:43:54 +0100 | [diff] [blame] | 1778 | #endif |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1779 | |
Anup Patel | d9c92c7 | 2019-07-08 04:10:43 +0000 | [diff] [blame] | 1780 | if (mmc_host_is_spi(mmc)) { |
| 1781 | mmc_set_bus_width(mmc, 1); |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 1782 | mmc_select_mode(mmc, MMC_LEGACY); |
Anup Patel | d9c92c7 | 2019-07-08 04:10:43 +0000 | [diff] [blame] | 1783 | mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); |
Pragnesh Patel | a01f57e | 2020-06-29 15:17:26 +0530 | [diff] [blame] | 1784 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
| 1785 | err = sd_read_ssr(mmc); |
| 1786 | if (err) |
| 1787 | pr_warn("unable to read ssr\n"); |
| 1788 | #endif |
Anup Patel | d9c92c7 | 2019-07-08 04:10:43 +0000 | [diff] [blame] | 1789 | return 0; |
| 1790 | } |
| 1791 | |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1792 | /* Restrict card's capabilities by what the host can do */ |
Jean-Jacques Hiblot | d7e5e03 | 2017-11-30 17:43:57 +0100 | [diff] [blame] | 1793 | caps = card_caps & mmc->host_caps; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1794 | |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1795 | if (!uhs_en) |
| 1796 | caps &= ~UHS_CAPS; |
| 1797 | |
| 1798 | for_each_sd_mode_by_pref(caps, mwt) { |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1799 | uint *w; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1800 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1801 | for (w = widths; w < widths + ARRAY_SIZE(widths); w++) { |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1802 | if (*w & caps & mwt->widths) { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1803 | pr_debug("trying mode %s width %d (at %d MHz)\n", |
| 1804 | mmc_mode_name(mwt->mode), |
| 1805 | bus_width(*w), |
| 1806 | mmc_mode2freq(mmc, mwt->mode) / 1000000); |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1807 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1808 | /* configure the bus width (card + host) */ |
| 1809 | err = sd_select_bus_width(mmc, bus_width(*w)); |
| 1810 | if (err) |
| 1811 | goto error; |
| 1812 | mmc_set_bus_width(mmc, bus_width(*w)); |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1813 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1814 | /* configure the bus mode (card) */ |
| 1815 | err = sd_set_card_speed(mmc, mwt->mode); |
| 1816 | if (err) |
| 1817 | goto error; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1818 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1819 | /* configure the bus mode (host) */ |
| 1820 | mmc_select_mode(mmc, mwt->mode); |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 1821 | mmc_set_clock(mmc, mmc->tran_speed, |
| 1822 | MMC_CLK_ENABLE); |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1823 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1824 | #ifdef MMC_SUPPORTS_TUNING |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1825 | /* execute tuning if needed */ |
| 1826 | if (mwt->tuning && !mmc_host_is_spi(mmc)) { |
| 1827 | err = mmc_execute_tuning(mmc, |
| 1828 | mwt->tuning); |
| 1829 | if (err) { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1830 | pr_debug("tuning failed\n"); |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1831 | goto error; |
| 1832 | } |
| 1833 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1834 | #endif |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 1835 | |
Jean-Jacques Hiblot | cb534f0 | 2018-01-04 15:23:33 +0100 | [diff] [blame] | 1836 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1837 | err = sd_read_ssr(mmc); |
Peng Fan | 2d2fe8e | 2018-03-05 16:20:40 +0800 | [diff] [blame] | 1838 | if (err) |
Jean-Jacques Hiblot | cb534f0 | 2018-01-04 15:23:33 +0100 | [diff] [blame] | 1839 | pr_warn("unable to read ssr\n"); |
| 1840 | #endif |
| 1841 | if (!err) |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1842 | return 0; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1843 | |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1844 | error: |
| 1845 | /* revert to a safer bus speed */ |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 1846 | mmc_select_mode(mmc, MMC_LEGACY); |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 1847 | mmc_set_clock(mmc, mmc->tran_speed, |
| 1848 | MMC_CLK_ENABLE); |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1849 | } |
| 1850 | } |
| 1851 | } |
| 1852 | |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 1853 | pr_err("unable to select a mode\n"); |
Jean-Jacques Hiblot | 5b1a4d9 | 2017-09-21 16:29:57 +0200 | [diff] [blame] | 1854 | return -ENOTSUPP; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1855 | } |
| 1856 | |
Jean-Jacques Hiblot | 933d126 | 2017-09-21 16:29:52 +0200 | [diff] [blame] | 1857 | /* |
| 1858 | * read the compare the part of ext csd that is constant. |
| 1859 | * This can be used to check that the transfer is working |
| 1860 | * as expected. |
| 1861 | */ |
| 1862 | static int mmc_read_and_compare_ext_csd(struct mmc *mmc) |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 1863 | { |
Jean-Jacques Hiblot | 933d126 | 2017-09-21 16:29:52 +0200 | [diff] [blame] | 1864 | int err; |
Jean-Jacques Hiblot | ed9506b | 2017-09-21 16:29:51 +0200 | [diff] [blame] | 1865 | const u8 *ext_csd = mmc->ext_csd; |
Jean-Jacques Hiblot | 933d126 | 2017-09-21 16:29:52 +0200 | [diff] [blame] | 1866 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); |
| 1867 | |
Jean-Jacques Hiblot | 7ab1b62 | 2017-11-30 17:43:58 +0100 | [diff] [blame] | 1868 | if (mmc->version < MMC_VERSION_4) |
| 1869 | return 0; |
| 1870 | |
Jean-Jacques Hiblot | 933d126 | 2017-09-21 16:29:52 +0200 | [diff] [blame] | 1871 | err = mmc_send_ext_csd(mmc, test_csd); |
| 1872 | if (err) |
| 1873 | return err; |
| 1874 | |
| 1875 | /* Only compare read only fields */ |
| 1876 | if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] |
| 1877 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && |
| 1878 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE] |
| 1879 | == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && |
| 1880 | ext_csd[EXT_CSD_REV] |
| 1881 | == test_csd[EXT_CSD_REV] && |
| 1882 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] |
| 1883 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && |
| 1884 | memcmp(&ext_csd[EXT_CSD_SEC_CNT], |
| 1885 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) |
| 1886 | return 0; |
| 1887 | |
| 1888 | return -EBADMSG; |
| 1889 | } |
| 1890 | |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1891 | #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE) |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1892 | static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, |
| 1893 | uint32_t allowed_mask) |
| 1894 | { |
| 1895 | u32 card_mask = 0; |
| 1896 | |
| 1897 | switch (mode) { |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 1898 | case MMC_HS_400_ES: |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 1899 | case MMC_HS_400: |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1900 | case MMC_HS_200: |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 1901 | if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V | |
| 1902 | EXT_CSD_CARD_TYPE_HS400_1_8V)) |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1903 | card_mask |= MMC_SIGNAL_VOLTAGE_180; |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 1904 | if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V | |
| 1905 | EXT_CSD_CARD_TYPE_HS400_1_2V)) |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1906 | card_mask |= MMC_SIGNAL_VOLTAGE_120; |
| 1907 | break; |
| 1908 | case MMC_DDR_52: |
| 1909 | if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) |
| 1910 | card_mask |= MMC_SIGNAL_VOLTAGE_330 | |
| 1911 | MMC_SIGNAL_VOLTAGE_180; |
| 1912 | if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V) |
| 1913 | card_mask |= MMC_SIGNAL_VOLTAGE_120; |
| 1914 | break; |
| 1915 | default: |
| 1916 | card_mask |= MMC_SIGNAL_VOLTAGE_330; |
| 1917 | break; |
| 1918 | } |
| 1919 | |
| 1920 | while (card_mask & allowed_mask) { |
| 1921 | enum mmc_voltage best_match; |
| 1922 | |
| 1923 | best_match = 1 << (ffs(card_mask & allowed_mask) - 1); |
| 1924 | if (!mmc_set_signal_voltage(mmc, best_match)) |
| 1925 | return 0; |
| 1926 | |
| 1927 | allowed_mask &= ~best_match; |
| 1928 | } |
| 1929 | |
| 1930 | return -ENOTSUPP; |
| 1931 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1932 | #else |
| 1933 | static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, |
| 1934 | uint32_t allowed_mask) |
| 1935 | { |
| 1936 | return 0; |
| 1937 | } |
| 1938 | #endif |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 1939 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1940 | static const struct mode_width_tuning mmc_modes_by_pref[] = { |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 1941 | #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
| 1942 | { |
| 1943 | .mode = MMC_HS_400_ES, |
| 1944 | .widths = MMC_MODE_8BIT, |
| 1945 | }, |
| 1946 | #endif |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 1947 | #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) |
| 1948 | { |
| 1949 | .mode = MMC_HS_400, |
| 1950 | .widths = MMC_MODE_8BIT, |
| 1951 | .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200 |
| 1952 | }, |
| 1953 | #endif |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1954 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1955 | { |
| 1956 | .mode = MMC_HS_200, |
| 1957 | .widths = MMC_MODE_8BIT | MMC_MODE_4BIT, |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 1958 | .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200 |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1959 | }, |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 1960 | #endif |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 1961 | { |
| 1962 | .mode = MMC_DDR_52, |
| 1963 | .widths = MMC_MODE_8BIT | MMC_MODE_4BIT, |
| 1964 | }, |
| 1965 | { |
| 1966 | .mode = MMC_HS_52, |
| 1967 | .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1968 | }, |
| 1969 | { |
| 1970 | .mode = MMC_HS, |
| 1971 | .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1972 | }, |
| 1973 | { |
| 1974 | .mode = MMC_LEGACY, |
| 1975 | .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT, |
| 1976 | } |
| 1977 | }; |
| 1978 | |
| 1979 | #define for_each_mmc_mode_by_pref(caps, mwt) \ |
| 1980 | for (mwt = mmc_modes_by_pref;\ |
| 1981 | mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\ |
| 1982 | mwt++) \ |
| 1983 | if (caps & MMC_CAP(mwt->mode)) |
| 1984 | |
| 1985 | static const struct ext_csd_bus_width { |
| 1986 | uint cap; |
| 1987 | bool is_ddr; |
| 1988 | uint ext_csd_bits; |
| 1989 | } ext_csd_bus_width[] = { |
| 1990 | {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8}, |
| 1991 | {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4}, |
| 1992 | {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8}, |
| 1993 | {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4}, |
| 1994 | {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1}, |
| 1995 | }; |
| 1996 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 1997 | #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) |
| 1998 | static int mmc_select_hs400(struct mmc *mmc) |
| 1999 | { |
| 2000 | int err; |
| 2001 | |
| 2002 | /* Set timing to HS200 for tuning */ |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2003 | err = mmc_set_card_speed(mmc, MMC_HS_200, false); |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2004 | if (err) |
| 2005 | return err; |
| 2006 | |
| 2007 | /* configure the bus mode (host) */ |
| 2008 | mmc_select_mode(mmc, MMC_HS_200); |
| 2009 | mmc_set_clock(mmc, mmc->tran_speed, false); |
| 2010 | |
| 2011 | /* execute tuning if needed */ |
Yangbo Lu | 3ed53ac | 2020-09-01 16:58:03 +0800 | [diff] [blame] | 2012 | mmc->hs400_tuning = 1; |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2013 | err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200); |
Yangbo Lu | 3ed53ac | 2020-09-01 16:58:03 +0800 | [diff] [blame] | 2014 | mmc->hs400_tuning = 0; |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2015 | if (err) { |
| 2016 | debug("tuning failed\n"); |
| 2017 | return err; |
| 2018 | } |
| 2019 | |
| 2020 | /* Set back to HS */ |
BOUGH CHEN | 8702bbc | 2019-03-26 06:24:17 +0000 | [diff] [blame] | 2021 | mmc_set_card_speed(mmc, MMC_HS, true); |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2022 | |
Yangbo Lu | 5347aea | 2020-09-01 16:58:04 +0800 | [diff] [blame] | 2023 | err = mmc_hs400_prepare_ddr(mmc); |
| 2024 | if (err) |
| 2025 | return err; |
| 2026 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2027 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, |
| 2028 | EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG); |
| 2029 | if (err) |
| 2030 | return err; |
| 2031 | |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2032 | err = mmc_set_card_speed(mmc, MMC_HS_400, false); |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2033 | if (err) |
| 2034 | return err; |
| 2035 | |
| 2036 | mmc_select_mode(mmc, MMC_HS_400); |
| 2037 | err = mmc_set_clock(mmc, mmc->tran_speed, false); |
| 2038 | if (err) |
| 2039 | return err; |
| 2040 | |
| 2041 | return 0; |
| 2042 | } |
| 2043 | #else |
| 2044 | static int mmc_select_hs400(struct mmc *mmc) |
| 2045 | { |
| 2046 | return -ENOTSUPP; |
| 2047 | } |
| 2048 | #endif |
| 2049 | |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 2050 | #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
| 2051 | #if !CONFIG_IS_ENABLED(DM_MMC) |
| 2052 | static int mmc_set_enhanced_strobe(struct mmc *mmc) |
| 2053 | { |
| 2054 | return -ENOTSUPP; |
| 2055 | } |
| 2056 | #endif |
| 2057 | static int mmc_select_hs400es(struct mmc *mmc) |
| 2058 | { |
| 2059 | int err; |
| 2060 | |
| 2061 | err = mmc_set_card_speed(mmc, MMC_HS, true); |
| 2062 | if (err) |
| 2063 | return err; |
| 2064 | |
| 2065 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, |
| 2066 | EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG | |
| 2067 | EXT_CSD_BUS_WIDTH_STROBE); |
| 2068 | if (err) { |
| 2069 | printf("switch to bus width for hs400 failed\n"); |
| 2070 | return err; |
| 2071 | } |
| 2072 | /* TODO: driver strength */ |
| 2073 | err = mmc_set_card_speed(mmc, MMC_HS_400_ES, false); |
| 2074 | if (err) |
| 2075 | return err; |
| 2076 | |
| 2077 | mmc_select_mode(mmc, MMC_HS_400_ES); |
| 2078 | err = mmc_set_clock(mmc, mmc->tran_speed, false); |
| 2079 | if (err) |
| 2080 | return err; |
| 2081 | |
| 2082 | return mmc_set_enhanced_strobe(mmc); |
| 2083 | } |
| 2084 | #else |
| 2085 | static int mmc_select_hs400es(struct mmc *mmc) |
| 2086 | { |
| 2087 | return -ENOTSUPP; |
| 2088 | } |
| 2089 | #endif |
| 2090 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2091 | #define for_each_supported_width(caps, ddr, ecbv) \ |
| 2092 | for (ecbv = ext_csd_bus_width;\ |
| 2093 | ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\ |
| 2094 | ecbv++) \ |
| 2095 | if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap)) |
| 2096 | |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 2097 | static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) |
Jean-Jacques Hiblot | 933d126 | 2017-09-21 16:29:52 +0200 | [diff] [blame] | 2098 | { |
Jaehoon Chung | 6b3431c | 2020-12-04 06:36:00 +0900 | [diff] [blame] | 2099 | int err = 0; |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2100 | const struct mode_width_tuning *mwt; |
| 2101 | const struct ext_csd_bus_width *ecbw; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2102 | |
Jean-Jacques Hiblot | 93c31d1 | 2017-11-30 17:43:54 +0100 | [diff] [blame] | 2103 | #ifdef DEBUG |
| 2104 | mmc_dump_capabilities("mmc", card_caps); |
Jean-Jacques Hiblot | d7e5e03 | 2017-11-30 17:43:57 +0100 | [diff] [blame] | 2105 | mmc_dump_capabilities("host", mmc->host_caps); |
Jean-Jacques Hiblot | 93c31d1 | 2017-11-30 17:43:54 +0100 | [diff] [blame] | 2106 | #endif |
| 2107 | |
Anup Patel | d9c92c7 | 2019-07-08 04:10:43 +0000 | [diff] [blame] | 2108 | if (mmc_host_is_spi(mmc)) { |
| 2109 | mmc_set_bus_width(mmc, 1); |
| 2110 | mmc_select_mode(mmc, MMC_LEGACY); |
| 2111 | mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); |
| 2112 | return 0; |
| 2113 | } |
| 2114 | |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2115 | /* Restrict card's capabilities by what the host can do */ |
Jean-Jacques Hiblot | d7e5e03 | 2017-11-30 17:43:57 +0100 | [diff] [blame] | 2116 | card_caps &= mmc->host_caps; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2117 | |
| 2118 | /* Only version 4 of MMC supports wider bus widths */ |
| 2119 | if (mmc->version < MMC_VERSION_4) |
| 2120 | return 0; |
| 2121 | |
Jean-Jacques Hiblot | ed9506b | 2017-09-21 16:29:51 +0200 | [diff] [blame] | 2122 | if (!mmc->ext_csd) { |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2123 | pr_debug("No ext_csd found!\n"); /* this should enver happen */ |
Jean-Jacques Hiblot | ed9506b | 2017-09-21 16:29:51 +0200 | [diff] [blame] | 2124 | return -ENOTSUPP; |
| 2125 | } |
| 2126 | |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2127 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ |
Ye Li | 3679e80 | 2021-08-17 17:20:34 +0800 | [diff] [blame] | 2128 | CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \ |
| 2129 | CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2130 | /* |
| 2131 | * In case the eMMC is in HS200/HS400 mode, downgrade to HS mode |
| 2132 | * before doing anything else, since a transition from either of |
| 2133 | * the HS200/HS400 mode directly to legacy mode is not supported. |
| 2134 | */ |
| 2135 | if (mmc->selected_mode == MMC_HS_200 || |
Ye Li | 3679e80 | 2021-08-17 17:20:34 +0800 | [diff] [blame] | 2136 | mmc->selected_mode == MMC_HS_400 || |
| 2137 | mmc->selected_mode == MMC_HS_400_ES) |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2138 | mmc_set_card_speed(mmc, MMC_HS, true); |
| 2139 | else |
| 2140 | #endif |
| 2141 | mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE); |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 2142 | |
| 2143 | for_each_mmc_mode_by_pref(card_caps, mwt) { |
| 2144 | for_each_supported_width(card_caps & mwt->widths, |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2145 | mmc_is_mode_ddr(mwt->mode), ecbw) { |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 2146 | enum mmc_voltage old_voltage; |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2147 | pr_debug("trying mode %s width %d (at %d MHz)\n", |
| 2148 | mmc_mode_name(mwt->mode), |
| 2149 | bus_width(ecbw->cap), |
| 2150 | mmc_mode2freq(mmc, mwt->mode) / 1000000); |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 2151 | old_voltage = mmc->signal_voltage; |
| 2152 | err = mmc_set_lowest_voltage(mmc, mwt->mode, |
| 2153 | MMC_ALL_SIGNAL_VOLTAGE); |
| 2154 | if (err) |
| 2155 | continue; |
| 2156 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2157 | /* configure the bus width (card + host) */ |
| 2158 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 2159 | EXT_CSD_BUS_WIDTH, |
| 2160 | ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG); |
| 2161 | if (err) |
| 2162 | goto error; |
| 2163 | mmc_set_bus_width(mmc, bus_width(ecbw->cap)); |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2164 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2165 | if (mwt->mode == MMC_HS_400) { |
| 2166 | err = mmc_select_hs400(mmc); |
| 2167 | if (err) { |
| 2168 | printf("Select HS400 failed %d\n", err); |
| 2169 | goto error; |
| 2170 | } |
Peng Fan | eede83b | 2019-07-10 14:43:07 +0800 | [diff] [blame] | 2171 | } else if (mwt->mode == MMC_HS_400_ES) { |
| 2172 | err = mmc_select_hs400es(mmc); |
| 2173 | if (err) { |
| 2174 | printf("Select HS400ES failed %d\n", |
| 2175 | err); |
| 2176 | goto error; |
| 2177 | } |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2178 | } else { |
| 2179 | /* configure the bus speed (card) */ |
Marek Vasut | 111572f | 2019-01-03 21:19:24 +0100 | [diff] [blame] | 2180 | err = mmc_set_card_speed(mmc, mwt->mode, false); |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2181 | if (err) |
| 2182 | goto error; |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2183 | |
| 2184 | /* |
| 2185 | * configure the bus width AND the ddr mode |
| 2186 | * (card). The host side will be taken care |
| 2187 | * of in the next step |
| 2188 | */ |
| 2189 | if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) { |
| 2190 | err = mmc_switch(mmc, |
| 2191 | EXT_CSD_CMD_SET_NORMAL, |
| 2192 | EXT_CSD_BUS_WIDTH, |
| 2193 | ecbw->ext_csd_bits); |
| 2194 | if (err) |
| 2195 | goto error; |
| 2196 | } |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2197 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2198 | /* configure the bus mode (host) */ |
| 2199 | mmc_select_mode(mmc, mwt->mode); |
| 2200 | mmc_set_clock(mmc, mmc->tran_speed, |
| 2201 | MMC_CLK_ENABLE); |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 2202 | #ifdef MMC_SUPPORTS_TUNING |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2203 | |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2204 | /* execute tuning if needed */ |
| 2205 | if (mwt->tuning) { |
| 2206 | err = mmc_execute_tuning(mmc, |
| 2207 | mwt->tuning); |
| 2208 | if (err) { |
Jaehoon Chung | ad9f7ce | 2020-11-17 07:04:59 +0900 | [diff] [blame] | 2209 | pr_debug("tuning failed : %d\n", err); |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2210 | goto error; |
| 2211 | } |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 2212 | } |
Jean-Jacques Hiblot | 6051e78 | 2017-11-30 17:44:01 +0100 | [diff] [blame] | 2213 | #endif |
Peng Fan | 4680125 | 2018-08-10 14:07:54 +0800 | [diff] [blame] | 2214 | } |
Kishon Vijay Abraham I | 210369f | 2017-09-21 16:30:06 +0200 | [diff] [blame] | 2215 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2216 | /* do a transfer to check the configuration */ |
| 2217 | err = mmc_read_and_compare_ext_csd(mmc); |
| 2218 | if (!err) |
| 2219 | return 0; |
| 2220 | error: |
Jean-Jacques Hiblot | b6937d6 | 2017-09-21 16:30:11 +0200 | [diff] [blame] | 2221 | mmc_set_signal_voltage(mmc, old_voltage); |
Naoki Hayama | 3110dcb | 2020-10-12 18:35:22 +0900 | [diff] [blame] | 2222 | /* if an error occurred, revert to a safer bus mode */ |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2223 | mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 2224 | EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1); |
| 2225 | mmc_select_mode(mmc, MMC_LEGACY); |
| 2226 | mmc_set_bus_width(mmc, 1); |
| 2227 | } |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2228 | } |
| 2229 | |
Jaehoon Chung | ad9f7ce | 2020-11-17 07:04:59 +0900 | [diff] [blame] | 2230 | pr_err("unable to select a mode : %d\n", err); |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2231 | |
Jean-Jacques Hiblot | ec34683 | 2017-09-21 16:29:58 +0200 | [diff] [blame] | 2232 | return -ENOTSUPP; |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2233 | } |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2234 | #endif |
| 2235 | |
| 2236 | #if CONFIG_IS_ENABLED(MMC_TINY) |
| 2237 | DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN); |
| 2238 | #endif |
Jean-Jacques Hiblot | 31e7cf3 | 2017-09-21 16:29:49 +0200 | [diff] [blame] | 2239 | |
Jean-Jacques Hiblot | ed9506b | 2017-09-21 16:29:51 +0200 | [diff] [blame] | 2240 | static int mmc_startup_v4(struct mmc *mmc) |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2241 | { |
| 2242 | int err, i; |
| 2243 | u64 capacity; |
| 2244 | bool has_parts = false; |
| 2245 | bool part_completed; |
Jean-Jacques Hiblot | fa6c577 | 2018-01-04 15:23:31 +0100 | [diff] [blame] | 2246 | static const u32 mmc_versions[] = { |
| 2247 | MMC_VERSION_4, |
| 2248 | MMC_VERSION_4_1, |
| 2249 | MMC_VERSION_4_2, |
| 2250 | MMC_VERSION_4_3, |
Jean-Jacques Hiblot | c64862b | 2018-02-09 12:09:28 +0100 | [diff] [blame] | 2251 | MMC_VERSION_4_4, |
Jean-Jacques Hiblot | fa6c577 | 2018-01-04 15:23:31 +0100 | [diff] [blame] | 2252 | MMC_VERSION_4_41, |
| 2253 | MMC_VERSION_4_5, |
| 2254 | MMC_VERSION_5_0, |
| 2255 | MMC_VERSION_5_1 |
| 2256 | }; |
| 2257 | |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2258 | #if CONFIG_IS_ENABLED(MMC_TINY) |
| 2259 | u8 *ext_csd = ext_csd_bkup; |
| 2260 | |
| 2261 | if (IS_SD(mmc) || mmc->version < MMC_VERSION_4) |
| 2262 | return 0; |
| 2263 | |
| 2264 | if (!mmc->ext_csd) |
| 2265 | memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup)); |
| 2266 | |
| 2267 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 2268 | if (err) |
| 2269 | goto error; |
| 2270 | |
| 2271 | /* store the ext csd for future reference */ |
| 2272 | if (!mmc->ext_csd) |
| 2273 | mmc->ext_csd = ext_csd; |
| 2274 | #else |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2275 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2276 | |
| 2277 | if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4)) |
| 2278 | return 0; |
| 2279 | |
| 2280 | /* check ext_csd version and capacity */ |
| 2281 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 2282 | if (err) |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2283 | goto error; |
| 2284 | |
| 2285 | /* store the ext csd for future reference */ |
| 2286 | if (!mmc->ext_csd) |
| 2287 | mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN); |
| 2288 | if (!mmc->ext_csd) |
| 2289 | return -ENOMEM; |
| 2290 | memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN); |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2291 | #endif |
Alexander Kochetkov | f1133c9 | 2018-02-20 14:35:55 +0300 | [diff] [blame] | 2292 | if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions)) |
Jean-Jacques Hiblot | fa6c577 | 2018-01-04 15:23:31 +0100 | [diff] [blame] | 2293 | return -EINVAL; |
| 2294 | |
| 2295 | mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]]; |
| 2296 | |
| 2297 | if (mmc->version >= MMC_VERSION_4_2) { |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2298 | /* |
| 2299 | * According to the JEDEC Standard, the value of |
| 2300 | * ext_csd's capacity is valid if the value is more |
| 2301 | * than 2GB |
| 2302 | */ |
| 2303 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
| 2304 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
| 2305 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
| 2306 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; |
| 2307 | capacity *= MMC_MAX_BLOCK_LEN; |
| 2308 | if ((capacity >> 20) > 2 * 1024) |
| 2309 | mmc->capacity_user = capacity; |
| 2310 | } |
| 2311 | |
Jean-Jacques Hiblot | 201559c | 2019-07-02 10:53:54 +0200 | [diff] [blame] | 2312 | if (mmc->version >= MMC_VERSION_4_5) |
| 2313 | mmc->gen_cmd6_time = ext_csd[EXT_CSD_GENERIC_CMD6_TIME]; |
| 2314 | |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2315 | /* The partition data may be non-zero but it is only |
| 2316 | * effective if PARTITION_SETTING_COMPLETED is set in |
| 2317 | * EXT_CSD, so ignore any data if this bit is not set, |
| 2318 | * except for enabling the high-capacity group size |
| 2319 | * definition (see below). |
| 2320 | */ |
| 2321 | part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & |
| 2322 | EXT_CSD_PARTITION_SETTING_COMPLETED); |
| 2323 | |
Jean-Jacques Hiblot | 7f5b169 | 2019-07-02 10:53:55 +0200 | [diff] [blame] | 2324 | mmc->part_switch_time = ext_csd[EXT_CSD_PART_SWITCH_TIME]; |
| 2325 | /* Some eMMC set the value too low so set a minimum */ |
| 2326 | if (mmc->part_switch_time < MMC_MIN_PART_SWITCH_TIME && mmc->part_switch_time) |
| 2327 | mmc->part_switch_time = MMC_MIN_PART_SWITCH_TIME; |
| 2328 | |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2329 | /* store the partition info of emmc */ |
| 2330 | mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; |
| 2331 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || |
| 2332 | ext_csd[EXT_CSD_BOOT_MULT]) |
| 2333 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; |
| 2334 | if (part_completed && |
| 2335 | (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) |
| 2336 | mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; |
| 2337 | |
| 2338 | mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; |
| 2339 | |
| 2340 | mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; |
| 2341 | |
| 2342 | for (i = 0; i < 4; i++) { |
| 2343 | int idx = EXT_CSD_GP_SIZE_MULT + i * 3; |
| 2344 | uint mult = (ext_csd[idx + 2] << 16) + |
| 2345 | (ext_csd[idx + 1] << 8) + ext_csd[idx]; |
| 2346 | if (mult) |
| 2347 | has_parts = true; |
| 2348 | if (!part_completed) |
| 2349 | continue; |
| 2350 | mmc->capacity_gp[i] = mult; |
| 2351 | mmc->capacity_gp[i] *= |
| 2352 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; |
| 2353 | mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
| 2354 | mmc->capacity_gp[i] <<= 19; |
| 2355 | } |
| 2356 | |
Jean-Jacques Hiblot | c94c547 | 2018-01-04 15:23:35 +0100 | [diff] [blame] | 2357 | #ifndef CONFIG_SPL_BUILD |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2358 | if (part_completed) { |
| 2359 | mmc->enh_user_size = |
| 2360 | (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) + |
| 2361 | (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + |
| 2362 | ext_csd[EXT_CSD_ENH_SIZE_MULT]; |
| 2363 | mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; |
| 2364 | mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
| 2365 | mmc->enh_user_size <<= 19; |
| 2366 | mmc->enh_user_start = |
| 2367 | (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) + |
| 2368 | (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + |
| 2369 | (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + |
| 2370 | ext_csd[EXT_CSD_ENH_START_ADDR]; |
| 2371 | if (mmc->high_capacity) |
| 2372 | mmc->enh_user_start <<= 9; |
| 2373 | } |
Jean-Jacques Hiblot | c94c547 | 2018-01-04 15:23:35 +0100 | [diff] [blame] | 2374 | #endif |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2375 | |
| 2376 | /* |
| 2377 | * Host needs to enable ERASE_GRP_DEF bit if device is |
| 2378 | * partitioned. This bit will be lost every time after a reset |
| 2379 | * or power off. This will affect erase size. |
| 2380 | */ |
| 2381 | if (part_completed) |
| 2382 | has_parts = true; |
| 2383 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && |
| 2384 | (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) |
| 2385 | has_parts = true; |
| 2386 | if (has_parts) { |
| 2387 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 2388 | EXT_CSD_ERASE_GROUP_DEF, 1); |
| 2389 | |
| 2390 | if (err) |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2391 | goto error; |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2392 | |
| 2393 | ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; |
| 2394 | } |
| 2395 | |
| 2396 | if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2397 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2398 | /* Read out group size from ext_csd */ |
| 2399 | mmc->erase_grp_size = |
| 2400 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2401 | #endif |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2402 | /* |
| 2403 | * if high capacity and partition setting completed |
| 2404 | * SEC_COUNT is valid even if it is smaller than 2 GiB |
| 2405 | * JEDEC Standard JESD84-B45, 6.2.4 |
| 2406 | */ |
| 2407 | if (mmc->high_capacity && part_completed) { |
| 2408 | capacity = (ext_csd[EXT_CSD_SEC_CNT]) | |
| 2409 | (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | |
| 2410 | (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | |
| 2411 | (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); |
| 2412 | capacity *= MMC_MAX_BLOCK_LEN; |
| 2413 | mmc->capacity_user = capacity; |
| 2414 | } |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2415 | } |
| 2416 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
| 2417 | else { |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2418 | /* Calculate the group size from the csd value. */ |
| 2419 | int erase_gsz, erase_gmul; |
| 2420 | |
| 2421 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; |
| 2422 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; |
| 2423 | mmc->erase_grp_size = (erase_gsz + 1) |
| 2424 | * (erase_gmul + 1); |
| 2425 | } |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2426 | #endif |
Jean-Jacques Hiblot | ba54ab8 | 2018-01-04 15:23:36 +0100 | [diff] [blame] | 2427 | #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2428 | mmc->hc_wp_grp_size = 1024 |
| 2429 | * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] |
| 2430 | * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
Jean-Jacques Hiblot | ba54ab8 | 2018-01-04 15:23:36 +0100 | [diff] [blame] | 2431 | #endif |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2432 | |
| 2433 | mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; |
| 2434 | |
Loic Poulain | c0aadbb | 2023-01-26 10:24:17 +0100 | [diff] [blame] | 2435 | mmc->can_trim = |
| 2436 | !!(ext_csd[EXT_CSD_SEC_FEATURE] & EXT_CSD_SEC_FEATURE_TRIM_EN); |
| 2437 | |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2438 | return 0; |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2439 | error: |
| 2440 | if (mmc->ext_csd) { |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2441 | #if !CONFIG_IS_ENABLED(MMC_TINY) |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2442 | free(mmc->ext_csd); |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2443 | #endif |
Jean-Jacques Hiblot | 06976eb | 2017-11-30 17:43:59 +0100 | [diff] [blame] | 2444 | mmc->ext_csd = NULL; |
| 2445 | } |
| 2446 | return err; |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2447 | } |
| 2448 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 2449 | static int mmc_startup(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2450 | { |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 2451 | int err, i; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2452 | uint mult, freq; |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2453 | u64 cmult, csize; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2454 | struct mmc_cmd cmd; |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2455 | struct blk_desc *bdesc; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2456 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2457 | #ifdef CONFIG_MMC_SPI_CRC_ON |
| 2458 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ |
| 2459 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; |
| 2460 | cmd.resp_type = MMC_RSP_R1; |
| 2461 | cmd.cmdarg = 1; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2462 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2463 | if (err) |
| 2464 | return err; |
| 2465 | } |
| 2466 | #endif |
| 2467 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2468 | /* Put the Card in Identify Mode */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2469 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
| 2470 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2471 | cmd.resp_type = MMC_RSP_R2; |
| 2472 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2473 | |
Sean Anderson | 8632509 | 2020-10-17 08:36:27 -0400 | [diff] [blame] | 2474 | err = mmc_send_cmd_quirks(mmc, &cmd, NULL, MMC_QUIRK_RETRY_SEND_CID, 4); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2475 | if (err) |
| 2476 | return err; |
| 2477 | |
| 2478 | memcpy(mmc->cid, cmd.response, 16); |
| 2479 | |
| 2480 | /* |
| 2481 | * For MMC cards, set the Relative Address. |
| 2482 | * For SD cards, get the Relatvie Address. |
| 2483 | * This also puts the cards into Standby State |
| 2484 | */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2485 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 2486 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; |
| 2487 | cmd.cmdarg = mmc->rca << 16; |
| 2488 | cmd.resp_type = MMC_RSP_R6; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2489 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2490 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2491 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2492 | if (err) |
| 2493 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2494 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2495 | if (IS_SD(mmc)) |
| 2496 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; |
| 2497 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2498 | |
| 2499 | /* Get the Card-Specific Data */ |
| 2500 | cmd.cmdidx = MMC_CMD_SEND_CSD; |
| 2501 | cmd.resp_type = MMC_RSP_R2; |
| 2502 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2503 | |
| 2504 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 2505 | |
| 2506 | if (err) |
| 2507 | return err; |
| 2508 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 2509 | mmc->csd[0] = cmd.response[0]; |
| 2510 | mmc->csd[1] = cmd.response[1]; |
| 2511 | mmc->csd[2] = cmd.response[2]; |
| 2512 | mmc->csd[3] = cmd.response[3]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2513 | |
| 2514 | if (mmc->version == MMC_VERSION_UNKNOWN) { |
Rabin Vincent | bdf7a68 | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 2515 | int version = (cmd.response[0] >> 26) & 0xf; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2516 | |
| 2517 | switch (version) { |
Bin Meng | 4a4ef87 | 2016-03-17 21:53:13 -0700 | [diff] [blame] | 2518 | case 0: |
| 2519 | mmc->version = MMC_VERSION_1_2; |
| 2520 | break; |
| 2521 | case 1: |
| 2522 | mmc->version = MMC_VERSION_1_4; |
| 2523 | break; |
| 2524 | case 2: |
| 2525 | mmc->version = MMC_VERSION_2_2; |
| 2526 | break; |
| 2527 | case 3: |
| 2528 | mmc->version = MMC_VERSION_3; |
| 2529 | break; |
| 2530 | case 4: |
| 2531 | mmc->version = MMC_VERSION_4; |
| 2532 | break; |
| 2533 | default: |
| 2534 | mmc->version = MMC_VERSION_1_2; |
| 2535 | break; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2536 | } |
| 2537 | } |
| 2538 | |
| 2539 | /* divide frequency by 10, since the mults are 10x bigger */ |
Rabin Vincent | bdf7a68 | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 2540 | freq = fbase[(cmd.response[0] & 0x7)]; |
| 2541 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2542 | |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 2543 | mmc->legacy_speed = freq * mult; |
Jean-Jacques Hiblot | a94fb41 | 2017-09-21 16:29:53 +0200 | [diff] [blame] | 2544 | mmc_select_mode(mmc, MMC_LEGACY); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2545 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 2546 | mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 2547 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2548 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2549 | |
| 2550 | if (IS_SD(mmc)) |
| 2551 | mmc->write_bl_len = mmc->read_bl_len; |
| 2552 | else |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 2553 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2554 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2555 | |
| 2556 | if (mmc->high_capacity) { |
| 2557 | csize = (mmc->csd[1] & 0x3f) << 16 |
| 2558 | | (mmc->csd[2] & 0xffff0000) >> 16; |
| 2559 | cmult = 8; |
| 2560 | } else { |
| 2561 | csize = (mmc->csd[1] & 0x3ff) << 2 |
| 2562 | | (mmc->csd[2] & 0xc0000000) >> 30; |
| 2563 | cmult = (mmc->csd[2] & 0x00038000) >> 15; |
| 2564 | } |
| 2565 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 2566 | mmc->capacity_user = (csize + 1) << (cmult + 2); |
| 2567 | mmc->capacity_user *= mmc->read_bl_len; |
| 2568 | mmc->capacity_boot = 0; |
| 2569 | mmc->capacity_rpmb = 0; |
| 2570 | for (i = 0; i < 4; i++) |
| 2571 | mmc->capacity_gp[i] = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2572 | |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 2573 | if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) |
| 2574 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2575 | |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2576 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 2577 | if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) |
| 2578 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2579 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2580 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 2581 | if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { |
| 2582 | cmd.cmdidx = MMC_CMD_SET_DSR; |
| 2583 | cmd.cmdarg = (mmc->dsr & 0xffff) << 16; |
| 2584 | cmd.resp_type = MMC_RSP_NONE; |
| 2585 | if (mmc_send_cmd(mmc, &cmd, NULL)) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 2586 | pr_warn("MMC: SET_DSR failed\n"); |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 2587 | } |
| 2588 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2589 | /* Select the card, and put it into Transfer Mode */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2590 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 2591 | cmd.cmdidx = MMC_CMD_SELECT_CARD; |
Ajay Bhargav | 4a32fba | 2011-10-05 03:13:23 +0000 | [diff] [blame] | 2592 | cmd.resp_type = MMC_RSP_R1; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2593 | cmd.cmdarg = mmc->rca << 16; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2594 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2595 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 2596 | if (err) |
| 2597 | return err; |
| 2598 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2599 | |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 2600 | /* |
| 2601 | * For SD, its erase group is always one sector |
| 2602 | */ |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2603 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 2604 | mmc->erase_grp_size = 1; |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2605 | #endif |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 2606 | mmc->part_config = MMCPART_NOAVAILABLE; |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 2607 | |
Jean-Jacques Hiblot | ed9506b | 2017-09-21 16:29:51 +0200 | [diff] [blame] | 2608 | err = mmc_startup_v4(mmc); |
Jean-Jacques Hiblot | e84459c | 2017-09-21 16:29:50 +0200 | [diff] [blame] | 2609 | if (err) |
| 2610 | return err; |
Sukumar Ghorai | 232293c | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 2611 | |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2612 | err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart); |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 2613 | if (err) |
| 2614 | return err; |
| 2615 | |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2616 | #if CONFIG_IS_ENABLED(MMC_TINY) |
| 2617 | mmc_set_clock(mmc, mmc->legacy_speed, false); |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 2618 | mmc_select_mode(mmc, MMC_LEGACY); |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2619 | mmc_set_bus_width(mmc, 1); |
| 2620 | #else |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 2621 | if (IS_SD(mmc)) { |
| 2622 | err = sd_get_capabilities(mmc); |
| 2623 | if (err) |
| 2624 | return err; |
| 2625 | err = sd_select_mode_and_width(mmc, mmc->card_caps); |
| 2626 | } else { |
| 2627 | err = mmc_get_capabilities(mmc); |
| 2628 | if (err) |
| 2629 | return err; |
Masahiro Yamada | bf1f25c | 2020-01-23 14:31:12 +0900 | [diff] [blame] | 2630 | err = mmc_select_mode_and_width(mmc, mmc->card_caps); |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 2631 | } |
Marek Vasut | a318a7a | 2018-04-15 00:37:11 +0200 | [diff] [blame] | 2632 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2633 | if (err) |
| 2634 | return err; |
| 2635 | |
Jean-Jacques Hiblot | 3d30972b | 2017-09-21 16:30:09 +0200 | [diff] [blame] | 2636 | mmc->best_mode = mmc->selected_mode; |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 2637 | |
Andrew Gabbasov | 532663b | 2014-12-01 06:59:11 -0600 | [diff] [blame] | 2638 | /* Fix the block length for DDR mode */ |
| 2639 | if (mmc->ddr_mode) { |
| 2640 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2641 | #if CONFIG_IS_ENABLED(MMC_WRITE) |
Andrew Gabbasov | 532663b | 2014-12-01 06:59:11 -0600 | [diff] [blame] | 2642 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; |
Jean-Jacques Hiblot | 27edffe | 2018-01-04 15:23:34 +0100 | [diff] [blame] | 2643 | #endif |
Andrew Gabbasov | 532663b | 2014-12-01 06:59:11 -0600 | [diff] [blame] | 2644 | } |
| 2645 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2646 | /* fill in device description */ |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2647 | bdesc = mmc_get_blk_desc(mmc); |
| 2648 | bdesc->lun = 0; |
| 2649 | bdesc->hwpart = 0; |
| 2650 | bdesc->type = 0; |
| 2651 | bdesc->blksz = mmc->read_bl_len; |
| 2652 | bdesc->log2blksz = LOG2(bdesc->blksz); |
| 2653 | bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); |
Sjoerd Simons | d67754f | 2015-12-04 23:27:40 +0100 | [diff] [blame] | 2654 | #if !defined(CONFIG_SPL_BUILD) || \ |
| 2655 | (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 2656 | !CONFIG_IS_ENABLED(USE_TINY_PRINTF)) |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2657 | sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", |
Taylor Hutt | 7367ec2 | 2012-10-20 17:15:59 +0000 | [diff] [blame] | 2658 | mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), |
| 2659 | (mmc->cid[3] >> 16) & 0xffff); |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2660 | sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, |
Taylor Hutt | 7367ec2 | 2012-10-20 17:15:59 +0000 | [diff] [blame] | 2661 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, |
| 2662 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, |
| 2663 | (mmc->cid[2] >> 24) & 0xff); |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2664 | sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, |
Taylor Hutt | 7367ec2 | 2012-10-20 17:15:59 +0000 | [diff] [blame] | 2665 | (mmc->cid[2] >> 16) & 0xf); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 2666 | #else |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2667 | bdesc->vendor[0] = 0; |
| 2668 | bdesc->product[0] = 0; |
| 2669 | bdesc->revision[0] = 0; |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 2670 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2671 | |
Andre Przywara | 1779804 | 2018-12-17 10:05:45 +0000 | [diff] [blame] | 2672 | #if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)) |
| 2673 | part_init(bdesc); |
| 2674 | #endif |
| 2675 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2676 | return 0; |
| 2677 | } |
| 2678 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 2679 | static int mmc_send_if_cond(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2680 | { |
| 2681 | struct mmc_cmd cmd; |
| 2682 | int err; |
| 2683 | |
| 2684 | cmd.cmdidx = SD_CMD_SEND_IF_COND; |
| 2685 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 2686 | cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2687 | cmd.resp_type = MMC_RSP_R7; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2688 | |
| 2689 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 2690 | |
| 2691 | if (err) |
| 2692 | return err; |
| 2693 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 2694 | if ((cmd.response[0] & 0xff) != 0xaa) |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 2695 | return -EOPNOTSUPP; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2696 | else |
| 2697 | mmc->version = SD_VERSION_2; |
| 2698 | |
| 2699 | return 0; |
| 2700 | } |
| 2701 | |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 2702 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Paul Kocialkowski | 2439fe9 | 2014-11-08 20:55:45 +0100 | [diff] [blame] | 2703 | /* board-specific MMC power initializations. */ |
| 2704 | __weak void board_mmc_power_init(void) |
| 2705 | { |
| 2706 | } |
Simon Glass | 833b80d | 2017-04-22 19:10:56 -0600 | [diff] [blame] | 2707 | #endif |
Paul Kocialkowski | 2439fe9 | 2014-11-08 20:55:45 +0100 | [diff] [blame] | 2708 | |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2709 | static int mmc_power_init(struct mmc *mmc) |
| 2710 | { |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 2711 | #if CONFIG_IS_ENABLED(DM_MMC) |
Jean-Jacques Hiblot | a49ffa1 | 2017-09-21 16:29:48 +0200 | [diff] [blame] | 2712 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2713 | int ret; |
| 2714 | |
| 2715 | ret = device_get_supply_regulator(mmc->dev, "vmmc-supply", |
Jean-Jacques Hiblot | a49ffa1 | 2017-09-21 16:29:48 +0200 | [diff] [blame] | 2716 | &mmc->vmmc_supply); |
| 2717 | if (ret) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2718 | pr_debug("%s: No vmmc supply\n", mmc->dev->name); |
Jean-Jacques Hiblot | a49ffa1 | 2017-09-21 16:29:48 +0200 | [diff] [blame] | 2719 | |
| 2720 | ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply", |
| 2721 | &mmc->vqmmc_supply); |
| 2722 | if (ret) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2723 | pr_debug("%s: No vqmmc supply\n", mmc->dev->name); |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2724 | #endif |
| 2725 | #else /* !CONFIG_DM_MMC */ |
| 2726 | /* |
| 2727 | * Driver model should use a regulator, as above, rather than calling |
| 2728 | * out to board code. |
| 2729 | */ |
| 2730 | board_mmc_power_init(); |
| 2731 | #endif |
| 2732 | return 0; |
| 2733 | } |
| 2734 | |
| 2735 | /* |
| 2736 | * put the host in the initial state: |
| 2737 | * - turn on Vdd (card power supply) |
| 2738 | * - configure the bus width and clock to minimal values |
| 2739 | */ |
| 2740 | static void mmc_set_initial_state(struct mmc *mmc) |
| 2741 | { |
| 2742 | int err; |
| 2743 | |
| 2744 | /* First try to set 3.3V. If it fails set to 1.8V */ |
| 2745 | err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330); |
| 2746 | if (err != 0) |
| 2747 | err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180); |
| 2748 | if (err != 0) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 2749 | pr_warn("mmc: failed to set signal voltage\n"); |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2750 | |
| 2751 | mmc_select_mode(mmc, MMC_LEGACY); |
| 2752 | mmc_set_bus_width(mmc, 1); |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 2753 | mmc_set_clock(mmc, 0, MMC_CLK_ENABLE); |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2754 | } |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2755 | |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2756 | static int mmc_power_on(struct mmc *mmc) |
| 2757 | { |
| 2758 | #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) |
Jean-Jacques Hiblot | a49ffa1 | 2017-09-21 16:29:48 +0200 | [diff] [blame] | 2759 | if (mmc->vmmc_supply) { |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2760 | int ret = regulator_set_enable(mmc->vmmc_supply, true); |
| 2761 | |
Jaehoon Chung | c71c95c | 2020-11-06 20:30:41 +0900 | [diff] [blame] | 2762 | if (ret && ret != -EACCES) { |
Jaehoon Chung | ad9f7ce | 2020-11-17 07:04:59 +0900 | [diff] [blame] | 2763 | printf("Error enabling VMMC supply : %d\n", ret); |
Jean-Jacques Hiblot | a49ffa1 | 2017-09-21 16:29:48 +0200 | [diff] [blame] | 2764 | return ret; |
| 2765 | } |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2766 | } |
| 2767 | #endif |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2768 | return 0; |
| 2769 | } |
| 2770 | |
| 2771 | static int mmc_power_off(struct mmc *mmc) |
| 2772 | { |
Jaehoon Chung | 239cb2f | 2018-01-26 19:25:29 +0900 | [diff] [blame] | 2773 | mmc_set_clock(mmc, 0, MMC_CLK_DISABLE); |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2774 | #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) |
| 2775 | if (mmc->vmmc_supply) { |
| 2776 | int ret = regulator_set_enable(mmc->vmmc_supply, false); |
| 2777 | |
Jaehoon Chung | c71c95c | 2020-11-06 20:30:41 +0900 | [diff] [blame] | 2778 | if (ret && ret != -EACCES) { |
Jaehoon Chung | ad9f7ce | 2020-11-17 07:04:59 +0900 | [diff] [blame] | 2779 | pr_debug("Error disabling VMMC supply : %d\n", ret); |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2780 | return ret; |
| 2781 | } |
| 2782 | } |
Simon Glass | 833b80d | 2017-04-22 19:10:56 -0600 | [diff] [blame] | 2783 | #endif |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2784 | return 0; |
| 2785 | } |
| 2786 | |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2787 | static int mmc_power_cycle(struct mmc *mmc) |
| 2788 | { |
| 2789 | int ret; |
| 2790 | |
| 2791 | ret = mmc_power_off(mmc); |
| 2792 | if (ret) |
| 2793 | return ret; |
Yann Gautier | 6f55833 | 2019-09-19 17:56:12 +0200 | [diff] [blame] | 2794 | |
| 2795 | ret = mmc_host_power_cycle(mmc); |
| 2796 | if (ret) |
| 2797 | return ret; |
| 2798 | |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2799 | /* |
| 2800 | * SD spec recommends at least 1ms of delay. Let's wait for 2ms |
| 2801 | * to be on the safer side. |
| 2802 | */ |
| 2803 | udelay(2000); |
| 2804 | return mmc_power_on(mmc); |
| 2805 | } |
| 2806 | |
Pali Rohár | 7c63962 | 2021-07-14 16:37:29 +0200 | [diff] [blame] | 2807 | int mmc_get_op_cond(struct mmc *mmc, bool quiet) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2808 | { |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 2809 | bool uhs_en = supports_uhs(mmc->cfg->host_caps); |
Macpaul Lin | 028bde1 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 2810 | int err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2811 | |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 2812 | if (mmc->has_init) |
| 2813 | return 0; |
| 2814 | |
Peng Fan | 1530596 | 2016-10-11 15:08:43 +0800 | [diff] [blame] | 2815 | err = mmc_power_init(mmc); |
| 2816 | if (err) |
| 2817 | return err; |
Paul Kocialkowski | 2439fe9 | 2014-11-08 20:55:45 +0100 | [diff] [blame] | 2818 | |
Kishon Vijay Abraham I | 07baaa6 | 2017-09-21 16:30:10 +0200 | [diff] [blame] | 2819 | #ifdef CONFIG_MMC_QUIRKS |
| 2820 | mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN | |
Joel Johnson | 5ea041b | 2020-01-11 09:08:14 -0700 | [diff] [blame] | 2821 | MMC_QUIRK_RETRY_SEND_CID | |
| 2822 | MMC_QUIRK_RETRY_APP_CMD; |
Kishon Vijay Abraham I | 07baaa6 | 2017-09-21 16:30:10 +0200 | [diff] [blame] | 2823 | #endif |
| 2824 | |
Jean-Jacques Hiblot | dc030fb | 2017-09-21 16:30:08 +0200 | [diff] [blame] | 2825 | err = mmc_power_cycle(mmc); |
| 2826 | if (err) { |
| 2827 | /* |
| 2828 | * if power cycling is not supported, we should not try |
| 2829 | * to use the UHS modes, because we wouldn't be able to |
| 2830 | * recover from an error during the UHS initialization. |
| 2831 | */ |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2832 | pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n"); |
Jean-Jacques Hiblot | dc030fb | 2017-09-21 16:30:08 +0200 | [diff] [blame] | 2833 | uhs_en = false; |
| 2834 | mmc->host_caps &= ~UHS_CAPS; |
| 2835 | err = mmc_power_on(mmc); |
| 2836 | } |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2837 | if (err) |
| 2838 | return err; |
| 2839 | |
Simon Glass | eba48f9 | 2017-07-29 11:35:31 -0600 | [diff] [blame] | 2840 | #if CONFIG_IS_ENABLED(DM_MMC) |
Yangbo Lu | c46f5d7 | 2020-09-01 16:57:59 +0800 | [diff] [blame] | 2841 | /* |
| 2842 | * Re-initialization is needed to clear old configuration for |
| 2843 | * mmc rescan. |
| 2844 | */ |
| 2845 | err = mmc_reinit(mmc); |
Simon Glass | 394dfc0 | 2016-06-12 23:30:22 -0600 | [diff] [blame] | 2846 | #else |
Pantelis Antoniou | c9e7591 | 2014-02-26 19:28:45 +0200 | [diff] [blame] | 2847 | /* made sure it's not NULL earlier */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 2848 | err = mmc->cfg->ops->init(mmc); |
Yangbo Lu | c46f5d7 | 2020-09-01 16:57:59 +0800 | [diff] [blame] | 2849 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2850 | if (err) |
| 2851 | return err; |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 2852 | mmc->ddr_mode = 0; |
Kishon Vijay Abraham I | 4afb12b | 2017-09-21 16:30:00 +0200 | [diff] [blame] | 2853 | |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 2854 | retry: |
Kishon Vijay Abraham I | 80b87e1 | 2017-09-21 16:30:02 +0200 | [diff] [blame] | 2855 | mmc_set_initial_state(mmc); |
Jean-Jacques Hiblot | 5f23d87 | 2017-09-21 16:30:01 +0200 | [diff] [blame] | 2856 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2857 | /* Reset the Card */ |
| 2858 | err = mmc_go_idle(mmc); |
| 2859 | |
| 2860 | if (err) |
| 2861 | return err; |
| 2862 | |
Marcel Ziswiler | b2b7fc8 | 2019-05-20 02:44:53 +0200 | [diff] [blame] | 2863 | /* The internal partition reset to user partition(0) at every CMD0 */ |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 2864 | mmc_get_blk_desc(mmc)->hwpart = 0; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 2865 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2866 | /* Test for SD version 2 */ |
Macpaul Lin | 028bde1 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 2867 | err = mmc_send_if_cond(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2868 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2869 | /* Now try to get the SD card's operating condition */ |
Jean-Jacques Hiblot | f4d5b3e | 2017-09-21 16:30:07 +0200 | [diff] [blame] | 2870 | err = sd_send_op_cond(mmc, uhs_en); |
| 2871 | if (err && uhs_en) { |
| 2872 | uhs_en = false; |
| 2873 | mmc_power_cycle(mmc); |
| 2874 | goto retry; |
| 2875 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2876 | |
| 2877 | /* If the command timed out, we check for an MMC card */ |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 2878 | if (err == -ETIMEDOUT) { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2879 | err = mmc_send_op_cond(mmc); |
| 2880 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 2881 | if (err) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 2882 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Pali Rohár | 7c63962 | 2021-07-14 16:37:29 +0200 | [diff] [blame] | 2883 | if (!quiet) |
| 2884 | pr_err("Card did not respond to voltage select! : %d\n", err); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 2885 | #endif |
Jaehoon Chung | 7825d20 | 2016-07-19 16:33:36 +0900 | [diff] [blame] | 2886 | return -EOPNOTSUPP; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2887 | } |
| 2888 | } |
| 2889 | |
Jon Nettleton | 2663fe4 | 2018-06-11 15:26:19 +0300 | [diff] [blame] | 2890 | return err; |
| 2891 | } |
| 2892 | |
| 2893 | int mmc_start_init(struct mmc *mmc) |
| 2894 | { |
| 2895 | bool no_card; |
| 2896 | int err = 0; |
| 2897 | |
| 2898 | /* |
| 2899 | * all hosts are capable of 1 bit bus-width and able to use the legacy |
| 2900 | * timings. |
| 2901 | */ |
Faiz Abbas | 01db77e | 2020-02-26 13:44:32 +0530 | [diff] [blame] | 2902 | mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(MMC_LEGACY) | |
Aswath Govindraju | bb5b9fe | 2021-08-13 23:04:41 +0530 | [diff] [blame] | 2903 | MMC_MODE_1BIT; |
| 2904 | |
| 2905 | if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) { |
| 2906 | if (mmc->user_speed_mode != MMC_MODES_END) { |
| 2907 | int i; |
| 2908 | /* set host caps */ |
| 2909 | if (mmc->host_caps & MMC_CAP(mmc->user_speed_mode)) { |
| 2910 | /* Remove all existing speed capabilities */ |
| 2911 | for (i = MMC_LEGACY; i < MMC_MODES_END; i++) |
| 2912 | mmc->host_caps &= ~MMC_CAP(i); |
| 2913 | mmc->host_caps |= (MMC_CAP(mmc->user_speed_mode) |
| 2914 | | MMC_CAP(MMC_LEGACY) | |
| 2915 | MMC_MODE_1BIT); |
| 2916 | } else { |
| 2917 | pr_err("bus_mode requested is not supported\n"); |
| 2918 | return -EINVAL; |
| 2919 | } |
| 2920 | } |
| 2921 | } |
Faiz Abbas | f6fd4ec | 2020-02-26 13:44:30 +0530 | [diff] [blame] | 2922 | #if CONFIG_IS_ENABLED(DM_MMC) |
| 2923 | mmc_deferred_probe(mmc); |
| 2924 | #endif |
Jon Nettleton | 2663fe4 | 2018-06-11 15:26:19 +0300 | [diff] [blame] | 2925 | #if !defined(CONFIG_MMC_BROKEN_CD) |
Jon Nettleton | 2663fe4 | 2018-06-11 15:26:19 +0300 | [diff] [blame] | 2926 | no_card = mmc_getcd(mmc) == 0; |
| 2927 | #else |
| 2928 | no_card = 0; |
| 2929 | #endif |
| 2930 | #if !CONFIG_IS_ENABLED(DM_MMC) |
Baruch Siach | 0448ce6 | 2019-07-22 15:52:12 +0300 | [diff] [blame] | 2931 | /* we pretend there's no card when init is NULL */ |
Jon Nettleton | 2663fe4 | 2018-06-11 15:26:19 +0300 | [diff] [blame] | 2932 | no_card = no_card || (mmc->cfg->ops->init == NULL); |
| 2933 | #endif |
| 2934 | if (no_card) { |
| 2935 | mmc->has_init = 0; |
| 2936 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
| 2937 | pr_err("MMC: no card present\n"); |
| 2938 | #endif |
| 2939 | return -ENOMEDIUM; |
| 2940 | } |
| 2941 | |
Pali Rohár | 7c63962 | 2021-07-14 16:37:29 +0200 | [diff] [blame] | 2942 | err = mmc_get_op_cond(mmc, false); |
Jon Nettleton | 2663fe4 | 2018-06-11 15:26:19 +0300 | [diff] [blame] | 2943 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 2944 | if (!err) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2945 | mmc->init_in_progress = 1; |
| 2946 | |
| 2947 | return err; |
| 2948 | } |
| 2949 | |
| 2950 | static int mmc_complete_init(struct mmc *mmc) |
| 2951 | { |
| 2952 | int err = 0; |
| 2953 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 2954 | mmc->init_in_progress = 0; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2955 | if (mmc->op_cond_pending) |
| 2956 | err = mmc_complete_op_cond(mmc); |
| 2957 | |
| 2958 | if (!err) |
| 2959 | err = mmc_startup(mmc); |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 2960 | if (err) |
| 2961 | mmc->has_init = 0; |
| 2962 | else |
| 2963 | mmc->has_init = 1; |
| 2964 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 2965 | } |
| 2966 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2967 | int mmc_init(struct mmc *mmc) |
| 2968 | { |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 2969 | int err = 0; |
Vipul Kumar | dbad7b4 | 2018-05-03 12:20:54 +0530 | [diff] [blame] | 2970 | __maybe_unused ulong start; |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 2971 | #if CONFIG_IS_ENABLED(DM_MMC) |
Simon Glass | 59bc6f2 | 2016-05-01 13:52:41 -0600 | [diff] [blame] | 2972 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2973 | |
Simon Glass | 59bc6f2 | 2016-05-01 13:52:41 -0600 | [diff] [blame] | 2974 | upriv->mmc = mmc; |
| 2975 | #endif |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2976 | if (mmc->has_init) |
| 2977 | return 0; |
Mateusz Zalega | da35178 | 2014-04-29 20:15:30 +0200 | [diff] [blame] | 2978 | |
| 2979 | start = get_timer(0); |
| 2980 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2981 | if (!mmc->init_in_progress) |
| 2982 | err = mmc_start_init(mmc); |
| 2983 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 2984 | if (!err) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2985 | err = mmc_complete_init(mmc); |
Jagan Teki | 9bee2b5 | 2017-01-10 11:18:43 +0100 | [diff] [blame] | 2986 | if (err) |
Masahiro Yamada | f97b148 | 2018-01-28 19:11:42 +0900 | [diff] [blame] | 2987 | pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start)); |
Jagan Teki | 9bee2b5 | 2017-01-10 11:18:43 +0100 | [diff] [blame] | 2988 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 2989 | return err; |
| 2990 | } |
| 2991 | |
Marek Vasut | a4773fc | 2019-01-29 04:45:51 +0100 | [diff] [blame] | 2992 | #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \ |
| 2993 | CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ |
| 2994 | CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) |
| 2995 | int mmc_deinit(struct mmc *mmc) |
| 2996 | { |
| 2997 | u32 caps_filtered; |
| 2998 | |
| 2999 | if (!mmc->has_init) |
| 3000 | return 0; |
| 3001 | |
| 3002 | if (IS_SD(mmc)) { |
| 3003 | caps_filtered = mmc->card_caps & |
| 3004 | ~(MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | |
| 3005 | MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_DDR50) | |
| 3006 | MMC_CAP(UHS_SDR104)); |
| 3007 | |
| 3008 | return sd_select_mode_and_width(mmc, caps_filtered); |
| 3009 | } else { |
| 3010 | caps_filtered = mmc->card_caps & |
Ye Li | 3679e80 | 2021-08-17 17:20:34 +0800 | [diff] [blame] | 3011 | ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_400_ES)); |
Marek Vasut | a4773fc | 2019-01-29 04:45:51 +0100 | [diff] [blame] | 3012 | |
| 3013 | return mmc_select_mode_and_width(mmc, caps_filtered); |
| 3014 | } |
| 3015 | } |
| 3016 | #endif |
| 3017 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 3018 | int mmc_set_dsr(struct mmc *mmc, u16 val) |
| 3019 | { |
| 3020 | mmc->dsr = val; |
| 3021 | return 0; |
| 3022 | } |
| 3023 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 3024 | /* CPU-specific MMC initializations */ |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 3025 | __weak int cpu_mmc_init(struct bd_info *bis) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3026 | { |
| 3027 | return -1; |
| 3028 | } |
| 3029 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 3030 | /* board-specific MMC initializations. */ |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 3031 | __weak int board_mmc_init(struct bd_info *bis) |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 3032 | { |
| 3033 | return -1; |
| 3034 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3035 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 3036 | void mmc_set_preinit(struct mmc *mmc, int preinit) |
| 3037 | { |
| 3038 | mmc->preinit = preinit; |
| 3039 | } |
| 3040 | |
Faiz Abbas | b3857fd | 2018-02-12 19:35:24 +0530 | [diff] [blame] | 3041 | #if CONFIG_IS_ENABLED(DM_MMC) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 3042 | static int mmc_probe(struct bd_info *bis) |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3043 | { |
Simon Glass | 547cb34 | 2015-12-29 05:22:49 -0700 | [diff] [blame] | 3044 | int ret, i; |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3045 | struct uclass *uc; |
Simon Glass | 547cb34 | 2015-12-29 05:22:49 -0700 | [diff] [blame] | 3046 | struct udevice *dev; |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3047 | |
| 3048 | ret = uclass_get(UCLASS_MMC, &uc); |
| 3049 | if (ret) |
| 3050 | return ret; |
| 3051 | |
Simon Glass | 547cb34 | 2015-12-29 05:22:49 -0700 | [diff] [blame] | 3052 | /* |
| 3053 | * Try to add them in sequence order. Really with driver model we |
| 3054 | * should allow holes, but the current MMC list does not allow that. |
| 3055 | * So if we request 0, 1, 3 we will get 0, 1, 2. |
| 3056 | */ |
| 3057 | for (i = 0; ; i++) { |
| 3058 | ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev); |
| 3059 | if (ret == -ENODEV) |
| 3060 | break; |
| 3061 | } |
| 3062 | uclass_foreach_dev(dev, uc) { |
| 3063 | ret = device_probe(dev); |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3064 | if (ret) |
Jean-Jacques Hiblot | 678b608 | 2017-11-30 17:44:00 +0100 | [diff] [blame] | 3065 | pr_err("%s - probe failed: %d\n", dev->name, ret); |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3066 | } |
| 3067 | |
| 3068 | return 0; |
| 3069 | } |
| 3070 | #else |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 3071 | static int mmc_probe(struct bd_info *bis) |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3072 | { |
| 3073 | if (board_mmc_init(bis) < 0) |
| 3074 | cpu_mmc_init(bis); |
| 3075 | |
| 3076 | return 0; |
| 3077 | } |
| 3078 | #endif |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 3079 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 3080 | int mmc_initialize(struct bd_info *bis) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3081 | { |
Daniel Kochmański | 13df57b | 2015-05-29 16:55:43 +0200 | [diff] [blame] | 3082 | static int initialized = 0; |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3083 | int ret; |
Daniel Kochmański | 13df57b | 2015-05-29 16:55:43 +0200 | [diff] [blame] | 3084 | if (initialized) /* Avoid initializing mmc multiple times */ |
| 3085 | return 0; |
| 3086 | initialized = 1; |
| 3087 | |
Simon Glass | 5f4bd8c | 2017-07-04 13:31:19 -0600 | [diff] [blame] | 3088 | #if !CONFIG_IS_ENABLED(BLK) |
Marek Vasut | f537e39 | 2016-12-01 02:06:33 +0100 | [diff] [blame] | 3089 | #if !CONFIG_IS_ENABLED(MMC_TINY) |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 3090 | mmc_list_init(); |
| 3091 | #endif |
Marek Vasut | f537e39 | 2016-12-01 02:06:33 +0100 | [diff] [blame] | 3092 | #endif |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 3093 | ret = mmc_probe(bis); |
| 3094 | if (ret) |
| 3095 | return ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3096 | |
Ying Zhang | 9ff7026 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 3097 | #ifndef CONFIG_SPL_BUILD |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3098 | print_mmc_devices(','); |
Ying Zhang | 9ff7026 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 3099 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3100 | |
Simon Glass | e5db115 | 2016-05-01 13:52:35 -0600 | [diff] [blame] | 3101 | mmc_do_preinit(); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 3102 | return 0; |
| 3103 | } |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3104 | |
Lokesh Vutla | c59b41c | 2019-09-09 14:40:36 +0530 | [diff] [blame] | 3105 | #if CONFIG_IS_ENABLED(DM_MMC) |
| 3106 | int mmc_init_device(int num) |
| 3107 | { |
| 3108 | struct udevice *dev; |
| 3109 | struct mmc *m; |
| 3110 | int ret; |
| 3111 | |
Aswath Govindraju | 57e2ccb | 2021-03-25 12:48:47 +0530 | [diff] [blame] | 3112 | if (uclass_get_device_by_seq(UCLASS_MMC, num, &dev)) { |
| 3113 | ret = uclass_get_device(UCLASS_MMC, num, &dev); |
| 3114 | if (ret) |
| 3115 | return ret; |
| 3116 | } |
Lokesh Vutla | c59b41c | 2019-09-09 14:40:36 +0530 | [diff] [blame] | 3117 | |
| 3118 | m = mmc_get_mmc_dev(dev); |
| 3119 | if (!m) |
| 3120 | return 0; |
Venkatesh Yadav Abbarapu | 6738fcb | 2022-09-29 10:22:49 +0530 | [diff] [blame] | 3121 | |
| 3122 | /* Initialising user set speed mode */ |
| 3123 | m->user_speed_mode = MMC_MODES_END; |
| 3124 | |
Lokesh Vutla | c59b41c | 2019-09-09 14:40:36 +0530 | [diff] [blame] | 3125 | if (m->preinit) |
| 3126 | mmc_start_init(m); |
| 3127 | |
| 3128 | return 0; |
| 3129 | } |
| 3130 | #endif |
| 3131 | |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3132 | #ifdef CONFIG_CMD_BKOPS_ENABLE |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3133 | int mmc_set_bkops_enable(struct mmc *mmc, bool autobkops, bool enable) |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3134 | { |
| 3135 | int err; |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3136 | u32 bit = autobkops ? BIT(1) : BIT(0); |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3137 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
| 3138 | |
| 3139 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 3140 | if (err) { |
| 3141 | puts("Could not get ext_csd register values\n"); |
| 3142 | return err; |
| 3143 | } |
| 3144 | |
| 3145 | if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) { |
| 3146 | puts("Background operations not supported on device\n"); |
| 3147 | return -EMEDIUMTYPE; |
| 3148 | } |
| 3149 | |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3150 | if (enable && (ext_csd[EXT_CSD_BKOPS_EN] & bit)) { |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3151 | puts("Background operations already enabled\n"); |
| 3152 | return 0; |
| 3153 | } |
| 3154 | |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3155 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, |
| 3156 | enable ? bit : 0); |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3157 | if (err) { |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3158 | printf("Failed to %sable manual background operations\n", |
| 3159 | enable ? "en" : "dis"); |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3160 | return err; |
| 3161 | } |
| 3162 | |
Marek Vasut | efdeed6 | 2023-01-05 15:19:08 +0100 | [diff] [blame] | 3163 | printf("%sabled %s background operations\n", |
| 3164 | enable ? "En" : "Dis", autobkops ? "auto" : "manual"); |
Tomas Melin | c17dae5 | 2016-11-25 11:01:03 +0200 | [diff] [blame] | 3165 | |
| 3166 | return 0; |
| 3167 | } |
| 3168 | #endif |
David Woodhouse | 49fee03 | 2020-08-04 10:05:46 +0100 | [diff] [blame] | 3169 | |
| 3170 | __weak int mmc_get_env_dev(void) |
| 3171 | { |
| 3172 | #ifdef CONFIG_SYS_MMC_ENV_DEV |
| 3173 | return CONFIG_SYS_MMC_ENV_DEV; |
| 3174 | #else |
| 3175 | return 0; |
| 3176 | #endif |
| 3177 | } |