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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andy Flemingad347bb2008-10-30 16:41:01 -05002/*
3 * Copyright 2008, Freescale Semiconductor, Inc
Yangbo Luf9049b22020-06-17 18:08:58 +08004 * Copyright 2020 NXP
Andy Flemingad347bb2008-10-30 16:41:01 -05005 * Andy Fleming
6 *
7 * Based vaguely on the Linux code
Andy Flemingad347bb2008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
Simon Glass655306c2020-05-10 11:39:58 -060012#include <blk.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050013#include <command.h>
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -060014#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060015#include <log.h>
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -060016#include <dm/device-internal.h>
Stephen Warrenbf0c7852014-05-23 12:47:06 -060017#include <errno.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050018#include <mmc.h>
19#include <part.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060020#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060021#include <linux/delay.h>
Peng Fan15305962016-10-11 15:08:43 +080022#include <power/regulator.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050023#include <malloc.h>
Simon Glass2dd337a2015-09-02 17:24:58 -060024#include <memalign.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050025#include <linux/list.h>
Rabin Vincent69d4e2c2009-04-05 13:30:54 +053026#include <div64.h>
Paul Burton8d30cc92013-09-09 15:30:26 +010027#include "mmc_private.h"
Andy Flemingad347bb2008-10-30 16:41:01 -050028
Jean-Jacques Hiblot201559c2019-07-02 10:53:54 +020029#define DEFAULT_CMD6_TIMEOUT_MS 500
30
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +020031static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
Marek Vasutf537e392016-12-01 02:06:33 +010032
Simon Glasseba48f92017-07-29 11:35:31 -060033#if !CONFIG_IS_ENABLED(DM_MMC)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +020034
Sam Protsenkodb174c62019-08-14 22:52:51 +030035static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +020036{
Loic Poulain9c32f4f2022-05-26 16:37:21 +020037 if (mmc->cfg->ops->wait_dat0)
38 return mmc->cfg->ops->wait_dat0(mmc, state, timeout_us);
39
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +020040 return -ENOSYS;
41}
42
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +020043__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanov020f2612012-12-03 02:19:46 +000044{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
Peter Korsgaardf7b15102013-03-21 04:00:03 +000054 if (wp < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +020055 if (mmc->cfg->ops->getwp)
56 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +000057 else
58 wp = 0;
59 }
Nikita Kiryanov020f2612012-12-03 02:19:46 +000060
61 return wp;
62}
63
Jeroen Hofstee47726302014-07-10 22:46:28 +020064__weak int board_mmc_getcd(struct mmc *mmc)
65{
Stefano Babic6e00edf2010-02-05 15:04:43 +010066 return -1;
67}
Simon Glass394dfc02016-06-12 23:30:22 -060068#endif
Stefano Babic6e00edf2010-02-05 15:04:43 +010069
Simon Glassb23d96e2016-06-12 23:30:20 -060070#ifdef CONFIG_MMC_TRACE
71void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
Andy Flemingad347bb2008-10-30 16:41:01 -050072{
Simon Glassb23d96e2016-06-12 23:30:20 -060073 printf("CMD_SEND:%d\n", cmd->cmdidx);
Marek Vasut6eeee302019-03-23 18:54:45 +010074 printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
Simon Glassb23d96e2016-06-12 23:30:20 -060075}
Marek Vasutdccb6082012-03-15 18:41:35 +000076
Simon Glassb23d96e2016-06-12 23:30:20 -060077void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
78{
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000079 int i;
80 u8 *ptr;
81
Bin Meng8d1ad1e2016-03-17 21:53:14 -070082 if (ret) {
83 printf("\t\tRET\t\t\t %d\n", ret);
84 } else {
85 switch (cmd->resp_type) {
86 case MMC_RSP_NONE:
87 printf("\t\tMMC_RSP_NONE\n");
88 break;
89 case MMC_RSP_R1:
Marek Vasut6eeee302019-03-23 18:54:45 +010090 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -070091 cmd->response[0]);
92 break;
93 case MMC_RSP_R1b:
Marek Vasut6eeee302019-03-23 18:54:45 +010094 printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -070095 cmd->response[0]);
96 break;
97 case MMC_RSP_R2:
Marek Vasut6eeee302019-03-23 18:54:45 +010098 printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -070099 cmd->response[0]);
Marek Vasut6eeee302019-03-23 18:54:45 +0100100 printf("\t\t \t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700101 cmd->response[1]);
Marek Vasut6eeee302019-03-23 18:54:45 +0100102 printf("\t\t \t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700103 cmd->response[2]);
Marek Vasut6eeee302019-03-23 18:54:45 +0100104 printf("\t\t \t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700105 cmd->response[3]);
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000106 printf("\n");
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700107 printf("\t\t\t\t\tDUMPING DATA\n");
108 for (i = 0; i < 4; i++) {
109 int j;
110 printf("\t\t\t\t\t%03d - ", i*4);
111 ptr = (u8 *)&cmd->response[i];
112 ptr += 3;
113 for (j = 0; j < 4; j++)
Marek Vasut6eeee302019-03-23 18:54:45 +0100114 printf("%02x ", *ptr--);
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700115 printf("\n");
116 }
117 break;
118 case MMC_RSP_R3:
Marek Vasut6eeee302019-03-23 18:54:45 +0100119 printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
Bin Meng8d1ad1e2016-03-17 21:53:14 -0700120 cmd->response[0]);
121 break;
122 default:
123 printf("\t\tERROR MMC rsp not supported\n");
124 break;
Bin Meng4a4ef872016-03-17 21:53:13 -0700125 }
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000126 }
Simon Glassb23d96e2016-06-12 23:30:20 -0600127}
128
129void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
130{
131 int status;
132
133 status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
134 printf("CURR STATE:%d\n", status);
135}
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000136#endif
Simon Glassb23d96e2016-06-12 23:30:20 -0600137
Pali Rohár377ecee2022-04-03 00:20:10 +0200138#if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG) || CONFIG_VAL(LOGLEVEL) >= LOGL_DEBUG
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +0200139const char *mmc_mode_name(enum bus_mode mode)
140{
141 static const char *const names[] = {
142 [MMC_LEGACY] = "MMC legacy",
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +0200143 [MMC_HS] = "MMC High Speed (26MHz)",
144 [SD_HS] = "SD High Speed (50MHz)",
145 [UHS_SDR12] = "UHS SDR12 (25MHz)",
146 [UHS_SDR25] = "UHS SDR25 (50MHz)",
147 [UHS_SDR50] = "UHS SDR50 (100MHz)",
148 [UHS_SDR104] = "UHS SDR104 (208MHz)",
149 [UHS_DDR50] = "UHS DDR50 (50MHz)",
150 [MMC_HS_52] = "MMC High Speed (52MHz)",
151 [MMC_DDR_52] = "MMC DDR52 (52MHz)",
152 [MMC_HS_200] = "HS200 (200MHz)",
Peng Fan46801252018-08-10 14:07:54 +0800153 [MMC_HS_400] = "HS400 (200MHz)",
Peng Faneede83b2019-07-10 14:43:07 +0800154 [MMC_HS_400_ES] = "HS400ES (200MHz)",
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +0200155 };
156
157 if (mode >= MMC_MODES_END)
158 return "Unknown mode";
159 else
160 return names[mode];
161}
162#endif
163
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200164static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
165{
166 static const int freqs[] = {
Jaehoon Chung7c5c7302018-01-30 14:10:16 +0900167 [MMC_LEGACY] = 25000000,
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200168 [MMC_HS] = 26000000,
169 [SD_HS] = 50000000,
Jaehoon Chung7c5c7302018-01-30 14:10:16 +0900170 [MMC_HS_52] = 52000000,
171 [MMC_DDR_52] = 52000000,
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200172 [UHS_SDR12] = 25000000,
173 [UHS_SDR25] = 50000000,
174 [UHS_SDR50] = 100000000,
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200175 [UHS_DDR50] = 50000000,
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100176 [UHS_SDR104] = 208000000,
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200177 [MMC_HS_200] = 200000000,
Peng Fan46801252018-08-10 14:07:54 +0800178 [MMC_HS_400] = 200000000,
Peng Faneede83b2019-07-10 14:43:07 +0800179 [MMC_HS_400_ES] = 200000000,
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200180 };
181
182 if (mode == MMC_LEGACY)
183 return mmc->legacy_speed;
184 else if (mode >= MMC_MODES_END)
185 return 0;
186 else
187 return freqs[mode];
188}
189
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +0200190static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
191{
192 mmc->selected_mode = mode;
Jean-Jacques Hiblot78422312017-09-21 16:29:55 +0200193 mmc->tran_speed = mmc_mode2freq(mmc, mode);
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200194 mmc->ddr_mode = mmc_is_mode_ddr(mode);
Masahiro Yamadaf97b1482018-01-28 19:11:42 +0900195 pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
196 mmc->tran_speed / 1000000);
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +0200197 return 0;
198}
199
Simon Glasseba48f92017-07-29 11:35:31 -0600200#if !CONFIG_IS_ENABLED(DM_MMC)
Simon Glassb23d96e2016-06-12 23:30:20 -0600201int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
202{
203 int ret;
204
205 mmmc_trace_before_send(mmc, cmd);
206 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
207 mmmc_trace_after_send(mmc, cmd, ret);
208
Marek Vasutdccb6082012-03-15 18:41:35 +0000209 return ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500210}
Simon Glass394dfc02016-06-12 23:30:22 -0600211#endif
Andy Flemingad347bb2008-10-30 16:41:01 -0500212
Sean Anderson86325092020-10-17 08:36:27 -0400213/**
214 * mmc_send_cmd_retry() - send a command to the mmc device, retrying on error
215 *
216 * @dev: device to receive the command
217 * @cmd: command to send
218 * @data: additional data to send/receive
219 * @retries: how many times to retry; mmc_send_cmd is always called at least
220 * once
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100221 * Return: 0 if ok, -ve on error
Sean Anderson86325092020-10-17 08:36:27 -0400222 */
223static int mmc_send_cmd_retry(struct mmc *mmc, struct mmc_cmd *cmd,
224 struct mmc_data *data, uint retries)
225{
226 int ret;
227
228 do {
229 ret = mmc_send_cmd(mmc, cmd, data);
230 } while (ret && retries--);
231
232 return ret;
233}
234
235/**
236 * mmc_send_cmd_quirks() - send a command to the mmc device, retrying if a
237 * specific quirk is enabled
238 *
239 * @dev: device to receive the command
240 * @cmd: command to send
241 * @data: additional data to send/receive
242 * @quirk: retry only if this quirk is enabled
243 * @retries: how many times to retry; mmc_send_cmd is always called at least
244 * once
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100245 * Return: 0 if ok, -ve on error
Sean Anderson86325092020-10-17 08:36:27 -0400246 */
247static int mmc_send_cmd_quirks(struct mmc *mmc, struct mmc_cmd *cmd,
248 struct mmc_data *data, u32 quirk, uint retries)
249{
Simon Glass68f3ced2023-02-05 15:40:16 -0700250 if (IS_ENABLED(CONFIG_MMC_QUIRKS) && mmc->quirks & quirk)
Sean Anderson86325092020-10-17 08:36:27 -0400251 return mmc_send_cmd_retry(mmc, cmd, data, retries);
252 else
253 return mmc_send_cmd(mmc, cmd, data);
254}
255
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200256int mmc_send_status(struct mmc *mmc, unsigned int *status)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000257{
258 struct mmc_cmd cmd;
Sean Anderson86325092020-10-17 08:36:27 -0400259 int ret;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000260
261 cmd.cmdidx = MMC_CMD_SEND_STATUS;
262 cmd.resp_type = MMC_RSP_R1;
Marek Vasutc4427392011-08-10 09:24:48 +0200263 if (!mmc_host_is_spi(mmc))
264 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000265
Sean Anderson86325092020-10-17 08:36:27 -0400266 ret = mmc_send_cmd_retry(mmc, &cmd, NULL, 4);
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200267 mmc_trace_state(mmc, &cmd);
Sean Anderson86325092020-10-17 08:36:27 -0400268 if (!ret)
269 *status = cmd.response[0];
270
271 return ret;
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200272}
273
Sam Protsenkodb174c62019-08-14 22:52:51 +0300274int mmc_poll_for_busy(struct mmc *mmc, int timeout_ms)
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200275{
276 unsigned int status;
277 int err;
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +0200278
Sam Protsenkodb174c62019-08-14 22:52:51 +0300279 err = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
Jean-Jacques Hiblot4f04a322019-07-02 10:53:53 +0200280 if (err != -ENOSYS)
281 return err;
282
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200283 while (1) {
284 err = mmc_send_status(mmc, &status);
285 if (err)
286 return err;
287
288 if ((status & MMC_STATUS_RDY_FOR_DATA) &&
289 (status & MMC_STATUS_CURR_STATE) !=
290 MMC_STATE_PRG)
291 break;
292
293 if (status & MMC_STATUS_MASK) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100294#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200295 pr_err("Status Error: 0x%08x\n", status);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100296#endif
Jean-Jacques Hiblot443edbe2019-07-02 10:53:52 +0200297 return -ECOMM;
298 }
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000299
Sam Protsenkodb174c62019-08-14 22:52:51 +0300300 if (timeout_ms-- <= 0)
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500301 break;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000302
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500303 udelay(1000);
304 }
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000305
Sam Protsenkodb174c62019-08-14 22:52:51 +0300306 if (timeout_ms <= 0) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100307#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +0100308 pr_err("Timeout waiting card ready\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100309#endif
Jaehoon Chung7825d202016-07-19 16:33:36 +0900310 return -ETIMEDOUT;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000311 }
312
313 return 0;
314}
315
Paul Burton8d30cc92013-09-09 15:30:26 +0100316int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Flemingad347bb2008-10-30 16:41:01 -0500317{
318 struct mmc_cmd cmd;
319
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -0600320 if (mmc->ddr_mode)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900321 return 0;
322
Andy Flemingad347bb2008-10-30 16:41:01 -0500323 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
324 cmd.resp_type = MMC_RSP_R1;
325 cmd.cmdarg = len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500326
Sean Anderson86325092020-10-17 08:36:27 -0400327 return mmc_send_cmd_quirks(mmc, &cmd, NULL,
328 MMC_QUIRK_RETRY_SET_BLOCKLEN, 4);
Andy Flemingad347bb2008-10-30 16:41:01 -0500329}
330
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100331#ifdef MMC_SUPPORTS_TUNING
Jean-Jacques Hiblot71264bb2017-09-21 16:30:12 +0200332static const u8 tuning_blk_pattern_4bit[] = {
333 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
334 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
335 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
336 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
337 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
338 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
339 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
340 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
341};
342
343static const u8 tuning_blk_pattern_8bit[] = {
344 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
345 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
346 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
347 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
348 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
349 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
350 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
351 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
352 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
353 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
354 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
355 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
356 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
357 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
358 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
359 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
360};
361
362int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
363{
364 struct mmc_cmd cmd;
365 struct mmc_data data;
366 const u8 *tuning_block_pattern;
367 int size, err;
368
369 if (mmc->bus_width == 8) {
370 tuning_block_pattern = tuning_blk_pattern_8bit;
371 size = sizeof(tuning_blk_pattern_8bit);
372 } else if (mmc->bus_width == 4) {
373 tuning_block_pattern = tuning_blk_pattern_4bit;
374 size = sizeof(tuning_blk_pattern_4bit);
375 } else {
376 return -EINVAL;
377 }
378
379 ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
380
381 cmd.cmdidx = opcode;
382 cmd.cmdarg = 0;
383 cmd.resp_type = MMC_RSP_R1;
384
385 data.dest = (void *)data_buf;
386 data.blocks = 1;
387 data.blocksize = size;
388 data.flags = MMC_DATA_READ;
389
390 err = mmc_send_cmd(mmc, &cmd, &data);
391 if (err)
392 return err;
393
394 if (memcmp(data_buf, tuning_block_pattern, size))
395 return -EIO;
396
397 return 0;
398}
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100399#endif
Jean-Jacques Hiblot71264bb2017-09-21 16:30:12 +0200400
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200401static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillips87ea3892012-10-29 13:34:43 +0000402 lbaint_t blkcnt)
Andy Flemingad347bb2008-10-30 16:41:01 -0500403{
404 struct mmc_cmd cmd;
405 struct mmc_data data;
406
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700407 if (blkcnt > 1)
408 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
409 else
410 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Flemingad347bb2008-10-30 16:41:01 -0500411
412 if (mmc->high_capacity)
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700413 cmd.cmdarg = start;
Andy Flemingad347bb2008-10-30 16:41:01 -0500414 else
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700415 cmd.cmdarg = start * mmc->read_bl_len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500416
417 cmd.resp_type = MMC_RSP_R1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500418
419 data.dest = dst;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700420 data.blocks = blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500421 data.blocksize = mmc->read_bl_len;
422 data.flags = MMC_DATA_READ;
423
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700424 if (mmc_send_cmd(mmc, &cmd, &data))
425 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500426
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700427 if (blkcnt > 1) {
428 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
429 cmd.cmdarg = 0;
430 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700431 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100432#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +0100433 pr_err("mmc fail to send stop cmd\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100434#endif
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700435 return 0;
436 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500437 }
438
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700439 return blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500440}
441
Marek Vasut31976d92020-04-04 12:45:05 +0200442#if !CONFIG_IS_ENABLED(DM_MMC)
443static int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt)
444{
445 if (mmc->cfg->ops->get_b_max)
446 return mmc->cfg->ops->get_b_max(mmc, dst, blkcnt);
447 else
448 return mmc->cfg->b_max;
449}
450#endif
451
Simon Glass5f4bd8c2017-07-04 13:31:19 -0600452#if CONFIG_IS_ENABLED(BLK)
Simon Glass62e293a2016-06-12 23:30:15 -0600453ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
Simon Glass59bc6f22016-05-01 13:52:41 -0600454#else
Simon Glass62e293a2016-06-12 23:30:15 -0600455ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
456 void *dst)
Simon Glass59bc6f22016-05-01 13:52:41 -0600457#endif
Andy Flemingad347bb2008-10-30 16:41:01 -0500458{
Simon Glass5f4bd8c2017-07-04 13:31:19 -0600459#if CONFIG_IS_ENABLED(BLK)
Simon Glass71fa5b42020-12-03 16:55:18 -0700460 struct blk_desc *block_dev = dev_get_uclass_plat(dev);
Simon Glass59bc6f22016-05-01 13:52:41 -0600461#endif
Simon Glass2f26fff2016-02-29 15:25:51 -0700462 int dev_num = block_dev->devnum;
Stephen Warren1e0f92a2015-12-07 11:38:49 -0700463 int err;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700464 lbaint_t cur, blocks_todo = blkcnt;
Marek Vasut31976d92020-04-04 12:45:05 +0200465 uint b_max;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700466
467 if (blkcnt == 0)
468 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500469
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700470 struct mmc *mmc = find_mmc_device(dev_num);
Andy Flemingad347bb2008-10-30 16:41:01 -0500471 if (!mmc)
472 return 0;
473
Marek Vasutf537e392016-12-01 02:06:33 +0100474 if (CONFIG_IS_ENABLED(MMC_TINY))
475 err = mmc_switch_part(mmc, block_dev->hwpart);
476 else
477 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
478
Stephen Warren1e0f92a2015-12-07 11:38:49 -0700479 if (err < 0)
480 return 0;
481
Simon Glasse5db1152016-05-01 13:52:35 -0600482 if ((start + blkcnt) > block_dev->lba) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100483#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +0100484 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
485 start + blkcnt, block_dev->lba);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100486#endif
Lei Wene1cc9c82010-09-13 22:07:27 +0800487 return 0;
488 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500489
Simon Glassa4343c42015-06-23 15:38:50 -0600490 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +0900491 pr_debug("%s: Failed to set blocklen\n", __func__);
Andy Flemingad347bb2008-10-30 16:41:01 -0500492 return 0;
Simon Glassa4343c42015-06-23 15:38:50 -0600493 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500494
Marek Vasut31976d92020-04-04 12:45:05 +0200495 b_max = mmc_get_b_max(mmc, dst, blkcnt);
496
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700497 do {
Marek Vasut31976d92020-04-04 12:45:05 +0200498 cur = (blocks_todo > b_max) ? b_max : blocks_todo;
Simon Glassa4343c42015-06-23 15:38:50 -0600499 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +0900500 pr_debug("%s: Failed to read blocks\n", __func__);
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700501 return 0;
Simon Glassa4343c42015-06-23 15:38:50 -0600502 }
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700503 blocks_todo -= cur;
504 start += cur;
505 dst += cur * mmc->read_bl_len;
506 } while (blocks_todo > 0);
Andy Flemingad347bb2008-10-30 16:41:01 -0500507
508 return blkcnt;
509}
510
Kim Phillips87ea3892012-10-29 13:34:43 +0000511static int mmc_go_idle(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500512{
513 struct mmc_cmd cmd;
514 int err;
515
516 udelay(1000);
517
518 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
519 cmd.cmdarg = 0;
520 cmd.resp_type = MMC_RSP_NONE;
Andy Flemingad347bb2008-10-30 16:41:01 -0500521
522 err = mmc_send_cmd(mmc, &cmd, NULL);
523
524 if (err)
525 return err;
526
527 udelay(2000);
528
529 return 0;
530}
531
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100532#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200533static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
534{
535 struct mmc_cmd cmd;
536 int err = 0;
537
538 /*
539 * Send CMD11 only if the request is to switch the card to
540 * 1.8V signalling.
541 */
542 if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
543 return mmc_set_signal_voltage(mmc, signal_voltage);
544
545 cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
546 cmd.cmdarg = 0;
547 cmd.resp_type = MMC_RSP_R1;
548
549 err = mmc_send_cmd(mmc, &cmd, NULL);
550 if (err)
551 return err;
552
553 if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
554 return -EIO;
555
556 /*
557 * The card should drive cmd and dat[0:3] low immediately
558 * after the response of cmd11, but wait 100 us to be sure
559 */
560 err = mmc_wait_dat0(mmc, 0, 100);
561 if (err == -ENOSYS)
562 udelay(100);
563 else if (err)
564 return -ETIMEDOUT;
565
566 /*
567 * During a signal voltage level switch, the clock must be gated
568 * for 5 ms according to the SD spec
569 */
Jaehoon Chung239cb2f2018-01-26 19:25:29 +0900570 mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200571
572 err = mmc_set_signal_voltage(mmc, signal_voltage);
573 if (err)
574 return err;
575
576 /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
577 mdelay(10);
Jaehoon Chung239cb2f2018-01-26 19:25:29 +0900578 mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200579
580 /*
581 * Failure to switch is indicated by the card holding
582 * dat[0:3] low. Wait for at least 1 ms according to spec
583 */
584 err = mmc_wait_dat0(mmc, 1, 1000);
585 if (err == -ENOSYS)
586 udelay(1000);
587 else if (err)
588 return -ETIMEDOUT;
589
590 return 0;
591}
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100592#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200593
594static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
Andy Flemingad347bb2008-10-30 16:41:01 -0500595{
596 int timeout = 1000;
597 int err;
598 struct mmc_cmd cmd;
599
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500600 while (1) {
Andy Flemingad347bb2008-10-30 16:41:01 -0500601 cmd.cmdidx = MMC_CMD_APP_CMD;
602 cmd.resp_type = MMC_RSP_R1;
603 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500604
605 err = mmc_send_cmd(mmc, &cmd, NULL);
606
607 if (err)
608 return err;
609
610 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
611 cmd.resp_type = MMC_RSP_R3;
Stefano Babicf8e9a212010-01-20 18:20:39 +0100612
613 /*
614 * Most cards do not answer if some reserved bits
615 * in the ocr are set. However, Some controller
616 * can set bit 7 (reserved for low voltages), but
617 * how to manage low voltages SD card is not yet
618 * specified.
619 */
Thomas Chou1254c3d2010-12-24 13:12:21 +0000620 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200621 (mmc->cfg->voltages & 0xff8000);
Andy Flemingad347bb2008-10-30 16:41:01 -0500622
623 if (mmc->version == SD_VERSION_2)
624 cmd.cmdarg |= OCR_HCS;
625
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200626 if (uhs_en)
627 cmd.cmdarg |= OCR_S18R;
628
Andy Flemingad347bb2008-10-30 16:41:01 -0500629 err = mmc_send_cmd(mmc, &cmd, NULL);
630
631 if (err)
632 return err;
633
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500634 if (cmd.response[0] & OCR_BUSY)
635 break;
Andy Flemingad347bb2008-10-30 16:41:01 -0500636
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500637 if (timeout-- <= 0)
Jaehoon Chung7825d202016-07-19 16:33:36 +0900638 return -EOPNOTSUPP;
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500639
640 udelay(1000);
641 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500642
643 if (mmc->version != SD_VERSION_2)
644 mmc->version = SD_VERSION_1_0;
645
Thomas Chou1254c3d2010-12-24 13:12:21 +0000646 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
647 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
648 cmd.resp_type = MMC_RSP_R3;
649 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000650
651 err = mmc_send_cmd(mmc, &cmd, NULL);
652
653 if (err)
654 return err;
655 }
656
Rabin Vincentb6eed942009-04-05 13:30:56 +0530657 mmc->ocr = cmd.response[0];
Andy Flemingad347bb2008-10-30 16:41:01 -0500658
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100659#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200660 if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
661 == 0x41000000) {
662 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
663 if (err)
664 return err;
665 }
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +0100666#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +0200667
Andy Flemingad347bb2008-10-30 16:41:01 -0500668 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
669 mmc->rca = 0;
670
671 return 0;
672}
673
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500674static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Flemingad347bb2008-10-30 16:41:01 -0500675{
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500676 struct mmc_cmd cmd;
Andy Flemingad347bb2008-10-30 16:41:01 -0500677 int err;
678
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500679 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
680 cmd.resp_type = MMC_RSP_R3;
681 cmd.cmdarg = 0;
Rob Herring5fd3edd2015-03-23 17:56:59 -0500682 if (use_arg && !mmc_host_is_spi(mmc))
683 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200684 (mmc->cfg->voltages &
Andrew Gabbasovec600d12015-03-19 07:44:03 -0500685 (mmc->ocr & OCR_VOLTAGE_MASK)) |
686 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000687
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500688 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000689 if (err)
690 return err;
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500691 mmc->ocr = cmd.response[0];
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000692 return 0;
693}
694
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200695static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000696{
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000697 int err, i;
Haibo Chen71949512020-06-15 17:18:12 +0800698 int timeout = 1000;
699 uint start;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000700
Andy Flemingad347bb2008-10-30 16:41:01 -0500701 /* Some cards seem to need this */
702 mmc_go_idle(mmc);
703
Haibo Chen71949512020-06-15 17:18:12 +0800704 start = get_timer(0);
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200705 /* Asking to the card its capabilities */
Haibo Chen71949512020-06-15 17:18:12 +0800706 for (i = 0; ; i++) {
Andrew Gabbasovfafa6a02015-03-19 07:44:04 -0500707 err = mmc_send_op_cond_iter(mmc, i != 0);
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000708 if (err)
709 return err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200710
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000711 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasovec600d12015-03-19 07:44:03 -0500712 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -0500713 break;
Haibo Chen71949512020-06-15 17:18:12 +0800714
715 if (get_timer(start) > timeout)
716 return -ETIMEDOUT;
717 udelay(100);
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000718 }
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -0500719 mmc->op_cond_pending = 1;
720 return 0;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000721}
Wolfgang Denk80f70212011-05-19 22:21:41 +0200722
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200723static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000724{
725 struct mmc_cmd cmd;
726 int timeout = 1000;
Vipul Kumardbad7b42018-05-03 12:20:54 +0530727 ulong start;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000728 int err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200729
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000730 mmc->op_cond_pending = 0;
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500731 if (!(mmc->ocr & OCR_BUSY)) {
Yangbo Lu9c720612016-08-02 15:33:18 +0800732 /* Some cards seem to need this */
733 mmc_go_idle(mmc);
734
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500735 start = get_timer(0);
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500736 while (1) {
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500737 err = mmc_send_op_cond_iter(mmc, 1);
738 if (err)
739 return err;
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500740 if (mmc->ocr & OCR_BUSY)
741 break;
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500742 if (get_timer(start) > timeout)
Jaehoon Chung7825d202016-07-19 16:33:36 +0900743 return -EOPNOTSUPP;
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500744 udelay(100);
Andrew Gabbasov034857c2015-03-19 07:44:06 -0500745 }
Andrew Gabbasov5a513ca2015-03-19 07:44:05 -0500746 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500747
Thomas Chou1254c3d2010-12-24 13:12:21 +0000748 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
749 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
750 cmd.resp_type = MMC_RSP_R3;
751 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000752
753 err = mmc_send_cmd(mmc, &cmd, NULL);
754
755 if (err)
756 return err;
Andrew Gabbasovec600d12015-03-19 07:44:03 -0500757
758 mmc->ocr = cmd.response[0];
Thomas Chou1254c3d2010-12-24 13:12:21 +0000759 }
760
Andy Flemingad347bb2008-10-30 16:41:01 -0500761 mmc->version = MMC_VERSION_UNKNOWN;
Andy Flemingad347bb2008-10-30 16:41:01 -0500762
763 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrenf6545f12014-01-30 16:11:12 -0700764 mmc->rca = 1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500765
766 return 0;
767}
768
769
Heinrich Schuchardtbf230e12020-03-30 07:24:17 +0200770int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Flemingad347bb2008-10-30 16:41:01 -0500771{
772 struct mmc_cmd cmd;
773 struct mmc_data data;
774 int err;
775
776 /* Get the Card Status Register */
777 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
778 cmd.resp_type = MMC_RSP_R1;
779 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500780
Yoshihiro Shimodaf6bec732012-06-07 19:09:11 +0000781 data.dest = (char *)ext_csd;
Andy Flemingad347bb2008-10-30 16:41:01 -0500782 data.blocks = 1;
Simon Glassa09c2b72013-04-03 08:54:30 +0000783 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -0500784 data.flags = MMC_DATA_READ;
785
786 err = mmc_send_cmd(mmc, &cmd, &data);
787
788 return err;
789}
790
Marek Vasut8a966472019-02-06 11:34:27 +0100791static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
792 bool send_status)
Andy Flemingad347bb2008-10-30 16:41:01 -0500793{
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200794 unsigned int status, start;
Andy Flemingad347bb2008-10-30 16:41:01 -0500795 struct mmc_cmd cmd;
Sam Protsenkodb174c62019-08-14 22:52:51 +0300796 int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS;
Jean-Jacques Hiblot7f5b1692019-07-02 10:53:55 +0200797 bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) &&
798 (index == EXT_CSD_PART_CONF);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000799 int ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500800
Jean-Jacques Hiblot201559c2019-07-02 10:53:54 +0200801 if (mmc->gen_cmd6_time)
Sam Protsenkodb174c62019-08-14 22:52:51 +0300802 timeout_ms = mmc->gen_cmd6_time * 10;
Jean-Jacques Hiblot201559c2019-07-02 10:53:54 +0200803
Jean-Jacques Hiblot7f5b1692019-07-02 10:53:55 +0200804 if (is_part_switch && mmc->part_switch_time)
Sam Protsenkodb174c62019-08-14 22:52:51 +0300805 timeout_ms = mmc->part_switch_time * 10;
Jean-Jacques Hiblot7f5b1692019-07-02 10:53:55 +0200806
Andy Flemingad347bb2008-10-30 16:41:01 -0500807 cmd.cmdidx = MMC_CMD_SWITCH;
808 cmd.resp_type = MMC_RSP_R1b;
809 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000810 (index << 16) |
811 (value << 8);
Andy Flemingad347bb2008-10-30 16:41:01 -0500812
Sean Anderson86325092020-10-17 08:36:27 -0400813 ret = mmc_send_cmd_retry(mmc, &cmd, NULL, 3);
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200814 if (ret)
815 return ret;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000816
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200817 start = get_timer(0);
Marek Vasut8a966472019-02-06 11:34:27 +0100818
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200819 /* poll dat0 for rdy/buys status */
Sam Protsenkodb174c62019-08-14 22:52:51 +0300820 ret = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200821 if (ret && ret != -ENOSYS)
822 return ret;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000823
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200824 /*
Kirill Kapranovcd9ea642021-10-09 23:49:59 +0300825 * In cases when neiter allowed to poll by using CMD13 nor we are
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200826 * capable of polling by using mmc_wait_dat0, then rely on waiting the
827 * stated timeout to be sufficient.
828 */
Kirill Kapranovcd9ea642021-10-09 23:49:59 +0300829 if (ret == -ENOSYS && !send_status) {
Sam Protsenkodb174c62019-08-14 22:52:51 +0300830 mdelay(timeout_ms);
Haibo Chend8de5e42020-09-22 18:11:42 +0800831 return 0;
832 }
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200833
Marek Vasut946e06f2022-07-15 01:58:24 +0200834 if (!send_status)
835 return 0;
836
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200837 /* Finally wait until the card is ready or indicates a failure
838 * to switch. It doesn't hurt to use CMD13 here even if send_status
Sam Protsenkodb174c62019-08-14 22:52:51 +0300839 * is false, because by now (after 'timeout_ms' ms) the bus should be
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200840 * reliable.
841 */
842 do {
843 ret = mmc_send_status(mmc, &status);
844
845 if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) {
846 pr_debug("switch failed %d/%d/0x%x !\n", set, index,
847 value);
848 return -EIO;
849 }
Stefan Boscha463bbe2021-01-23 13:37:41 +0100850 if (!ret && (status & MMC_STATUS_RDY_FOR_DATA) &&
851 (status & MMC_STATUS_CURR_STATE) == MMC_STATE_TRANS)
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200852 return 0;
853 udelay(100);
Sam Protsenkodb174c62019-08-14 22:52:51 +0300854 } while (get_timer(start) < timeout_ms);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000855
Jean-Jacques Hiblot5a7cf402019-07-02 10:53:56 +0200856 return -ETIMEDOUT;
Andy Flemingad347bb2008-10-30 16:41:01 -0500857}
858
Marek Vasut8a966472019-02-06 11:34:27 +0100859int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
860{
861 return __mmc_switch(mmc, set, index, value, true);
862}
863
Heinrich Schuchardt75e5a642020-03-30 07:24:19 +0200864int mmc_boot_wp(struct mmc *mmc)
865{
866 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 1);
867}
868
Ying-Chun Liu (PaulLiu)4493cb52022-04-25 21:59:02 +0800869int mmc_boot_wp_single_partition(struct mmc *mmc, int partition)
870{
871 u8 value;
872 int ret;
873
874 value = EXT_CSD_BOOT_WP_B_PWR_WP_EN;
875
876 if (partition == 0) {
877 value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL;
878 ret = mmc_switch(mmc,
879 EXT_CSD_CMD_SET_NORMAL,
880 EXT_CSD_BOOT_WP,
881 value);
882 } else if (partition == 1) {
883 value |= EXT_CSD_BOOT_WP_B_SEC_WP_SEL;
884 value |= EXT_CSD_BOOT_WP_B_PWR_WP_SEC_SEL;
885 ret = mmc_switch(mmc,
886 EXT_CSD_CMD_SET_NORMAL,
887 EXT_CSD_BOOT_WP,
888 value);
889 } else {
890 ret = mmc_boot_wp(mmc);
891 }
892
893 return ret;
894}
895
Marek Vasuta318a7a2018-04-15 00:37:11 +0200896#if !CONFIG_IS_ENABLED(MMC_TINY)
Marek Vasut111572f2019-01-03 21:19:24 +0100897static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode,
898 bool hsdowngrade)
Andy Flemingad347bb2008-10-30 16:41:01 -0500899{
Andy Flemingad347bb2008-10-30 16:41:01 -0500900 int err;
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200901 int speed_bits;
902
903 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
904
905 switch (mode) {
906 case MMC_HS:
907 case MMC_HS_52:
908 case MMC_DDR_52:
909 speed_bits = EXT_CSD_TIMING_HS;
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +0200910 break;
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +0100911#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +0200912 case MMC_HS_200:
913 speed_bits = EXT_CSD_TIMING_HS200;
914 break;
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +0100915#endif
Peng Fan46801252018-08-10 14:07:54 +0800916#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
917 case MMC_HS_400:
918 speed_bits = EXT_CSD_TIMING_HS400;
919 break;
920#endif
Peng Faneede83b2019-07-10 14:43:07 +0800921#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
922 case MMC_HS_400_ES:
923 speed_bits = EXT_CSD_TIMING_HS400;
924 break;
925#endif
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200926 case MMC_LEGACY:
927 speed_bits = EXT_CSD_TIMING_LEGACY;
928 break;
929 default:
930 return -EINVAL;
931 }
Marek Vasut8a966472019-02-06 11:34:27 +0100932
933 err = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
934 speed_bits, !hsdowngrade);
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200935 if (err)
936 return err;
937
Marek Vasut111572f2019-01-03 21:19:24 +0100938#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
939 CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
940 /*
941 * In case the eMMC is in HS200/HS400 mode and we are downgrading
942 * to HS mode, the card clock are still running much faster than
943 * the supported HS mode clock, so we can not reliably read out
944 * Extended CSD. Reconfigure the controller to run at HS mode.
945 */
946 if (hsdowngrade) {
947 mmc_select_mode(mmc, MMC_HS);
948 mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
949 }
950#endif
951
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200952 if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
953 /* Now check to see that it worked */
954 err = mmc_send_ext_csd(mmc, test_csd);
955 if (err)
956 return err;
957
958 /* No high-speed support */
959 if (!test_csd[EXT_CSD_HS_TIMING])
960 return -ENOTSUPP;
961 }
962
963 return 0;
964}
965
966static int mmc_get_capabilities(struct mmc *mmc)
967{
968 u8 *ext_csd = mmc->ext_csd;
969 char cardtype;
Andy Flemingad347bb2008-10-30 16:41:01 -0500970
Jean-Jacques Hiblot3f2ffc22017-11-30 17:43:56 +0100971 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
Andy Flemingad347bb2008-10-30 16:41:01 -0500972
Thomas Chou1254c3d2010-12-24 13:12:21 +0000973 if (mmc_host_is_spi(mmc))
974 return 0;
975
Andy Flemingad347bb2008-10-30 16:41:01 -0500976 /* Only version 4 supports high-speed */
977 if (mmc->version < MMC_VERSION_4)
978 return 0;
979
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200980 if (!ext_csd) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +0100981 pr_err("No ext_csd found!\n"); /* this should enver happen */
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200982 return -ENOTSUPP;
983 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500984
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +0200985 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
Andy Flemingad347bb2008-10-30 16:41:01 -0500986
Peng Fan46801252018-08-10 14:07:54 +0800987 cardtype = ext_csd[EXT_CSD_CARD_TYPE];
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +0200988 mmc->cardtype = cardtype;
Andy Flemingad347bb2008-10-30 16:41:01 -0500989
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +0100990#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +0200991 if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
992 EXT_CSD_CARD_TYPE_HS200_1_8V)) {
993 mmc->card_caps |= MMC_MODE_HS200;
994 }
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +0100995#endif
Peng Faneede83b2019-07-10 14:43:07 +0800996#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \
997 CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
Peng Fan46801252018-08-10 14:07:54 +0800998 if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V |
999 EXT_CSD_CARD_TYPE_HS400_1_8V)) {
1000 mmc->card_caps |= MMC_MODE_HS400;
1001 }
1002#endif
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001003 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001004 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001005 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001006 mmc->card_caps |= MMC_MODE_HS_52MHz;
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001007 }
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001008 if (cardtype & EXT_CSD_CARD_TYPE_26)
1009 mmc->card_caps |= MMC_MODE_HS;
Andy Flemingad347bb2008-10-30 16:41:01 -05001010
Peng Faneede83b2019-07-10 14:43:07 +08001011#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
1012 if (ext_csd[EXT_CSD_STROBE_SUPPORT] &&
1013 (mmc->card_caps & MMC_MODE_HS400)) {
1014 mmc->card_caps |= MMC_MODE_HS400_ES;
1015 }
1016#endif
1017
Andy Flemingad347bb2008-10-30 16:41:01 -05001018 return 0;
1019}
Marek Vasuta318a7a2018-04-15 00:37:11 +02001020#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001021
Stephen Warrene315ae82013-06-11 15:14:01 -06001022static int mmc_set_capacity(struct mmc *mmc, int part_num)
1023{
1024 switch (part_num) {
1025 case 0:
1026 mmc->capacity = mmc->capacity_user;
1027 break;
1028 case 1:
1029 case 2:
1030 mmc->capacity = mmc->capacity_boot;
1031 break;
1032 case 3:
1033 mmc->capacity = mmc->capacity_rpmb;
1034 break;
1035 case 4:
1036 case 5:
1037 case 6:
1038 case 7:
1039 mmc->capacity = mmc->capacity_gp[part_num - 4];
1040 break;
1041 default:
1042 return -1;
1043 }
1044
Simon Glasse5db1152016-05-01 13:52:35 -06001045 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Stephen Warrene315ae82013-06-11 15:14:01 -06001046
1047 return 0;
1048}
1049
Simon Glass62e293a2016-06-12 23:30:15 -06001050int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
Lei Wen31b99802011-05-02 16:26:26 +00001051{
Stephen Warrene315ae82013-06-11 15:14:01 -06001052 int ret;
Jean-Jacques Hiblotfaf5c952019-07-02 10:53:58 +02001053 int retry = 3;
Lei Wen31b99802011-05-02 16:26:26 +00001054
Jean-Jacques Hiblotfaf5c952019-07-02 10:53:58 +02001055 do {
1056 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1057 EXT_CSD_PART_CONF,
1058 (mmc->part_config & ~PART_ACCESS_MASK)
1059 | (part_num & PART_ACCESS_MASK));
1060 } while (ret && retry--);
Peter Bigot45fde892014-09-02 18:31:23 -05001061
1062 /*
1063 * Set the capacity if the switch succeeded or was intended
1064 * to return to representing the raw device.
1065 */
Stephen Warren1e0f92a2015-12-07 11:38:49 -07001066 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot45fde892014-09-02 18:31:23 -05001067 ret = mmc_set_capacity(mmc, part_num);
Simon Glass984db5d2016-05-01 13:52:37 -06001068 mmc_get_blk_desc(mmc)->hwpart = part_num;
Stephen Warren1e0f92a2015-12-07 11:38:49 -07001069 }
Stephen Warrene315ae82013-06-11 15:14:01 -06001070
Peter Bigot45fde892014-09-02 18:31:23 -05001071 return ret;
Lei Wen31b99802011-05-02 16:26:26 +00001072}
1073
Jean-Jacques Hiblot1d7769a2017-11-30 17:44:02 +01001074#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001075int mmc_hwpart_config(struct mmc *mmc,
1076 const struct mmc_hwpart_conf *conf,
1077 enum mmc_hwpart_conf_mode mode)
1078{
1079 u8 part_attrs = 0;
1080 u32 enh_size_mult;
1081 u32 enh_start_addr;
1082 u32 gp_size_mult[4];
1083 u32 max_enh_size_mult;
1084 u32 tot_enh_size_mult = 0;
Diego Santa Cruz80200272014-12-23 10:50:31 +01001085 u8 wr_rel_set;
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001086 int i, pidx, err;
1087 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1088
1089 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
1090 return -EINVAL;
1091
1092 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001093 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001094 return -EMEDIUMTYPE;
1095 }
1096
1097 if (!(mmc->part_support & PART_SUPPORT)) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001098 pr_err("Card does not support partitioning\n");
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001099 return -EMEDIUMTYPE;
1100 }
1101
1102 if (!mmc->hc_wp_grp_size) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001103 pr_err("Card does not define HC WP group size\n");
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001104 return -EMEDIUMTYPE;
1105 }
1106
1107 /* check partition alignment and total enhanced size */
1108 if (conf->user.enh_size) {
1109 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
1110 conf->user.enh_start % mmc->hc_wp_grp_size) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001111 pr_err("User data enhanced area not HC WP group "
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001112 "size aligned\n");
1113 return -EINVAL;
1114 }
1115 part_attrs |= EXT_CSD_ENH_USR;
1116 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
1117 if (mmc->high_capacity) {
1118 enh_start_addr = conf->user.enh_start;
1119 } else {
1120 enh_start_addr = (conf->user.enh_start << 9);
1121 }
1122 } else {
1123 enh_size_mult = 0;
1124 enh_start_addr = 0;
1125 }
1126 tot_enh_size_mult += enh_size_mult;
1127
1128 for (pidx = 0; pidx < 4; pidx++) {
1129 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001130 pr_err("GP%i partition not HC WP group size "
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001131 "aligned\n", pidx+1);
1132 return -EINVAL;
1133 }
1134 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1135 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1136 part_attrs |= EXT_CSD_ENH_GP(pidx);
1137 tot_enh_size_mult += gp_size_mult[pidx];
1138 }
1139 }
1140
1141 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001142 pr_err("Card does not support enhanced attribute\n");
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001143 return -EMEDIUMTYPE;
1144 }
1145
1146 err = mmc_send_ext_csd(mmc, ext_csd);
1147 if (err)
1148 return err;
1149
1150 max_enh_size_mult =
1151 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1152 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1153 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1154 if (tot_enh_size_mult > max_enh_size_mult) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001155 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001156 tot_enh_size_mult, max_enh_size_mult);
1157 return -EMEDIUMTYPE;
1158 }
1159
Diego Santa Cruz80200272014-12-23 10:50:31 +01001160 /* The default value of EXT_CSD_WR_REL_SET is device
1161 * dependent, the values can only be changed if the
1162 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1163 * changed only once and before partitioning is completed. */
1164 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1165 if (conf->user.wr_rel_change) {
1166 if (conf->user.wr_rel_set)
1167 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1168 else
1169 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1170 }
1171 for (pidx = 0; pidx < 4; pidx++) {
1172 if (conf->gp_part[pidx].wr_rel_change) {
1173 if (conf->gp_part[pidx].wr_rel_set)
1174 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1175 else
1176 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1177 }
1178 }
1179
1180 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1181 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1182 puts("Card does not support host controlled partition write "
1183 "reliability settings\n");
1184 return -EMEDIUMTYPE;
1185 }
1186
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001187 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1188 EXT_CSD_PARTITION_SETTING_COMPLETED) {
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001189 pr_err("Card already partitioned\n");
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001190 return -EPERM;
1191 }
1192
1193 if (mode == MMC_HWPART_CONF_CHECK)
1194 return 0;
1195
1196 /* Partitioning requires high-capacity size definitions */
1197 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1198 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1199 EXT_CSD_ERASE_GROUP_DEF, 1);
1200
1201 if (err)
1202 return err;
1203
1204 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1205
Jaehoon Chung58b9eb82020-01-17 15:06:54 +09001206#if CONFIG_IS_ENABLED(MMC_WRITE)
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001207 /* update erase group size to be high-capacity */
1208 mmc->erase_grp_size =
1209 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Jaehoon Chung58b9eb82020-01-17 15:06:54 +09001210#endif
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001211
1212 }
1213
1214 /* all OK, write the configuration */
1215 for (i = 0; i < 4; i++) {
1216 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1217 EXT_CSD_ENH_START_ADDR+i,
1218 (enh_start_addr >> (i*8)) & 0xFF);
1219 if (err)
1220 return err;
1221 }
1222 for (i = 0; i < 3; i++) {
1223 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1224 EXT_CSD_ENH_SIZE_MULT+i,
1225 (enh_size_mult >> (i*8)) & 0xFF);
1226 if (err)
1227 return err;
1228 }
1229 for (pidx = 0; pidx < 4; pidx++) {
1230 for (i = 0; i < 3; i++) {
1231 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1232 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1233 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1234 if (err)
1235 return err;
1236 }
1237 }
1238 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1239 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1240 if (err)
1241 return err;
1242
1243 if (mode == MMC_HWPART_CONF_SET)
1244 return 0;
1245
Diego Santa Cruz80200272014-12-23 10:50:31 +01001246 /* The WR_REL_SET is a write-once register but shall be
1247 * written before setting PART_SETTING_COMPLETED. As it is
1248 * write-once we can only write it when completing the
1249 * partitioning. */
1250 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1251 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1252 EXT_CSD_WR_REL_SET, wr_rel_set);
1253 if (err)
1254 return err;
1255 }
1256
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001257 /* Setting PART_SETTING_COMPLETED confirms the partition
1258 * configuration but it only becomes effective after power
1259 * cycle, so we do not adjust the partition related settings
1260 * in the mmc struct. */
1261
1262 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1263 EXT_CSD_PARTITION_SETTING,
1264 EXT_CSD_PARTITION_SETTING_COMPLETED);
1265 if (err)
1266 return err;
1267
1268 return 0;
1269}
Jean-Jacques Hiblot1d7769a2017-11-30 17:44:02 +01001270#endif
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +01001271
Simon Glasseba48f92017-07-29 11:35:31 -06001272#if !CONFIG_IS_ENABLED(DM_MMC)
Thierry Redingb9c8b772012-01-02 01:15:37 +00001273int mmc_getcd(struct mmc *mmc)
1274{
1275 int cd;
1276
1277 cd = board_mmc_getcd(mmc);
1278
Peter Korsgaardf7b15102013-03-21 04:00:03 +00001279 if (cd < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001280 if (mmc->cfg->ops->getcd)
1281 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +00001282 else
1283 cd = 1;
1284 }
Thierry Redingb9c8b772012-01-02 01:15:37 +00001285
1286 return cd;
1287}
Simon Glass394dfc02016-06-12 23:30:22 -06001288#endif
Thierry Redingb9c8b772012-01-02 01:15:37 +00001289
Marek Vasuta318a7a2018-04-15 00:37:11 +02001290#if !CONFIG_IS_ENABLED(MMC_TINY)
Kim Phillips87ea3892012-10-29 13:34:43 +00001291static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Flemingad347bb2008-10-30 16:41:01 -05001292{
1293 struct mmc_cmd cmd;
1294 struct mmc_data data;
1295
1296 /* Switch the frequency */
1297 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1298 cmd.resp_type = MMC_RSP_R1;
1299 cmd.cmdarg = (mode << 31) | 0xffffff;
1300 cmd.cmdarg &= ~(0xf << (group * 4));
1301 cmd.cmdarg |= value << (group * 4);
Andy Flemingad347bb2008-10-30 16:41:01 -05001302
1303 data.dest = (char *)resp;
1304 data.blocksize = 64;
1305 data.blocks = 1;
1306 data.flags = MMC_DATA_READ;
1307
1308 return mmc_send_cmd(mmc, &cmd, &data);
1309}
1310
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001311static int sd_get_capabilities(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001312{
1313 int err;
1314 struct mmc_cmd cmd;
Suniel Mahesh2f423da2017-10-05 11:32:00 +05301315 ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1316 ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
Andy Flemingad347bb2008-10-30 16:41:01 -05001317 struct mmc_data data;
1318 int timeout;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001319#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001320 u32 sd3_bus_mode;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001321#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001322
Faiz Abbas01db77e2020-02-26 13:44:32 +05301323 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
Andy Flemingad347bb2008-10-30 16:41:01 -05001324
Thomas Chou1254c3d2010-12-24 13:12:21 +00001325 if (mmc_host_is_spi(mmc))
1326 return 0;
1327
Andy Flemingad347bb2008-10-30 16:41:01 -05001328 /* Read the SCR to find out if this card supports higher speeds */
1329 cmd.cmdidx = MMC_CMD_APP_CMD;
1330 cmd.resp_type = MMC_RSP_R1;
1331 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05001332
1333 err = mmc_send_cmd(mmc, &cmd, NULL);
1334
1335 if (err)
1336 return err;
1337
1338 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1339 cmd.resp_type = MMC_RSP_R1;
1340 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05001341
Anton staaf9b00f0d2011-10-03 13:54:59 +00001342 data.dest = (char *)scr;
Andy Flemingad347bb2008-10-30 16:41:01 -05001343 data.blocksize = 8;
1344 data.blocks = 1;
1345 data.flags = MMC_DATA_READ;
1346
Sean Anderson86325092020-10-17 08:36:27 -04001347 err = mmc_send_cmd_retry(mmc, &cmd, &data, 3);
Andy Flemingad347bb2008-10-30 16:41:01 -05001348
Sean Anderson86325092020-10-17 08:36:27 -04001349 if (err)
Andy Flemingad347bb2008-10-30 16:41:01 -05001350 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001351
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +03001352 mmc->scr[0] = __be32_to_cpu(scr[0]);
1353 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Flemingad347bb2008-10-30 16:41:01 -05001354
1355 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng4a4ef872016-03-17 21:53:13 -07001356 case 0:
1357 mmc->version = SD_VERSION_1_0;
1358 break;
1359 case 1:
1360 mmc->version = SD_VERSION_1_10;
1361 break;
1362 case 2:
1363 mmc->version = SD_VERSION_2;
1364 if ((mmc->scr[0] >> 15) & 0x1)
1365 mmc->version = SD_VERSION_3;
1366 break;
1367 default:
1368 mmc->version = SD_VERSION_1_0;
1369 break;
Andy Flemingad347bb2008-10-30 16:41:01 -05001370 }
1371
Alagu Sankar24bb5ab2010-05-12 15:08:24 +05301372 if (mmc->scr[0] & SD_DATA_4BIT)
1373 mmc->card_caps |= MMC_MODE_4BIT;
1374
Andy Flemingad347bb2008-10-30 16:41:01 -05001375 /* Version 1.0 doesn't support switching */
1376 if (mmc->version == SD_VERSION_1_0)
1377 return 0;
1378
1379 timeout = 4;
1380 while (timeout--) {
1381 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaf9b00f0d2011-10-03 13:54:59 +00001382 (u8 *)switch_status);
Andy Flemingad347bb2008-10-30 16:41:01 -05001383
1384 if (err)
1385 return err;
1386
1387 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +03001388 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Flemingad347bb2008-10-30 16:41:01 -05001389 break;
1390 }
1391
Andy Flemingad347bb2008-10-30 16:41:01 -05001392 /* If high-speed isn't supported, we return */
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001393 if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1394 mmc->card_caps |= MMC_CAP(SD_HS);
Andy Flemingad347bb2008-10-30 16:41:01 -05001395
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001396#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001397 /* Version before 3.0 don't support UHS modes */
1398 if (mmc->version < SD_VERSION_3)
1399 return 0;
1400
1401 sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1402 if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1403 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1404 if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1405 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1406 if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1407 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1408 if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1409 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1410 if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1411 mmc->card_caps |= MMC_CAP(UHS_DDR50);
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001412#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001413
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001414 return 0;
1415}
1416
1417static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1418{
1419 int err;
1420
1421 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001422 int speed;
Macpaul Lin24e92ec2011-11-28 16:31:09 +00001423
Marek Vasut4105e972018-11-18 03:25:08 +01001424 /* SD version 1.00 and 1.01 does not support CMD 6 */
1425 if (mmc->version == SD_VERSION_1_0)
1426 return 0;
1427
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001428 switch (mode) {
Faiz Abbas01db77e2020-02-26 13:44:32 +05301429 case MMC_LEGACY:
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001430 speed = UHS_SDR12_BUS_SPEED;
1431 break;
1432 case SD_HS:
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +01001433 speed = HIGH_SPEED_BUS_SPEED;
1434 break;
1435#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1436 case UHS_SDR12:
1437 speed = UHS_SDR12_BUS_SPEED;
1438 break;
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001439 case UHS_SDR25:
1440 speed = UHS_SDR25_BUS_SPEED;
1441 break;
1442 case UHS_SDR50:
1443 speed = UHS_SDR50_BUS_SPEED;
1444 break;
1445 case UHS_DDR50:
1446 speed = UHS_DDR50_BUS_SPEED;
1447 break;
1448 case UHS_SDR104:
1449 speed = UHS_SDR104_BUS_SPEED;
1450 break;
Jean-Jacques Hiblot74c98b22018-01-04 15:23:30 +01001451#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001452 default:
1453 return -EINVAL;
1454 }
1455
1456 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001457 if (err)
1458 return err;
1459
Jean-Jacques Hiblote7f664e2018-02-09 12:09:27 +01001460 if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001461 return -ENOTSUPP;
1462
1463 return 0;
1464}
Andy Flemingad347bb2008-10-30 16:41:01 -05001465
Marek Vasut8ff55fb2018-04-15 00:36:45 +02001466static int sd_select_bus_width(struct mmc *mmc, int w)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001467{
1468 int err;
1469 struct mmc_cmd cmd;
1470
1471 if ((w != 4) && (w != 1))
1472 return -EINVAL;
1473
1474 cmd.cmdidx = MMC_CMD_APP_CMD;
1475 cmd.resp_type = MMC_RSP_R1;
1476 cmd.cmdarg = mmc->rca << 16;
1477
1478 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05001479 if (err)
1480 return err;
1481
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001482 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1483 cmd.resp_type = MMC_RSP_R1;
1484 if (w == 4)
1485 cmd.cmdarg = 2;
1486 else if (w == 1)
1487 cmd.cmdarg = 0;
1488 err = mmc_send_cmd(mmc, &cmd, NULL);
1489 if (err)
1490 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001491
1492 return 0;
1493}
Marek Vasuta318a7a2018-04-15 00:37:11 +02001494#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001495
Jean-Jacques Hiblotcb534f02018-01-04 15:23:33 +01001496#if CONFIG_IS_ENABLED(MMC_WRITE)
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001497static int sd_read_ssr(struct mmc *mmc)
1498{
Jean-Jacques Hiblotcb534f02018-01-04 15:23:33 +01001499 static const unsigned int sd_au_size[] = {
1500 0, SZ_16K / 512, SZ_32K / 512,
1501 SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
1502 SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
1503 SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
1504 SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1505 SZ_64M / 512,
1506 };
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001507 int err, i;
1508 struct mmc_cmd cmd;
1509 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1510 struct mmc_data data;
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001511 unsigned int au, eo, et, es;
1512
1513 cmd.cmdidx = MMC_CMD_APP_CMD;
1514 cmd.resp_type = MMC_RSP_R1;
1515 cmd.cmdarg = mmc->rca << 16;
1516
Sean Anderson86325092020-10-17 08:36:27 -04001517 err = mmc_send_cmd_quirks(mmc, &cmd, NULL, MMC_QUIRK_RETRY_APP_CMD, 4);
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001518 if (err)
1519 return err;
1520
1521 cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1522 cmd.resp_type = MMC_RSP_R1;
1523 cmd.cmdarg = 0;
1524
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001525 data.dest = (char *)ssr;
1526 data.blocksize = 64;
1527 data.blocks = 1;
1528 data.flags = MMC_DATA_READ;
1529
Sean Anderson86325092020-10-17 08:36:27 -04001530 err = mmc_send_cmd_retry(mmc, &cmd, &data, 3);
1531 if (err)
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001532 return err;
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001533
1534 for (i = 0; i < 16; i++)
1535 ssr[i] = be32_to_cpu(ssr[i]);
1536
1537 au = (ssr[2] >> 12) & 0xF;
1538 if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1539 mmc->ssr.au = sd_au_size[au];
1540 es = (ssr[3] >> 24) & 0xFF;
1541 es |= (ssr[2] & 0xFF) << 8;
1542 et = (ssr[3] >> 18) & 0x3F;
1543 if (es && et) {
1544 eo = (ssr[3] >> 16) & 0x3;
1545 mmc->ssr.erase_timeout = (et * 1000) / es;
1546 mmc->ssr.erase_offset = eo * 1000;
1547 }
1548 } else {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001549 pr_debug("Invalid Allocation Unit Size.\n");
Peng Fanb3fcf1e2016-09-01 11:13:38 +08001550 }
1551
1552 return 0;
1553}
Jean-Jacques Hiblotcb534f02018-01-04 15:23:33 +01001554#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001555/* frequency bases */
1556/* divided by 10 to be nice to platforms without floating point */
Mike Frysingerb588caf2010-10-20 01:15:53 +00001557static const int fbase[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -05001558 10000,
1559 100000,
1560 1000000,
1561 10000000,
1562};
1563
1564/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1565 * to platforms without floating point.
1566 */
Simon Glass03317cc2016-05-14 14:02:57 -06001567static const u8 multipliers[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -05001568 0, /* reserved */
1569 10,
1570 12,
1571 13,
1572 15,
1573 20,
1574 25,
1575 30,
1576 35,
1577 40,
1578 45,
1579 50,
1580 55,
1581 60,
1582 70,
1583 80,
1584};
1585
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001586static inline int bus_width(uint cap)
1587{
1588 if (cap == MMC_MODE_8BIT)
1589 return 8;
1590 if (cap == MMC_MODE_4BIT)
1591 return 4;
1592 if (cap == MMC_MODE_1BIT)
1593 return 1;
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01001594 pr_warn("invalid bus witdh capability 0x%x\n", cap);
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001595 return 0;
1596}
1597
Simon Glasseba48f92017-07-29 11:35:31 -06001598#if !CONFIG_IS_ENABLED(DM_MMC)
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001599#ifdef MMC_SUPPORTS_TUNING
Kishon Vijay Abraham Iae7174f2017-09-21 16:30:05 +02001600static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1601{
1602 return -ENOTSUPP;
1603}
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001604#endif
Kishon Vijay Abraham Iae7174f2017-09-21 16:30:05 +02001605
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001606static int mmc_set_ios(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001607{
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001608 int ret = 0;
1609
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001610 if (mmc->cfg->ops->set_ios)
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001611 ret = mmc->cfg->ops->set_ios(mmc);
1612
1613 return ret;
Andy Flemingad347bb2008-10-30 16:41:01 -05001614}
Yann Gautier6f558332019-09-19 17:56:12 +02001615
1616static int mmc_host_power_cycle(struct mmc *mmc)
1617{
1618 int ret = 0;
1619
1620 if (mmc->cfg->ops->host_power_cycle)
1621 ret = mmc->cfg->ops->host_power_cycle(mmc);
1622
1623 return ret;
1624}
Simon Glass394dfc02016-06-12 23:30:22 -06001625#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001626
Kishon Vijay Abraham Id6246bf2017-09-21 16:30:03 +02001627int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
Andy Flemingad347bb2008-10-30 16:41:01 -05001628{
Jaehoon Chungab4d4052018-01-23 14:04:30 +09001629 if (!disable) {
Jaehoon Chung8a933292018-01-17 19:36:58 +09001630 if (clock > mmc->cfg->f_max)
1631 clock = mmc->cfg->f_max;
Andy Flemingad347bb2008-10-30 16:41:01 -05001632
Jaehoon Chung8a933292018-01-17 19:36:58 +09001633 if (clock < mmc->cfg->f_min)
1634 clock = mmc->cfg->f_min;
1635 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001636
1637 mmc->clock = clock;
Kishon Vijay Abraham Id6246bf2017-09-21 16:30:03 +02001638 mmc->clk_disable = disable;
Andy Flemingad347bb2008-10-30 16:41:01 -05001639
Jaehoon Chungc8477d62018-01-26 19:25:30 +09001640 debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
1641
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001642 return mmc_set_ios(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001643}
1644
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001645static int mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Flemingad347bb2008-10-30 16:41:01 -05001646{
1647 mmc->bus_width = width;
1648
Kishon Vijay Abraham Ie178c112017-09-21 16:29:59 +02001649 return mmc_set_ios(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001650}
1651
Jean-Jacques Hiblot00de5042017-09-21 16:29:54 +02001652#if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1653/*
1654 * helper function to display the capabilities in a human
1655 * friendly manner. The capabilities include bus width and
1656 * supported modes.
1657 */
1658void mmc_dump_capabilities(const char *text, uint caps)
1659{
1660 enum bus_mode mode;
1661
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001662 pr_debug("%s: widths [", text);
Jean-Jacques Hiblot00de5042017-09-21 16:29:54 +02001663 if (caps & MMC_MODE_8BIT)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001664 pr_debug("8, ");
Jean-Jacques Hiblot00de5042017-09-21 16:29:54 +02001665 if (caps & MMC_MODE_4BIT)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001666 pr_debug("4, ");
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001667 if (caps & MMC_MODE_1BIT)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001668 pr_debug("1, ");
1669 pr_debug("\b\b] modes [");
Jean-Jacques Hiblot00de5042017-09-21 16:29:54 +02001670 for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1671 if (MMC_CAP(mode) & caps)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001672 pr_debug("%s, ", mmc_mode_name(mode));
1673 pr_debug("\b\b]\n");
Jean-Jacques Hiblot00de5042017-09-21 16:29:54 +02001674}
1675#endif
1676
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001677struct mode_width_tuning {
1678 enum bus_mode mode;
1679 uint widths;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001680#ifdef MMC_SUPPORTS_TUNING
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +02001681 uint tuning;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001682#endif
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001683};
1684
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001685#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001686int mmc_voltage_to_mv(enum mmc_voltage voltage)
1687{
1688 switch (voltage) {
1689 case MMC_SIGNAL_VOLTAGE_000: return 0;
1690 case MMC_SIGNAL_VOLTAGE_330: return 3300;
1691 case MMC_SIGNAL_VOLTAGE_180: return 1800;
1692 case MMC_SIGNAL_VOLTAGE_120: return 1200;
1693 }
1694 return -EINVAL;
1695}
1696
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +02001697static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1698{
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001699 int err;
1700
1701 if (mmc->signal_voltage == signal_voltage)
1702 return 0;
1703
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +02001704 mmc->signal_voltage = signal_voltage;
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001705 err = mmc_set_ios(mmc);
1706 if (err)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001707 pr_debug("unable to set voltage (err %d)\n", err);
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001708
1709 return err;
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +02001710}
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001711#else
1712static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1713{
1714 return 0;
1715}
1716#endif
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +02001717
Marek Vasuta318a7a2018-04-15 00:37:11 +02001718#if !CONFIG_IS_ENABLED(MMC_TINY)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001719static const struct mode_width_tuning sd_modes_by_pref[] = {
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001720#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1721#ifdef MMC_SUPPORTS_TUNING
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001722 {
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001723 .mode = UHS_SDR104,
1724 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1725 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1726 },
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001727#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001728 {
1729 .mode = UHS_SDR50,
1730 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1731 },
1732 {
1733 .mode = UHS_DDR50,
1734 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1735 },
1736 {
1737 .mode = UHS_SDR25,
1738 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1739 },
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001740#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001741 {
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001742 .mode = SD_HS,
1743 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1744 },
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001745#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001746 {
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001747 .mode = UHS_SDR12,
1748 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1749 },
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001750#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001751 {
Faiz Abbas01db77e2020-02-26 13:44:32 +05301752 .mode = MMC_LEGACY,
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001753 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1754 }
1755};
1756
1757#define for_each_sd_mode_by_pref(caps, mwt) \
1758 for (mwt = sd_modes_by_pref;\
1759 mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1760 mwt++) \
1761 if (caps & MMC_CAP(mwt->mode))
1762
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02001763static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001764{
1765 int err;
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001766 uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1767 const struct mode_width_tuning *mwt;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001768#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001769 bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001770#else
1771 bool uhs_en = false;
1772#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001773 uint caps;
1774
Jean-Jacques Hiblot93c31d12017-11-30 17:43:54 +01001775#ifdef DEBUG
1776 mmc_dump_capabilities("sd card", card_caps);
Jean-Jacques Hiblotd7e5e032017-11-30 17:43:57 +01001777 mmc_dump_capabilities("host", mmc->host_caps);
Jean-Jacques Hiblot93c31d12017-11-30 17:43:54 +01001778#endif
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001779
Anup Pateld9c92c72019-07-08 04:10:43 +00001780 if (mmc_host_is_spi(mmc)) {
1781 mmc_set_bus_width(mmc, 1);
Faiz Abbas01db77e2020-02-26 13:44:32 +05301782 mmc_select_mode(mmc, MMC_LEGACY);
Anup Pateld9c92c72019-07-08 04:10:43 +00001783 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
Pragnesh Patela01f57e2020-06-29 15:17:26 +05301784#if CONFIG_IS_ENABLED(MMC_WRITE)
1785 err = sd_read_ssr(mmc);
1786 if (err)
1787 pr_warn("unable to read ssr\n");
1788#endif
Anup Pateld9c92c72019-07-08 04:10:43 +00001789 return 0;
1790 }
1791
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001792 /* Restrict card's capabilities by what the host can do */
Jean-Jacques Hiblotd7e5e032017-11-30 17:43:57 +01001793 caps = card_caps & mmc->host_caps;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001794
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001795 if (!uhs_en)
1796 caps &= ~UHS_CAPS;
1797
1798 for_each_sd_mode_by_pref(caps, mwt) {
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001799 uint *w;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001800
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001801 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001802 if (*w & caps & mwt->widths) {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001803 pr_debug("trying mode %s width %d (at %d MHz)\n",
1804 mmc_mode_name(mwt->mode),
1805 bus_width(*w),
1806 mmc_mode2freq(mmc, mwt->mode) / 1000000);
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001807
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001808 /* configure the bus width (card + host) */
1809 err = sd_select_bus_width(mmc, bus_width(*w));
1810 if (err)
1811 goto error;
1812 mmc_set_bus_width(mmc, bus_width(*w));
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001813
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001814 /* configure the bus mode (card) */
1815 err = sd_set_card_speed(mmc, mwt->mode);
1816 if (err)
1817 goto error;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001818
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001819 /* configure the bus mode (host) */
1820 mmc_select_mode(mmc, mwt->mode);
Jaehoon Chung239cb2f2018-01-26 19:25:29 +09001821 mmc_set_clock(mmc, mmc->tran_speed,
1822 MMC_CLK_ENABLE);
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001823
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001824#ifdef MMC_SUPPORTS_TUNING
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001825 /* execute tuning if needed */
1826 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1827 err = mmc_execute_tuning(mmc,
1828 mwt->tuning);
1829 if (err) {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001830 pr_debug("tuning failed\n");
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001831 goto error;
1832 }
1833 }
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001834#endif
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02001835
Jean-Jacques Hiblotcb534f02018-01-04 15:23:33 +01001836#if CONFIG_IS_ENABLED(MMC_WRITE)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001837 err = sd_read_ssr(mmc);
Peng Fan2d2fe8e2018-03-05 16:20:40 +08001838 if (err)
Jean-Jacques Hiblotcb534f02018-01-04 15:23:33 +01001839 pr_warn("unable to read ssr\n");
1840#endif
1841 if (!err)
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001842 return 0;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001843
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001844error:
1845 /* revert to a safer bus speed */
Faiz Abbas01db77e2020-02-26 13:44:32 +05301846 mmc_select_mode(mmc, MMC_LEGACY);
Jaehoon Chung239cb2f2018-01-26 19:25:29 +09001847 mmc_set_clock(mmc, mmc->tran_speed,
1848 MMC_CLK_ENABLE);
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001849 }
1850 }
1851 }
1852
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09001853 pr_err("unable to select a mode\n");
Jean-Jacques Hiblot5b1a4d92017-09-21 16:29:57 +02001854 return -ENOTSUPP;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001855}
1856
Jean-Jacques Hiblot933d1262017-09-21 16:29:52 +02001857/*
1858 * read the compare the part of ext csd that is constant.
1859 * This can be used to check that the transfer is working
1860 * as expected.
1861 */
1862static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02001863{
Jean-Jacques Hiblot933d1262017-09-21 16:29:52 +02001864 int err;
Jean-Jacques Hibloted9506b2017-09-21 16:29:51 +02001865 const u8 *ext_csd = mmc->ext_csd;
Jean-Jacques Hiblot933d1262017-09-21 16:29:52 +02001866 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1867
Jean-Jacques Hiblot7ab1b622017-11-30 17:43:58 +01001868 if (mmc->version < MMC_VERSION_4)
1869 return 0;
1870
Jean-Jacques Hiblot933d1262017-09-21 16:29:52 +02001871 err = mmc_send_ext_csd(mmc, test_csd);
1872 if (err)
1873 return err;
1874
1875 /* Only compare read only fields */
1876 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1877 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1878 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1879 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1880 ext_csd[EXT_CSD_REV]
1881 == test_csd[EXT_CSD_REV] &&
1882 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1883 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1884 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1885 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1886 return 0;
1887
1888 return -EBADMSG;
1889}
1890
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001891#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001892static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1893 uint32_t allowed_mask)
1894{
1895 u32 card_mask = 0;
1896
1897 switch (mode) {
Peng Faneede83b2019-07-10 14:43:07 +08001898 case MMC_HS_400_ES:
Peng Fan46801252018-08-10 14:07:54 +08001899 case MMC_HS_400:
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001900 case MMC_HS_200:
Peng Fan46801252018-08-10 14:07:54 +08001901 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V |
1902 EXT_CSD_CARD_TYPE_HS400_1_8V))
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001903 card_mask |= MMC_SIGNAL_VOLTAGE_180;
Peng Fan46801252018-08-10 14:07:54 +08001904 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
1905 EXT_CSD_CARD_TYPE_HS400_1_2V))
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001906 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1907 break;
1908 case MMC_DDR_52:
1909 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1910 card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1911 MMC_SIGNAL_VOLTAGE_180;
1912 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1913 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1914 break;
1915 default:
1916 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1917 break;
1918 }
1919
1920 while (card_mask & allowed_mask) {
1921 enum mmc_voltage best_match;
1922
1923 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1924 if (!mmc_set_signal_voltage(mmc, best_match))
1925 return 0;
1926
1927 allowed_mask &= ~best_match;
1928 }
1929
1930 return -ENOTSUPP;
1931}
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001932#else
1933static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1934 uint32_t allowed_mask)
1935{
1936 return 0;
1937}
1938#endif
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02001939
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001940static const struct mode_width_tuning mmc_modes_by_pref[] = {
Peng Faneede83b2019-07-10 14:43:07 +08001941#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
1942 {
1943 .mode = MMC_HS_400_ES,
1944 .widths = MMC_MODE_8BIT,
1945 },
1946#endif
Peng Fan46801252018-08-10 14:07:54 +08001947#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1948 {
1949 .mode = MMC_HS_400,
1950 .widths = MMC_MODE_8BIT,
1951 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1952 },
1953#endif
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001954#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001955 {
1956 .mode = MMC_HS_200,
1957 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +02001958 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001959 },
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01001960#endif
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02001961 {
1962 .mode = MMC_DDR_52,
1963 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1964 },
1965 {
1966 .mode = MMC_HS_52,
1967 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1968 },
1969 {
1970 .mode = MMC_HS,
1971 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1972 },
1973 {
1974 .mode = MMC_LEGACY,
1975 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1976 }
1977};
1978
1979#define for_each_mmc_mode_by_pref(caps, mwt) \
1980 for (mwt = mmc_modes_by_pref;\
1981 mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1982 mwt++) \
1983 if (caps & MMC_CAP(mwt->mode))
1984
1985static const struct ext_csd_bus_width {
1986 uint cap;
1987 bool is_ddr;
1988 uint ext_csd_bits;
1989} ext_csd_bus_width[] = {
1990 {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1991 {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1992 {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1993 {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1994 {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1995};
1996
Peng Fan46801252018-08-10 14:07:54 +08001997#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1998static int mmc_select_hs400(struct mmc *mmc)
1999{
2000 int err;
2001
2002 /* Set timing to HS200 for tuning */
Marek Vasut111572f2019-01-03 21:19:24 +01002003 err = mmc_set_card_speed(mmc, MMC_HS_200, false);
Peng Fan46801252018-08-10 14:07:54 +08002004 if (err)
2005 return err;
2006
2007 /* configure the bus mode (host) */
2008 mmc_select_mode(mmc, MMC_HS_200);
2009 mmc_set_clock(mmc, mmc->tran_speed, false);
2010
2011 /* execute tuning if needed */
Yangbo Lu3ed53ac2020-09-01 16:58:03 +08002012 mmc->hs400_tuning = 1;
Peng Fan46801252018-08-10 14:07:54 +08002013 err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
Yangbo Lu3ed53ac2020-09-01 16:58:03 +08002014 mmc->hs400_tuning = 0;
Peng Fan46801252018-08-10 14:07:54 +08002015 if (err) {
2016 debug("tuning failed\n");
2017 return err;
2018 }
2019
2020 /* Set back to HS */
BOUGH CHEN8702bbc2019-03-26 06:24:17 +00002021 mmc_set_card_speed(mmc, MMC_HS, true);
Peng Fan46801252018-08-10 14:07:54 +08002022
Yangbo Lu5347aea2020-09-01 16:58:04 +08002023 err = mmc_hs400_prepare_ddr(mmc);
2024 if (err)
2025 return err;
2026
Peng Fan46801252018-08-10 14:07:54 +08002027 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
2028 EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
2029 if (err)
2030 return err;
2031
Marek Vasut111572f2019-01-03 21:19:24 +01002032 err = mmc_set_card_speed(mmc, MMC_HS_400, false);
Peng Fan46801252018-08-10 14:07:54 +08002033 if (err)
2034 return err;
2035
2036 mmc_select_mode(mmc, MMC_HS_400);
2037 err = mmc_set_clock(mmc, mmc->tran_speed, false);
2038 if (err)
2039 return err;
2040
2041 return 0;
2042}
2043#else
2044static int mmc_select_hs400(struct mmc *mmc)
2045{
2046 return -ENOTSUPP;
2047}
2048#endif
2049
Peng Faneede83b2019-07-10 14:43:07 +08002050#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
2051#if !CONFIG_IS_ENABLED(DM_MMC)
2052static int mmc_set_enhanced_strobe(struct mmc *mmc)
2053{
2054 return -ENOTSUPP;
2055}
2056#endif
2057static int mmc_select_hs400es(struct mmc *mmc)
2058{
2059 int err;
2060
2061 err = mmc_set_card_speed(mmc, MMC_HS, true);
2062 if (err)
2063 return err;
2064
2065 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
2066 EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG |
2067 EXT_CSD_BUS_WIDTH_STROBE);
2068 if (err) {
2069 printf("switch to bus width for hs400 failed\n");
2070 return err;
2071 }
2072 /* TODO: driver strength */
2073 err = mmc_set_card_speed(mmc, MMC_HS_400_ES, false);
2074 if (err)
2075 return err;
2076
2077 mmc_select_mode(mmc, MMC_HS_400_ES);
2078 err = mmc_set_clock(mmc, mmc->tran_speed, false);
2079 if (err)
2080 return err;
2081
2082 return mmc_set_enhanced_strobe(mmc);
2083}
2084#else
2085static int mmc_select_hs400es(struct mmc *mmc)
2086{
2087 return -ENOTSUPP;
2088}
2089#endif
2090
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002091#define for_each_supported_width(caps, ddr, ecbv) \
2092 for (ecbv = ext_csd_bus_width;\
2093 ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
2094 ecbv++) \
2095 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
2096
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02002097static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
Jean-Jacques Hiblot933d1262017-09-21 16:29:52 +02002098{
Jaehoon Chung6b3431c2020-12-04 06:36:00 +09002099 int err = 0;
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002100 const struct mode_width_tuning *mwt;
2101 const struct ext_csd_bus_width *ecbw;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002102
Jean-Jacques Hiblot93c31d12017-11-30 17:43:54 +01002103#ifdef DEBUG
2104 mmc_dump_capabilities("mmc", card_caps);
Jean-Jacques Hiblotd7e5e032017-11-30 17:43:57 +01002105 mmc_dump_capabilities("host", mmc->host_caps);
Jean-Jacques Hiblot93c31d12017-11-30 17:43:54 +01002106#endif
2107
Anup Pateld9c92c72019-07-08 04:10:43 +00002108 if (mmc_host_is_spi(mmc)) {
2109 mmc_set_bus_width(mmc, 1);
2110 mmc_select_mode(mmc, MMC_LEGACY);
2111 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
2112 return 0;
2113 }
2114
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002115 /* Restrict card's capabilities by what the host can do */
Jean-Jacques Hiblotd7e5e032017-11-30 17:43:57 +01002116 card_caps &= mmc->host_caps;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002117
2118 /* Only version 4 of MMC supports wider bus widths */
2119 if (mmc->version < MMC_VERSION_4)
2120 return 0;
2121
Jean-Jacques Hibloted9506b2017-09-21 16:29:51 +02002122 if (!mmc->ext_csd) {
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002123 pr_debug("No ext_csd found!\n"); /* this should enver happen */
Jean-Jacques Hibloted9506b2017-09-21 16:29:51 +02002124 return -ENOTSUPP;
2125 }
2126
Marek Vasut111572f2019-01-03 21:19:24 +01002127#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
Ye Li3679e802021-08-17 17:20:34 +08002128 CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \
2129 CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
Marek Vasut111572f2019-01-03 21:19:24 +01002130 /*
2131 * In case the eMMC is in HS200/HS400 mode, downgrade to HS mode
2132 * before doing anything else, since a transition from either of
2133 * the HS200/HS400 mode directly to legacy mode is not supported.
2134 */
2135 if (mmc->selected_mode == MMC_HS_200 ||
Ye Li3679e802021-08-17 17:20:34 +08002136 mmc->selected_mode == MMC_HS_400 ||
2137 mmc->selected_mode == MMC_HS_400_ES)
Marek Vasut111572f2019-01-03 21:19:24 +01002138 mmc_set_card_speed(mmc, MMC_HS, true);
2139 else
2140#endif
2141 mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02002142
2143 for_each_mmc_mode_by_pref(card_caps, mwt) {
2144 for_each_supported_width(card_caps & mwt->widths,
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002145 mmc_is_mode_ddr(mwt->mode), ecbw) {
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02002146 enum mmc_voltage old_voltage;
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002147 pr_debug("trying mode %s width %d (at %d MHz)\n",
2148 mmc_mode_name(mwt->mode),
2149 bus_width(ecbw->cap),
2150 mmc_mode2freq(mmc, mwt->mode) / 1000000);
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02002151 old_voltage = mmc->signal_voltage;
2152 err = mmc_set_lowest_voltage(mmc, mwt->mode,
2153 MMC_ALL_SIGNAL_VOLTAGE);
2154 if (err)
2155 continue;
2156
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002157 /* configure the bus width (card + host) */
2158 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2159 EXT_CSD_BUS_WIDTH,
2160 ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
2161 if (err)
2162 goto error;
2163 mmc_set_bus_width(mmc, bus_width(ecbw->cap));
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002164
Peng Fan46801252018-08-10 14:07:54 +08002165 if (mwt->mode == MMC_HS_400) {
2166 err = mmc_select_hs400(mmc);
2167 if (err) {
2168 printf("Select HS400 failed %d\n", err);
2169 goto error;
2170 }
Peng Faneede83b2019-07-10 14:43:07 +08002171 } else if (mwt->mode == MMC_HS_400_ES) {
2172 err = mmc_select_hs400es(mmc);
2173 if (err) {
2174 printf("Select HS400ES failed %d\n",
2175 err);
2176 goto error;
2177 }
Peng Fan46801252018-08-10 14:07:54 +08002178 } else {
2179 /* configure the bus speed (card) */
Marek Vasut111572f2019-01-03 21:19:24 +01002180 err = mmc_set_card_speed(mmc, mwt->mode, false);
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002181 if (err)
2182 goto error;
Peng Fan46801252018-08-10 14:07:54 +08002183
2184 /*
2185 * configure the bus width AND the ddr mode
2186 * (card). The host side will be taken care
2187 * of in the next step
2188 */
2189 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
2190 err = mmc_switch(mmc,
2191 EXT_CSD_CMD_SET_NORMAL,
2192 EXT_CSD_BUS_WIDTH,
2193 ecbw->ext_csd_bits);
2194 if (err)
2195 goto error;
2196 }
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002197
Peng Fan46801252018-08-10 14:07:54 +08002198 /* configure the bus mode (host) */
2199 mmc_select_mode(mmc, mwt->mode);
2200 mmc_set_clock(mmc, mmc->tran_speed,
2201 MMC_CLK_ENABLE);
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01002202#ifdef MMC_SUPPORTS_TUNING
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002203
Peng Fan46801252018-08-10 14:07:54 +08002204 /* execute tuning if needed */
2205 if (mwt->tuning) {
2206 err = mmc_execute_tuning(mmc,
2207 mwt->tuning);
2208 if (err) {
Jaehoon Chungad9f7ce2020-11-17 07:04:59 +09002209 pr_debug("tuning failed : %d\n", err);
Peng Fan46801252018-08-10 14:07:54 +08002210 goto error;
2211 }
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +02002212 }
Jean-Jacques Hiblot6051e782017-11-30 17:44:01 +01002213#endif
Peng Fan46801252018-08-10 14:07:54 +08002214 }
Kishon Vijay Abraham I210369f2017-09-21 16:30:06 +02002215
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002216 /* do a transfer to check the configuration */
2217 err = mmc_read_and_compare_ext_csd(mmc);
2218 if (!err)
2219 return 0;
2220error:
Jean-Jacques Hiblotb6937d62017-09-21 16:30:11 +02002221 mmc_set_signal_voltage(mmc, old_voltage);
Naoki Hayama3110dcb2020-10-12 18:35:22 +09002222 /* if an error occurred, revert to a safer bus mode */
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002223 mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2224 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
2225 mmc_select_mode(mmc, MMC_LEGACY);
2226 mmc_set_bus_width(mmc, 1);
2227 }
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002228 }
2229
Jaehoon Chungad9f7ce2020-11-17 07:04:59 +09002230 pr_err("unable to select a mode : %d\n", err);
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002231
Jean-Jacques Hiblotec346832017-09-21 16:29:58 +02002232 return -ENOTSUPP;
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002233}
Marek Vasuta318a7a2018-04-15 00:37:11 +02002234#endif
2235
2236#if CONFIG_IS_ENABLED(MMC_TINY)
2237DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN);
2238#endif
Jean-Jacques Hiblot31e7cf32017-09-21 16:29:49 +02002239
Jean-Jacques Hibloted9506b2017-09-21 16:29:51 +02002240static int mmc_startup_v4(struct mmc *mmc)
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002241{
2242 int err, i;
2243 u64 capacity;
2244 bool has_parts = false;
2245 bool part_completed;
Jean-Jacques Hiblotfa6c5772018-01-04 15:23:31 +01002246 static const u32 mmc_versions[] = {
2247 MMC_VERSION_4,
2248 MMC_VERSION_4_1,
2249 MMC_VERSION_4_2,
2250 MMC_VERSION_4_3,
Jean-Jacques Hiblotc64862b2018-02-09 12:09:28 +01002251 MMC_VERSION_4_4,
Jean-Jacques Hiblotfa6c5772018-01-04 15:23:31 +01002252 MMC_VERSION_4_41,
2253 MMC_VERSION_4_5,
2254 MMC_VERSION_5_0,
2255 MMC_VERSION_5_1
2256 };
2257
Marek Vasuta318a7a2018-04-15 00:37:11 +02002258#if CONFIG_IS_ENABLED(MMC_TINY)
2259 u8 *ext_csd = ext_csd_bkup;
2260
2261 if (IS_SD(mmc) || mmc->version < MMC_VERSION_4)
2262 return 0;
2263
2264 if (!mmc->ext_csd)
2265 memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup));
2266
2267 err = mmc_send_ext_csd(mmc, ext_csd);
2268 if (err)
2269 goto error;
2270
2271 /* store the ext csd for future reference */
2272 if (!mmc->ext_csd)
2273 mmc->ext_csd = ext_csd;
2274#else
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002275 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002276
2277 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
2278 return 0;
2279
2280 /* check ext_csd version and capacity */
2281 err = mmc_send_ext_csd(mmc, ext_csd);
2282 if (err)
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002283 goto error;
2284
2285 /* store the ext csd for future reference */
2286 if (!mmc->ext_csd)
2287 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
2288 if (!mmc->ext_csd)
2289 return -ENOMEM;
2290 memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
Marek Vasuta318a7a2018-04-15 00:37:11 +02002291#endif
Alexander Kochetkovf1133c92018-02-20 14:35:55 +03002292 if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
Jean-Jacques Hiblotfa6c5772018-01-04 15:23:31 +01002293 return -EINVAL;
2294
2295 mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
2296
2297 if (mmc->version >= MMC_VERSION_4_2) {
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002298 /*
2299 * According to the JEDEC Standard, the value of
2300 * ext_csd's capacity is valid if the value is more
2301 * than 2GB
2302 */
2303 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
2304 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
2305 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
2306 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
2307 capacity *= MMC_MAX_BLOCK_LEN;
2308 if ((capacity >> 20) > 2 * 1024)
2309 mmc->capacity_user = capacity;
2310 }
2311
Jean-Jacques Hiblot201559c2019-07-02 10:53:54 +02002312 if (mmc->version >= MMC_VERSION_4_5)
2313 mmc->gen_cmd6_time = ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
2314
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002315 /* The partition data may be non-zero but it is only
2316 * effective if PARTITION_SETTING_COMPLETED is set in
2317 * EXT_CSD, so ignore any data if this bit is not set,
2318 * except for enabling the high-capacity group size
2319 * definition (see below).
2320 */
2321 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2322 EXT_CSD_PARTITION_SETTING_COMPLETED);
2323
Jean-Jacques Hiblot7f5b1692019-07-02 10:53:55 +02002324 mmc->part_switch_time = ext_csd[EXT_CSD_PART_SWITCH_TIME];
2325 /* Some eMMC set the value too low so set a minimum */
2326 if (mmc->part_switch_time < MMC_MIN_PART_SWITCH_TIME && mmc->part_switch_time)
2327 mmc->part_switch_time = MMC_MIN_PART_SWITCH_TIME;
2328
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002329 /* store the partition info of emmc */
2330 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2331 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2332 ext_csd[EXT_CSD_BOOT_MULT])
2333 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2334 if (part_completed &&
2335 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2336 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2337
2338 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2339
2340 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2341
2342 for (i = 0; i < 4; i++) {
2343 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2344 uint mult = (ext_csd[idx + 2] << 16) +
2345 (ext_csd[idx + 1] << 8) + ext_csd[idx];
2346 if (mult)
2347 has_parts = true;
2348 if (!part_completed)
2349 continue;
2350 mmc->capacity_gp[i] = mult;
2351 mmc->capacity_gp[i] *=
2352 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2353 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2354 mmc->capacity_gp[i] <<= 19;
2355 }
2356
Jean-Jacques Hiblotc94c5472018-01-04 15:23:35 +01002357#ifndef CONFIG_SPL_BUILD
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002358 if (part_completed) {
2359 mmc->enh_user_size =
2360 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2361 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2362 ext_csd[EXT_CSD_ENH_SIZE_MULT];
2363 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2364 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2365 mmc->enh_user_size <<= 19;
2366 mmc->enh_user_start =
2367 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2368 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2369 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2370 ext_csd[EXT_CSD_ENH_START_ADDR];
2371 if (mmc->high_capacity)
2372 mmc->enh_user_start <<= 9;
2373 }
Jean-Jacques Hiblotc94c5472018-01-04 15:23:35 +01002374#endif
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002375
2376 /*
2377 * Host needs to enable ERASE_GRP_DEF bit if device is
2378 * partitioned. This bit will be lost every time after a reset
2379 * or power off. This will affect erase size.
2380 */
2381 if (part_completed)
2382 has_parts = true;
2383 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2384 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2385 has_parts = true;
2386 if (has_parts) {
2387 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2388 EXT_CSD_ERASE_GROUP_DEF, 1);
2389
2390 if (err)
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002391 goto error;
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002392
2393 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2394 }
2395
2396 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002397#if CONFIG_IS_ENABLED(MMC_WRITE)
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002398 /* Read out group size from ext_csd */
2399 mmc->erase_grp_size =
2400 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002401#endif
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002402 /*
2403 * if high capacity and partition setting completed
2404 * SEC_COUNT is valid even if it is smaller than 2 GiB
2405 * JEDEC Standard JESD84-B45, 6.2.4
2406 */
2407 if (mmc->high_capacity && part_completed) {
2408 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2409 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2410 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2411 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2412 capacity *= MMC_MAX_BLOCK_LEN;
2413 mmc->capacity_user = capacity;
2414 }
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002415 }
2416#if CONFIG_IS_ENABLED(MMC_WRITE)
2417 else {
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002418 /* Calculate the group size from the csd value. */
2419 int erase_gsz, erase_gmul;
2420
2421 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2422 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2423 mmc->erase_grp_size = (erase_gsz + 1)
2424 * (erase_gmul + 1);
2425 }
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002426#endif
Jean-Jacques Hiblotba54ab82018-01-04 15:23:36 +01002427#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002428 mmc->hc_wp_grp_size = 1024
2429 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2430 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Jean-Jacques Hiblotba54ab82018-01-04 15:23:36 +01002431#endif
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002432
2433 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2434
Loic Poulainc0aadbb2023-01-26 10:24:17 +01002435 mmc->can_trim =
2436 !!(ext_csd[EXT_CSD_SEC_FEATURE] & EXT_CSD_SEC_FEATURE_TRIM_EN);
2437
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002438 return 0;
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002439error:
2440 if (mmc->ext_csd) {
Marek Vasuta318a7a2018-04-15 00:37:11 +02002441#if !CONFIG_IS_ENABLED(MMC_TINY)
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002442 free(mmc->ext_csd);
Marek Vasuta318a7a2018-04-15 00:37:11 +02002443#endif
Jean-Jacques Hiblot06976eb2017-11-30 17:43:59 +01002444 mmc->ext_csd = NULL;
2445 }
2446 return err;
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002447}
2448
Kim Phillips87ea3892012-10-29 13:34:43 +00002449static int mmc_startup(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05002450{
Stephen Warrene315ae82013-06-11 15:14:01 -06002451 int err, i;
Andy Flemingad347bb2008-10-30 16:41:01 -05002452 uint mult, freq;
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002453 u64 cmult, csize;
Andy Flemingad347bb2008-10-30 16:41:01 -05002454 struct mmc_cmd cmd;
Simon Glasse5db1152016-05-01 13:52:35 -06002455 struct blk_desc *bdesc;
Andy Flemingad347bb2008-10-30 16:41:01 -05002456
Thomas Chou1254c3d2010-12-24 13:12:21 +00002457#ifdef CONFIG_MMC_SPI_CRC_ON
2458 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2459 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2460 cmd.resp_type = MMC_RSP_R1;
2461 cmd.cmdarg = 1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00002462 err = mmc_send_cmd(mmc, &cmd, NULL);
Thomas Chou1254c3d2010-12-24 13:12:21 +00002463 if (err)
2464 return err;
2465 }
2466#endif
2467
Andy Flemingad347bb2008-10-30 16:41:01 -05002468 /* Put the Card in Identify Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00002469 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2470 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Flemingad347bb2008-10-30 16:41:01 -05002471 cmd.resp_type = MMC_RSP_R2;
2472 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05002473
Sean Anderson86325092020-10-17 08:36:27 -04002474 err = mmc_send_cmd_quirks(mmc, &cmd, NULL, MMC_QUIRK_RETRY_SEND_CID, 4);
Andy Flemingad347bb2008-10-30 16:41:01 -05002475 if (err)
2476 return err;
2477
2478 memcpy(mmc->cid, cmd.response, 16);
2479
2480 /*
2481 * For MMC cards, set the Relative Address.
2482 * For SD cards, get the Relatvie Address.
2483 * This also puts the cards into Standby State
2484 */
Thomas Chou1254c3d2010-12-24 13:12:21 +00002485 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2486 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2487 cmd.cmdarg = mmc->rca << 16;
2488 cmd.resp_type = MMC_RSP_R6;
Andy Flemingad347bb2008-10-30 16:41:01 -05002489
Thomas Chou1254c3d2010-12-24 13:12:21 +00002490 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05002491
Thomas Chou1254c3d2010-12-24 13:12:21 +00002492 if (err)
2493 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05002494
Thomas Chou1254c3d2010-12-24 13:12:21 +00002495 if (IS_SD(mmc))
2496 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2497 }
Andy Flemingad347bb2008-10-30 16:41:01 -05002498
2499 /* Get the Card-Specific Data */
2500 cmd.cmdidx = MMC_CMD_SEND_CSD;
2501 cmd.resp_type = MMC_RSP_R2;
2502 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05002503
2504 err = mmc_send_cmd(mmc, &cmd, NULL);
2505
2506 if (err)
2507 return err;
2508
Rabin Vincentb6eed942009-04-05 13:30:56 +05302509 mmc->csd[0] = cmd.response[0];
2510 mmc->csd[1] = cmd.response[1];
2511 mmc->csd[2] = cmd.response[2];
2512 mmc->csd[3] = cmd.response[3];
Andy Flemingad347bb2008-10-30 16:41:01 -05002513
2514 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincentbdf7a682009-04-05 13:30:55 +05302515 int version = (cmd.response[0] >> 26) & 0xf;
Andy Flemingad347bb2008-10-30 16:41:01 -05002516
2517 switch (version) {
Bin Meng4a4ef872016-03-17 21:53:13 -07002518 case 0:
2519 mmc->version = MMC_VERSION_1_2;
2520 break;
2521 case 1:
2522 mmc->version = MMC_VERSION_1_4;
2523 break;
2524 case 2:
2525 mmc->version = MMC_VERSION_2_2;
2526 break;
2527 case 3:
2528 mmc->version = MMC_VERSION_3;
2529 break;
2530 case 4:
2531 mmc->version = MMC_VERSION_4;
2532 break;
2533 default:
2534 mmc->version = MMC_VERSION_1_2;
2535 break;
Andy Flemingad347bb2008-10-30 16:41:01 -05002536 }
2537 }
2538
2539 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincentbdf7a682009-04-05 13:30:55 +05302540 freq = fbase[(cmd.response[0] & 0x7)];
2541 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Flemingad347bb2008-10-30 16:41:01 -05002542
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +02002543 mmc->legacy_speed = freq * mult;
Jean-Jacques Hiblota94fb412017-09-21 16:29:53 +02002544 mmc_select_mode(mmc, MMC_LEGACY);
Andy Flemingad347bb2008-10-30 16:41:01 -05002545
Markus Niebel03951412013-12-16 13:40:46 +01002546 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincentb6eed942009-04-05 13:30:56 +05302547 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002548#if CONFIG_IS_ENABLED(MMC_WRITE)
Andy Flemingad347bb2008-10-30 16:41:01 -05002549
2550 if (IS_SD(mmc))
2551 mmc->write_bl_len = mmc->read_bl_len;
2552 else
Rabin Vincentb6eed942009-04-05 13:30:56 +05302553 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002554#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05002555
2556 if (mmc->high_capacity) {
2557 csize = (mmc->csd[1] & 0x3f) << 16
2558 | (mmc->csd[2] & 0xffff0000) >> 16;
2559 cmult = 8;
2560 } else {
2561 csize = (mmc->csd[1] & 0x3ff) << 2
2562 | (mmc->csd[2] & 0xc0000000) >> 30;
2563 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2564 }
2565
Stephen Warrene315ae82013-06-11 15:14:01 -06002566 mmc->capacity_user = (csize + 1) << (cmult + 2);
2567 mmc->capacity_user *= mmc->read_bl_len;
2568 mmc->capacity_boot = 0;
2569 mmc->capacity_rpmb = 0;
2570 for (i = 0; i < 4; i++)
2571 mmc->capacity_gp[i] = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05002572
Simon Glassa09c2b72013-04-03 08:54:30 +00002573 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2574 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -05002575
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002576#if CONFIG_IS_ENABLED(MMC_WRITE)
Simon Glassa09c2b72013-04-03 08:54:30 +00002577 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2578 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002579#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05002580
Markus Niebel03951412013-12-16 13:40:46 +01002581 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2582 cmd.cmdidx = MMC_CMD_SET_DSR;
2583 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2584 cmd.resp_type = MMC_RSP_NONE;
2585 if (mmc_send_cmd(mmc, &cmd, NULL))
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01002586 pr_warn("MMC: SET_DSR failed\n");
Markus Niebel03951412013-12-16 13:40:46 +01002587 }
2588
Andy Flemingad347bb2008-10-30 16:41:01 -05002589 /* Select the card, and put it into Transfer Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00002590 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2591 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargav4a32fba2011-10-05 03:13:23 +00002592 cmd.resp_type = MMC_RSP_R1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00002593 cmd.cmdarg = mmc->rca << 16;
Thomas Chou1254c3d2010-12-24 13:12:21 +00002594 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05002595
Thomas Chou1254c3d2010-12-24 13:12:21 +00002596 if (err)
2597 return err;
2598 }
Andy Flemingad347bb2008-10-30 16:41:01 -05002599
Lei Wenea526762011-06-22 17:03:31 +00002600 /*
2601 * For SD, its erase group is always one sector
2602 */
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002603#if CONFIG_IS_ENABLED(MMC_WRITE)
Lei Wenea526762011-06-22 17:03:31 +00002604 mmc->erase_grp_size = 1;
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002605#endif
Lei Wen31b99802011-05-02 16:26:26 +00002606 mmc->part_config = MMCPART_NOAVAILABLE;
Diego Santa Cruza7a75992014-12-23 10:50:27 +01002607
Jean-Jacques Hibloted9506b2017-09-21 16:29:51 +02002608 err = mmc_startup_v4(mmc);
Jean-Jacques Hiblote84459c2017-09-21 16:29:50 +02002609 if (err)
2610 return err;
Sukumar Ghorai232293c2010-09-20 18:29:29 +05302611
Simon Glasse5db1152016-05-01 13:52:35 -06002612 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
Stephen Warrene315ae82013-06-11 15:14:01 -06002613 if (err)
2614 return err;
2615
Marek Vasuta318a7a2018-04-15 00:37:11 +02002616#if CONFIG_IS_ENABLED(MMC_TINY)
2617 mmc_set_clock(mmc, mmc->legacy_speed, false);
Faiz Abbas01db77e2020-02-26 13:44:32 +05302618 mmc_select_mode(mmc, MMC_LEGACY);
Marek Vasuta318a7a2018-04-15 00:37:11 +02002619 mmc_set_bus_width(mmc, 1);
2620#else
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02002621 if (IS_SD(mmc)) {
2622 err = sd_get_capabilities(mmc);
2623 if (err)
2624 return err;
2625 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2626 } else {
2627 err = mmc_get_capabilities(mmc);
2628 if (err)
2629 return err;
Masahiro Yamadabf1f25c2020-01-23 14:31:12 +09002630 err = mmc_select_mode_and_width(mmc, mmc->card_caps);
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02002631 }
Marek Vasuta318a7a2018-04-15 00:37:11 +02002632#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05002633 if (err)
2634 return err;
2635
Jean-Jacques Hiblot3d30972b2017-09-21 16:30:09 +02002636 mmc->best_mode = mmc->selected_mode;
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00002637
Andrew Gabbasov532663b2014-12-01 06:59:11 -06002638 /* Fix the block length for DDR mode */
2639 if (mmc->ddr_mode) {
2640 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002641#if CONFIG_IS_ENABLED(MMC_WRITE)
Andrew Gabbasov532663b2014-12-01 06:59:11 -06002642 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Jean-Jacques Hiblot27edffe2018-01-04 15:23:34 +01002643#endif
Andrew Gabbasov532663b2014-12-01 06:59:11 -06002644 }
2645
Andy Flemingad347bb2008-10-30 16:41:01 -05002646 /* fill in device description */
Simon Glasse5db1152016-05-01 13:52:35 -06002647 bdesc = mmc_get_blk_desc(mmc);
2648 bdesc->lun = 0;
2649 bdesc->hwpart = 0;
2650 bdesc->type = 0;
2651 bdesc->blksz = mmc->read_bl_len;
2652 bdesc->log2blksz = LOG2(bdesc->blksz);
2653 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsd67754f2015-12-04 23:27:40 +01002654#if !defined(CONFIG_SPL_BUILD) || \
2655 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
Simon Glass7611ac62019-09-25 08:56:27 -06002656 !CONFIG_IS_ENABLED(USE_TINY_PRINTF))
Simon Glasse5db1152016-05-01 13:52:35 -06002657 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
Taylor Hutt7367ec22012-10-20 17:15:59 +00002658 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2659 (mmc->cid[3] >> 16) & 0xffff);
Simon Glasse5db1152016-05-01 13:52:35 -06002660 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
Taylor Hutt7367ec22012-10-20 17:15:59 +00002661 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2662 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2663 (mmc->cid[2] >> 24) & 0xff);
Simon Glasse5db1152016-05-01 13:52:35 -06002664 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
Taylor Hutt7367ec22012-10-20 17:15:59 +00002665 (mmc->cid[2] >> 16) & 0xf);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01002666#else
Simon Glasse5db1152016-05-01 13:52:35 -06002667 bdesc->vendor[0] = 0;
2668 bdesc->product[0] = 0;
2669 bdesc->revision[0] = 0;
Paul Burton6a7c5ba2013-09-04 16:12:25 +01002670#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05002671
Andre Przywara17798042018-12-17 10:05:45 +00002672#if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT))
2673 part_init(bdesc);
2674#endif
2675
Andy Flemingad347bb2008-10-30 16:41:01 -05002676 return 0;
2677}
2678
Kim Phillips87ea3892012-10-29 13:34:43 +00002679static int mmc_send_if_cond(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05002680{
2681 struct mmc_cmd cmd;
2682 int err;
2683
2684 cmd.cmdidx = SD_CMD_SEND_IF_COND;
2685 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02002686 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Flemingad347bb2008-10-30 16:41:01 -05002687 cmd.resp_type = MMC_RSP_R7;
Andy Flemingad347bb2008-10-30 16:41:01 -05002688
2689 err = mmc_send_cmd(mmc, &cmd, NULL);
2690
2691 if (err)
2692 return err;
2693
Rabin Vincentb6eed942009-04-05 13:30:56 +05302694 if ((cmd.response[0] & 0xff) != 0xaa)
Jaehoon Chung7825d202016-07-19 16:33:36 +09002695 return -EOPNOTSUPP;
Andy Flemingad347bb2008-10-30 16:41:01 -05002696 else
2697 mmc->version = SD_VERSION_2;
2698
2699 return 0;
2700}
2701
Simon Glass5f4bd8c2017-07-04 13:31:19 -06002702#if !CONFIG_IS_ENABLED(DM_MMC)
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01002703/* board-specific MMC power initializations. */
2704__weak void board_mmc_power_init(void)
2705{
2706}
Simon Glass833b80d2017-04-22 19:10:56 -06002707#endif
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01002708
Peng Fan15305962016-10-11 15:08:43 +08002709static int mmc_power_init(struct mmc *mmc)
2710{
Simon Glass5f4bd8c2017-07-04 13:31:19 -06002711#if CONFIG_IS_ENABLED(DM_MMC)
Jean-Jacques Hiblota49ffa12017-09-21 16:29:48 +02002712#if CONFIG_IS_ENABLED(DM_REGULATOR)
Peng Fan15305962016-10-11 15:08:43 +08002713 int ret;
2714
2715 ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
Jean-Jacques Hiblota49ffa12017-09-21 16:29:48 +02002716 &mmc->vmmc_supply);
2717 if (ret)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002718 pr_debug("%s: No vmmc supply\n", mmc->dev->name);
Jean-Jacques Hiblota49ffa12017-09-21 16:29:48 +02002719
2720 ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2721 &mmc->vqmmc_supply);
2722 if (ret)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002723 pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002724#endif
2725#else /* !CONFIG_DM_MMC */
2726 /*
2727 * Driver model should use a regulator, as above, rather than calling
2728 * out to board code.
2729 */
2730 board_mmc_power_init();
2731#endif
2732 return 0;
2733}
2734
2735/*
2736 * put the host in the initial state:
2737 * - turn on Vdd (card power supply)
2738 * - configure the bus width and clock to minimal values
2739 */
2740static void mmc_set_initial_state(struct mmc *mmc)
2741{
2742 int err;
2743
2744 /* First try to set 3.3V. If it fails set to 1.8V */
2745 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2746 if (err != 0)
2747 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2748 if (err != 0)
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01002749 pr_warn("mmc: failed to set signal voltage\n");
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002750
2751 mmc_select_mode(mmc, MMC_LEGACY);
2752 mmc_set_bus_width(mmc, 1);
Jaehoon Chung239cb2f2018-01-26 19:25:29 +09002753 mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002754}
Peng Fan15305962016-10-11 15:08:43 +08002755
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002756static int mmc_power_on(struct mmc *mmc)
2757{
2758#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
Jean-Jacques Hiblota49ffa12017-09-21 16:29:48 +02002759 if (mmc->vmmc_supply) {
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002760 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2761
Jaehoon Chungc71c95c2020-11-06 20:30:41 +09002762 if (ret && ret != -EACCES) {
Jaehoon Chungad9f7ce2020-11-17 07:04:59 +09002763 printf("Error enabling VMMC supply : %d\n", ret);
Jean-Jacques Hiblota49ffa12017-09-21 16:29:48 +02002764 return ret;
2765 }
Peng Fan15305962016-10-11 15:08:43 +08002766 }
2767#endif
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002768 return 0;
2769}
2770
2771static int mmc_power_off(struct mmc *mmc)
2772{
Jaehoon Chung239cb2f2018-01-26 19:25:29 +09002773 mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002774#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2775 if (mmc->vmmc_supply) {
2776 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2777
Jaehoon Chungc71c95c2020-11-06 20:30:41 +09002778 if (ret && ret != -EACCES) {
Jaehoon Chungad9f7ce2020-11-17 07:04:59 +09002779 pr_debug("Error disabling VMMC supply : %d\n", ret);
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002780 return ret;
2781 }
2782 }
Simon Glass833b80d2017-04-22 19:10:56 -06002783#endif
Peng Fan15305962016-10-11 15:08:43 +08002784 return 0;
2785}
2786
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002787static int mmc_power_cycle(struct mmc *mmc)
2788{
2789 int ret;
2790
2791 ret = mmc_power_off(mmc);
2792 if (ret)
2793 return ret;
Yann Gautier6f558332019-09-19 17:56:12 +02002794
2795 ret = mmc_host_power_cycle(mmc);
2796 if (ret)
2797 return ret;
2798
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002799 /*
2800 * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2801 * to be on the safer side.
2802 */
2803 udelay(2000);
2804 return mmc_power_on(mmc);
2805}
2806
Pali Rohár7c639622021-07-14 16:37:29 +02002807int mmc_get_op_cond(struct mmc *mmc, bool quiet)
Andy Flemingad347bb2008-10-30 16:41:01 -05002808{
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02002809 bool uhs_en = supports_uhs(mmc->cfg->host_caps);
Macpaul Lin028bde12011-11-14 23:35:39 +00002810 int err;
Andy Flemingad347bb2008-10-30 16:41:01 -05002811
Lei Wen31b99802011-05-02 16:26:26 +00002812 if (mmc->has_init)
2813 return 0;
2814
Peng Fan15305962016-10-11 15:08:43 +08002815 err = mmc_power_init(mmc);
2816 if (err)
2817 return err;
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01002818
Kishon Vijay Abraham I07baaa62017-09-21 16:30:10 +02002819#ifdef CONFIG_MMC_QUIRKS
2820 mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
Joel Johnson5ea041b2020-01-11 09:08:14 -07002821 MMC_QUIRK_RETRY_SEND_CID |
2822 MMC_QUIRK_RETRY_APP_CMD;
Kishon Vijay Abraham I07baaa62017-09-21 16:30:10 +02002823#endif
2824
Jean-Jacques Hiblotdc030fb2017-09-21 16:30:08 +02002825 err = mmc_power_cycle(mmc);
2826 if (err) {
2827 /*
2828 * if power cycling is not supported, we should not try
2829 * to use the UHS modes, because we wouldn't be able to
2830 * recover from an error during the UHS initialization.
2831 */
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002832 pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
Jean-Jacques Hiblotdc030fb2017-09-21 16:30:08 +02002833 uhs_en = false;
2834 mmc->host_caps &= ~UHS_CAPS;
2835 err = mmc_power_on(mmc);
2836 }
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002837 if (err)
2838 return err;
2839
Simon Glasseba48f92017-07-29 11:35:31 -06002840#if CONFIG_IS_ENABLED(DM_MMC)
Yangbo Luc46f5d72020-09-01 16:57:59 +08002841 /*
2842 * Re-initialization is needed to clear old configuration for
2843 * mmc rescan.
2844 */
2845 err = mmc_reinit(mmc);
Simon Glass394dfc02016-06-12 23:30:22 -06002846#else
Pantelis Antoniouc9e75912014-02-26 19:28:45 +02002847 /* made sure it's not NULL earlier */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02002848 err = mmc->cfg->ops->init(mmc);
Yangbo Luc46f5d72020-09-01 16:57:59 +08002849#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05002850 if (err)
2851 return err;
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06002852 mmc->ddr_mode = 0;
Kishon Vijay Abraham I4afb12b2017-09-21 16:30:00 +02002853
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02002854retry:
Kishon Vijay Abraham I80b87e12017-09-21 16:30:02 +02002855 mmc_set_initial_state(mmc);
Jean-Jacques Hiblot5f23d872017-09-21 16:30:01 +02002856
Andy Flemingad347bb2008-10-30 16:41:01 -05002857 /* Reset the Card */
2858 err = mmc_go_idle(mmc);
2859
2860 if (err)
2861 return err;
2862
Marcel Ziswilerb2b7fc82019-05-20 02:44:53 +02002863 /* The internal partition reset to user partition(0) at every CMD0 */
Simon Glasse5db1152016-05-01 13:52:35 -06002864 mmc_get_blk_desc(mmc)->hwpart = 0;
Lei Wen31b99802011-05-02 16:26:26 +00002865
Andy Flemingad347bb2008-10-30 16:41:01 -05002866 /* Test for SD version 2 */
Macpaul Lin028bde12011-11-14 23:35:39 +00002867 err = mmc_send_if_cond(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05002868
Andy Flemingad347bb2008-10-30 16:41:01 -05002869 /* Now try to get the SD card's operating condition */
Jean-Jacques Hiblotf4d5b3e2017-09-21 16:30:07 +02002870 err = sd_send_op_cond(mmc, uhs_en);
2871 if (err && uhs_en) {
2872 uhs_en = false;
2873 mmc_power_cycle(mmc);
2874 goto retry;
2875 }
Andy Flemingad347bb2008-10-30 16:41:01 -05002876
2877 /* If the command timed out, we check for an MMC card */
Jaehoon Chung7825d202016-07-19 16:33:36 +09002878 if (err == -ETIMEDOUT) {
Andy Flemingad347bb2008-10-30 16:41:01 -05002879 err = mmc_send_op_cond(mmc);
2880
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -05002881 if (err) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +01002882#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Pali Rohár7c639622021-07-14 16:37:29 +02002883 if (!quiet)
2884 pr_err("Card did not respond to voltage select! : %d\n", err);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01002885#endif
Jaehoon Chung7825d202016-07-19 16:33:36 +09002886 return -EOPNOTSUPP;
Andy Flemingad347bb2008-10-30 16:41:01 -05002887 }
2888 }
2889
Jon Nettleton2663fe42018-06-11 15:26:19 +03002890 return err;
2891}
2892
2893int mmc_start_init(struct mmc *mmc)
2894{
2895 bool no_card;
2896 int err = 0;
2897
2898 /*
2899 * all hosts are capable of 1 bit bus-width and able to use the legacy
2900 * timings.
2901 */
Faiz Abbas01db77e2020-02-26 13:44:32 +05302902 mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(MMC_LEGACY) |
Aswath Govindrajubb5b9fe2021-08-13 23:04:41 +05302903 MMC_MODE_1BIT;
2904
2905 if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET)) {
2906 if (mmc->user_speed_mode != MMC_MODES_END) {
2907 int i;
2908 /* set host caps */
2909 if (mmc->host_caps & MMC_CAP(mmc->user_speed_mode)) {
2910 /* Remove all existing speed capabilities */
2911 for (i = MMC_LEGACY; i < MMC_MODES_END; i++)
2912 mmc->host_caps &= ~MMC_CAP(i);
2913 mmc->host_caps |= (MMC_CAP(mmc->user_speed_mode)
2914 | MMC_CAP(MMC_LEGACY) |
2915 MMC_MODE_1BIT);
2916 } else {
2917 pr_err("bus_mode requested is not supported\n");
2918 return -EINVAL;
2919 }
2920 }
2921 }
Faiz Abbasf6fd4ec2020-02-26 13:44:30 +05302922#if CONFIG_IS_ENABLED(DM_MMC)
2923 mmc_deferred_probe(mmc);
2924#endif
Jon Nettleton2663fe42018-06-11 15:26:19 +03002925#if !defined(CONFIG_MMC_BROKEN_CD)
Jon Nettleton2663fe42018-06-11 15:26:19 +03002926 no_card = mmc_getcd(mmc) == 0;
2927#else
2928 no_card = 0;
2929#endif
2930#if !CONFIG_IS_ENABLED(DM_MMC)
Baruch Siach0448ce62019-07-22 15:52:12 +03002931 /* we pretend there's no card when init is NULL */
Jon Nettleton2663fe42018-06-11 15:26:19 +03002932 no_card = no_card || (mmc->cfg->ops->init == NULL);
2933#endif
2934 if (no_card) {
2935 mmc->has_init = 0;
2936#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2937 pr_err("MMC: no card present\n");
2938#endif
2939 return -ENOMEDIUM;
2940 }
2941
Pali Rohár7c639622021-07-14 16:37:29 +02002942 err = mmc_get_op_cond(mmc, false);
Jon Nettleton2663fe42018-06-11 15:26:19 +03002943
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -05002944 if (!err)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002945 mmc->init_in_progress = 1;
2946
2947 return err;
2948}
2949
2950static int mmc_complete_init(struct mmc *mmc)
2951{
2952 int err = 0;
2953
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -05002954 mmc->init_in_progress = 0;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002955 if (mmc->op_cond_pending)
2956 err = mmc_complete_op_cond(mmc);
2957
2958 if (!err)
2959 err = mmc_startup(mmc);
Lei Wen31b99802011-05-02 16:26:26 +00002960 if (err)
2961 mmc->has_init = 0;
2962 else
2963 mmc->has_init = 1;
2964 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05002965}
2966
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002967int mmc_init(struct mmc *mmc)
2968{
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -05002969 int err = 0;
Vipul Kumardbad7b42018-05-03 12:20:54 +05302970 __maybe_unused ulong start;
Simon Glass5f4bd8c2017-07-04 13:31:19 -06002971#if CONFIG_IS_ENABLED(DM_MMC)
Simon Glass59bc6f22016-05-01 13:52:41 -06002972 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002973
Simon Glass59bc6f22016-05-01 13:52:41 -06002974 upriv->mmc = mmc;
2975#endif
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002976 if (mmc->has_init)
2977 return 0;
Mateusz Zalegada351782014-04-29 20:15:30 +02002978
2979 start = get_timer(0);
2980
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002981 if (!mmc->init_in_progress)
2982 err = mmc_start_init(mmc);
2983
Andrew Gabbasov3a669bc2015-03-19 07:44:07 -05002984 if (!err)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002985 err = mmc_complete_init(mmc);
Jagan Teki9bee2b52017-01-10 11:18:43 +01002986 if (err)
Masahiro Yamadaf97b1482018-01-28 19:11:42 +09002987 pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
Jagan Teki9bee2b52017-01-10 11:18:43 +01002988
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00002989 return err;
2990}
2991
Marek Vasuta4773fc2019-01-29 04:45:51 +01002992#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
2993 CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2994 CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2995int mmc_deinit(struct mmc *mmc)
2996{
2997 u32 caps_filtered;
2998
2999 if (!mmc->has_init)
3000 return 0;
3001
3002 if (IS_SD(mmc)) {
3003 caps_filtered = mmc->card_caps &
3004 ~(MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) |
3005 MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_DDR50) |
3006 MMC_CAP(UHS_SDR104));
3007
3008 return sd_select_mode_and_width(mmc, caps_filtered);
3009 } else {
3010 caps_filtered = mmc->card_caps &
Ye Li3679e802021-08-17 17:20:34 +08003011 ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_400_ES));
Marek Vasuta4773fc2019-01-29 04:45:51 +01003012
3013 return mmc_select_mode_and_width(mmc, caps_filtered);
3014 }
3015}
3016#endif
3017
Markus Niebel03951412013-12-16 13:40:46 +01003018int mmc_set_dsr(struct mmc *mmc, u16 val)
3019{
3020 mmc->dsr = val;
3021 return 0;
3022}
3023
Jeroen Hofstee47726302014-07-10 22:46:28 +02003024/* CPU-specific MMC initializations */
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +09003025__weak int cpu_mmc_init(struct bd_info *bis)
Andy Flemingad347bb2008-10-30 16:41:01 -05003026{
3027 return -1;
3028}
3029
Jeroen Hofstee47726302014-07-10 22:46:28 +02003030/* board-specific MMC initializations. */
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +09003031__weak int board_mmc_init(struct bd_info *bis)
Jeroen Hofstee47726302014-07-10 22:46:28 +02003032{
3033 return -1;
3034}
Andy Flemingad347bb2008-10-30 16:41:01 -05003035
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00003036void mmc_set_preinit(struct mmc *mmc, int preinit)
3037{
3038 mmc->preinit = preinit;
3039}
3040
Faiz Abbasb3857fd2018-02-12 19:35:24 +05303041#if CONFIG_IS_ENABLED(DM_MMC)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +09003042static int mmc_probe(struct bd_info *bis)
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003043{
Simon Glass547cb342015-12-29 05:22:49 -07003044 int ret, i;
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003045 struct uclass *uc;
Simon Glass547cb342015-12-29 05:22:49 -07003046 struct udevice *dev;
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003047
3048 ret = uclass_get(UCLASS_MMC, &uc);
3049 if (ret)
3050 return ret;
3051
Simon Glass547cb342015-12-29 05:22:49 -07003052 /*
3053 * Try to add them in sequence order. Really with driver model we
3054 * should allow holes, but the current MMC list does not allow that.
3055 * So if we request 0, 1, 3 we will get 0, 1, 2.
3056 */
3057 for (i = 0; ; i++) {
3058 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
3059 if (ret == -ENODEV)
3060 break;
3061 }
3062 uclass_foreach_dev(dev, uc) {
3063 ret = device_probe(dev);
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003064 if (ret)
Jean-Jacques Hiblot678b6082017-11-30 17:44:00 +01003065 pr_err("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003066 }
3067
3068 return 0;
3069}
3070#else
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +09003071static int mmc_probe(struct bd_info *bis)
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003072{
3073 if (board_mmc_init(bis) < 0)
3074 cpu_mmc_init(bis);
3075
3076 return 0;
3077}
3078#endif
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00003079
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +09003080int mmc_initialize(struct bd_info *bis)
Andy Flemingad347bb2008-10-30 16:41:01 -05003081{
Daniel Kochmański13df57b2015-05-29 16:55:43 +02003082 static int initialized = 0;
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003083 int ret;
Daniel Kochmański13df57b2015-05-29 16:55:43 +02003084 if (initialized) /* Avoid initializing mmc multiple times */
3085 return 0;
3086 initialized = 1;
3087
Simon Glass5f4bd8c2017-07-04 13:31:19 -06003088#if !CONFIG_IS_ENABLED(BLK)
Marek Vasutf537e392016-12-01 02:06:33 +01003089#if !CONFIG_IS_ENABLED(MMC_TINY)
Simon Glasse5db1152016-05-01 13:52:35 -06003090 mmc_list_init();
3091#endif
Marek Vasutf537e392016-12-01 02:06:33 +01003092#endif
Sjoerd Simonsdf8aa522015-08-30 16:55:45 -06003093 ret = mmc_probe(bis);
3094 if (ret)
3095 return ret;
Andy Flemingad347bb2008-10-30 16:41:01 -05003096
Ying Zhang9ff70262013-08-16 15:16:11 +08003097#ifndef CONFIG_SPL_BUILD
Andy Flemingad347bb2008-10-30 16:41:01 -05003098 print_mmc_devices(',');
Ying Zhang9ff70262013-08-16 15:16:11 +08003099#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05003100
Simon Glasse5db1152016-05-01 13:52:35 -06003101 mmc_do_preinit();
Andy Flemingad347bb2008-10-30 16:41:01 -05003102 return 0;
3103}
Tomas Melinc17dae52016-11-25 11:01:03 +02003104
Lokesh Vutlac59b41c2019-09-09 14:40:36 +05303105#if CONFIG_IS_ENABLED(DM_MMC)
3106int mmc_init_device(int num)
3107{
3108 struct udevice *dev;
3109 struct mmc *m;
3110 int ret;
3111
Aswath Govindraju57e2ccb2021-03-25 12:48:47 +05303112 if (uclass_get_device_by_seq(UCLASS_MMC, num, &dev)) {
3113 ret = uclass_get_device(UCLASS_MMC, num, &dev);
3114 if (ret)
3115 return ret;
3116 }
Lokesh Vutlac59b41c2019-09-09 14:40:36 +05303117
3118 m = mmc_get_mmc_dev(dev);
3119 if (!m)
3120 return 0;
Venkatesh Yadav Abbarapu6738fcb2022-09-29 10:22:49 +05303121
3122 /* Initialising user set speed mode */
3123 m->user_speed_mode = MMC_MODES_END;
3124
Lokesh Vutlac59b41c2019-09-09 14:40:36 +05303125 if (m->preinit)
3126 mmc_start_init(m);
3127
3128 return 0;
3129}
3130#endif
3131
Tomas Melinc17dae52016-11-25 11:01:03 +02003132#ifdef CONFIG_CMD_BKOPS_ENABLE
Marek Vasutefdeed62023-01-05 15:19:08 +01003133int mmc_set_bkops_enable(struct mmc *mmc, bool autobkops, bool enable)
Tomas Melinc17dae52016-11-25 11:01:03 +02003134{
3135 int err;
Marek Vasutefdeed62023-01-05 15:19:08 +01003136 u32 bit = autobkops ? BIT(1) : BIT(0);
Tomas Melinc17dae52016-11-25 11:01:03 +02003137 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
3138
3139 err = mmc_send_ext_csd(mmc, ext_csd);
3140 if (err) {
3141 puts("Could not get ext_csd register values\n");
3142 return err;
3143 }
3144
3145 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
3146 puts("Background operations not supported on device\n");
3147 return -EMEDIUMTYPE;
3148 }
3149
Marek Vasutefdeed62023-01-05 15:19:08 +01003150 if (enable && (ext_csd[EXT_CSD_BKOPS_EN] & bit)) {
Tomas Melinc17dae52016-11-25 11:01:03 +02003151 puts("Background operations already enabled\n");
3152 return 0;
3153 }
3154
Marek Vasutefdeed62023-01-05 15:19:08 +01003155 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN,
3156 enable ? bit : 0);
Tomas Melinc17dae52016-11-25 11:01:03 +02003157 if (err) {
Marek Vasutefdeed62023-01-05 15:19:08 +01003158 printf("Failed to %sable manual background operations\n",
3159 enable ? "en" : "dis");
Tomas Melinc17dae52016-11-25 11:01:03 +02003160 return err;
3161 }
3162
Marek Vasutefdeed62023-01-05 15:19:08 +01003163 printf("%sabled %s background operations\n",
3164 enable ? "En" : "Dis", autobkops ? "auto" : "manual");
Tomas Melinc17dae52016-11-25 11:01:03 +02003165
3166 return 0;
3167}
3168#endif
David Woodhouse49fee032020-08-04 10:05:46 +01003169
3170__weak int mmc_get_env_dev(void)
3171{
3172#ifdef CONFIG_SYS_MMC_ENV_DEV
3173 return CONFIG_SYS_MMC_ENV_DEV;
3174#else
3175 return 0;
3176#endif
3177}