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git01.mediatek.com / filogic / uboot / 8e4f3ff9da5b3be6437b3f8e7996701443708ccc / . / arch / powerpc / cpu / mpc85xx / t4240_ids.c
blob: 1a3cb33987426878d718b24cd1f15bf9fd499dc9 [file] [log] [blame]
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]4 * SPDX-License-Identifier: GPL-2.0+
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]5 */
6
7#include <common.h>
8#include <asm/fsl_portals.h>
9#include <asm/fsl_liodn.h>
10
11#ifdef CONFIG_SYS_DPAA_QBMAN
12struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
13 /* dqrr liodn, frame data liodn, liodn off, sdest */
14 SET_QP_INFO(1, 27, 1, 0),
15 SET_QP_INFO(2, 28, 1, 0),
16 SET_QP_INFO(3, 29, 1, 1),
17 SET_QP_INFO(4, 30, 1, 1),
18 SET_QP_INFO(5, 31, 1, 2),
19 SET_QP_INFO(6, 32, 1, 2),
20 SET_QP_INFO(7, 33, 1, 3),
21 SET_QP_INFO(8, 34, 1, 3),
22 SET_QP_INFO(9, 35, 1, 4),
23 SET_QP_INFO(10, 36, 1, 4),
24 SET_QP_INFO(11, 37, 1, 5),
25 SET_QP_INFO(12, 38, 1, 5),
26 SET_QP_INFO(13, 39, 1, 6),
27 SET_QP_INFO(14, 40, 1, 6),
28 SET_QP_INFO(15, 41, 1, 7),
29 SET_QP_INFO(16, 42, 1, 7),
30 SET_QP_INFO(17, 43, 1, 8),
31 SET_QP_INFO(18, 44, 1, 8),
32 SET_QP_INFO(19, 45, 1, 9),
33 SET_QP_INFO(20, 46, 1, 9),
34 SET_QP_INFO(21, 47, 1, 10),
35 SET_QP_INFO(22, 48, 1, 10),
36 SET_QP_INFO(23, 49, 1, 11),
37 SET_QP_INFO(24, 50, 1, 11),
38 SET_QP_INFO(65, 89, 1, 0),
39 SET_QP_INFO(66, 90, 1, 0),
40 SET_QP_INFO(67, 91, 1, 1),
41 SET_QP_INFO(68, 92, 1, 1),
42 SET_QP_INFO(69, 93, 1, 2),
43 SET_QP_INFO(70, 94, 1, 2),
44 SET_QP_INFO(71, 95, 1, 3),
45 SET_QP_INFO(72, 96, 1, 3),
46 SET_QP_INFO(73, 97, 1, 4),
47 SET_QP_INFO(74, 98, 1, 4),
48 SET_QP_INFO(75, 99, 1, 5),
49 SET_QP_INFO(76, 100, 1, 5),
50 SET_QP_INFO(77, 101, 1, 6),
51 SET_QP_INFO(78, 102, 1, 6),
52 SET_QP_INFO(79, 103, 1, 7),
53 SET_QP_INFO(80, 104, 1, 7),
54 SET_QP_INFO(81, 105, 1, 8),
55 SET_QP_INFO(82, 106, 1, 8),
56 SET_QP_INFO(83, 107, 1, 9),
57 SET_QP_INFO(84, 108, 1, 9),
58 SET_QP_INFO(85, 109, 1, 10),
59 SET_QP_INFO(86, 110, 1, 10),
60 SET_QP_INFO(87, 111, 1, 11),
61 SET_QP_INFO(88, 112, 1, 11),
62 SET_QP_INFO(25, 51, 1, 0),
63 SET_QP_INFO(26, 52, 1, 0),
64};
65#endif
66
Chunhe Lan8e4f3ff2014-04-14 18:42:06 +0800[diff] [blame^]67#ifdef CONFIG_SYS_SRIO
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]68struct srio_liodn_id_table srio_liodn_tbl[] = {
Liu Gangd5eca7e2013-06-25 18:12:14 +0800[diff] [blame]69 SET_SRIO_LIODN_BASE(1, 307),
70 SET_SRIO_LIODN_BASE(2, 387),
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]71};
72int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
Chunhe Lan8e4f3ff2014-04-14 18:42:06 +0800[diff] [blame^]73#endif
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]74
75struct liodn_id_table liodn_tbl[] = {
76#ifdef CONFIG_SYS_DPAA_QBMAN
77 SET_QMAN_LIODN(62),
78 SET_BMAN_LIODN(63),
79#endif
80
81 SET_SDHC_LIODN(1, 552),
82
83 SET_PME_LIODN(117),
84
85 SET_USB_LIODN(1, "fsl-usb2-mph", 553),
86 SET_USB_LIODN(2, "fsl-usb2-dr", 554),
87
88 SET_SATA_LIODN(1, 555),
89 SET_SATA_LIODN(2, 556),
90
Laurentiu TUDOR4a6f7102013-10-23 15:20:16 +0300[diff] [blame]91 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
92 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
93 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 308),
94 SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 388),
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]95
96 SET_DMA_LIODN(1, 147),
97 SET_DMA_LIODN(2, 227),
98
99 SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
100 SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
101 SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
102 SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
103
104#ifdef CONFIG_SYS_PMAN
105 SET_PMAN_LIODN(1, 513),
106 SET_PMAN_LIODN(2, 514),
107 SET_PMAN_LIODN(3, 515),
108#endif
109
110 /* SET_NEXUS_LIODN(557), -- not yet implemented */
111};
112int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
113
114#ifdef CONFIG_SYS_DPAA_FMAN
115struct liodn_id_table fman1_liodn_tbl[] = {
116 SET_FMAN_RX_1G_LIODN(1, 0, 88),
117 SET_FMAN_RX_1G_LIODN(1, 1, 89),
118 SET_FMAN_RX_1G_LIODN(1, 2, 90),
119 SET_FMAN_RX_1G_LIODN(1, 3, 91),
120 SET_FMAN_RX_1G_LIODN(1, 4, 92),
121 SET_FMAN_RX_1G_LIODN(1, 5, 93),
122 SET_FMAN_RX_10G_LIODN(1, 0, 94),
123 SET_FMAN_RX_10G_LIODN(1, 1, 95),
124};
125int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
126#if (CONFIG_SYS_NUM_FMAN == 2)
127struct liodn_id_table fman2_liodn_tbl[] = {
128 SET_FMAN_RX_1G_LIODN(2, 0, 88),
129 SET_FMAN_RX_1G_LIODN(2, 1, 89),
130 SET_FMAN_RX_1G_LIODN(2, 2, 90),
131 SET_FMAN_RX_1G_LIODN(2, 3, 91),
132 SET_FMAN_RX_1G_LIODN(2, 4, 92),
133 SET_FMAN_RX_1G_LIODN(2, 5, 93),
134 SET_FMAN_RX_10G_LIODN(2, 0, 94),
135 SET_FMAN_RX_10G_LIODN(2, 1, 95),
136};
137int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);
138#endif
139#endif
140
141struct liodn_id_table sec_liodn_tbl[] = {
142 SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
143 SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
144 SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
145 SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
146 SET_SEC_RTIC_LIODN_ENTRY(a, 453),
147 SET_SEC_RTIC_LIODN_ENTRY(b, 549),
148 SET_SEC_RTIC_LIODN_ENTRY(c, 550),
149 SET_SEC_RTIC_LIODN_ENTRY(d, 551),
150 SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
151 SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
152 SET_SEC_DECO_LIODN_ENTRY(2, 543, 612),
153 SET_SEC_DECO_LIODN_ENTRY(3, 544, 613),
154 SET_SEC_DECO_LIODN_ENTRY(4, 545, 614),
155 SET_SEC_DECO_LIODN_ENTRY(5, 546, 615),
156 SET_SEC_DECO_LIODN_ENTRY(6, 547, 616),
157 SET_SEC_DECO_LIODN_ENTRY(7, 548, 617),
158};
159int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
160
161#ifdef CONFIG_SYS_DPAA_RMAN
162struct liodn_id_table rman_liodn_tbl[] = {
163 /* Set RMan block 0-3 liodn offset */
Minghuan Lian621de442013-07-03 18:32:41 +0800[diff] [blame]164 SET_RMAN_LIODN(0, 6),
165 SET_RMAN_LIODN(1, 7),
166 SET_RMAN_LIODN(2, 8),
167 SET_RMAN_LIODN(3, 9),
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]168};
169int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
170#endif
171
172struct liodn_id_table liodn_bases[] = {
173#ifdef CONFIG_SYS_DPAA_DCE
174 [FSL_HW_PORTAL_DCE] = SET_LIODN_BASE_2(618, 694),
175#endif
176 [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(462, 558),
177#ifdef CONFIG_SYS_DPAA_FMAN
178 [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
179#if (CONFIG_SYS_NUM_FMAN == 2)
180 [FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(1069),
181#endif
182#endif
183#ifdef CONFIG_SYS_DPAA_PME
184 [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(770, 846),
185#endif
186#ifdef CONFIG_SYS_DPAA_RMAN
187 [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922),
188#endif
189};