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git01.mediatek.com / filogic / uboot / d79de1d950d4779583a97be8eaab135d2bca3565 / . / arch / powerpc / cpu / mpc85xx / t4240_ids.c
blob: e173cb5f9572cf3346ce004993f30084695dd64d [file] [log] [blame]
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame^]4 * SPDX-License-Identifier: GPL-2.0+
York Sun9941a222012-10-08 07:44:19 +0000[diff] [blame]5 */
6
7#include <common.h>
8#include <asm/fsl_portals.h>
9#include <asm/fsl_liodn.h>
10
11#ifdef CONFIG_SYS_DPAA_QBMAN
12struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
13 /* dqrr liodn, frame data liodn, liodn off, sdest */
14 SET_QP_INFO(1, 27, 1, 0),
15 SET_QP_INFO(2, 28, 1, 0),
16 SET_QP_INFO(3, 29, 1, 1),
17 SET_QP_INFO(4, 30, 1, 1),
18 SET_QP_INFO(5, 31, 1, 2),
19 SET_QP_INFO(6, 32, 1, 2),
20 SET_QP_INFO(7, 33, 1, 3),
21 SET_QP_INFO(8, 34, 1, 3),
22 SET_QP_INFO(9, 35, 1, 4),
23 SET_QP_INFO(10, 36, 1, 4),
24 SET_QP_INFO(11, 37, 1, 5),
25 SET_QP_INFO(12, 38, 1, 5),
26 SET_QP_INFO(13, 39, 1, 6),
27 SET_QP_INFO(14, 40, 1, 6),
28 SET_QP_INFO(15, 41, 1, 7),
29 SET_QP_INFO(16, 42, 1, 7),
30 SET_QP_INFO(17, 43, 1, 8),
31 SET_QP_INFO(18, 44, 1, 8),
32 SET_QP_INFO(19, 45, 1, 9),
33 SET_QP_INFO(20, 46, 1, 9),
34 SET_QP_INFO(21, 47, 1, 10),
35 SET_QP_INFO(22, 48, 1, 10),
36 SET_QP_INFO(23, 49, 1, 11),
37 SET_QP_INFO(24, 50, 1, 11),
38 SET_QP_INFO(65, 89, 1, 0),
39 SET_QP_INFO(66, 90, 1, 0),
40 SET_QP_INFO(67, 91, 1, 1),
41 SET_QP_INFO(68, 92, 1, 1),
42 SET_QP_INFO(69, 93, 1, 2),
43 SET_QP_INFO(70, 94, 1, 2),
44 SET_QP_INFO(71, 95, 1, 3),
45 SET_QP_INFO(72, 96, 1, 3),
46 SET_QP_INFO(73, 97, 1, 4),
47 SET_QP_INFO(74, 98, 1, 4),
48 SET_QP_INFO(75, 99, 1, 5),
49 SET_QP_INFO(76, 100, 1, 5),
50 SET_QP_INFO(77, 101, 1, 6),
51 SET_QP_INFO(78, 102, 1, 6),
52 SET_QP_INFO(79, 103, 1, 7),
53 SET_QP_INFO(80, 104, 1, 7),
54 SET_QP_INFO(81, 105, 1, 8),
55 SET_QP_INFO(82, 106, 1, 8),
56 SET_QP_INFO(83, 107, 1, 9),
57 SET_QP_INFO(84, 108, 1, 9),
58 SET_QP_INFO(85, 109, 1, 10),
59 SET_QP_INFO(86, 110, 1, 10),
60 SET_QP_INFO(87, 111, 1, 11),
61 SET_QP_INFO(88, 112, 1, 11),
62 SET_QP_INFO(25, 51, 1, 0),
63 SET_QP_INFO(26, 52, 1, 0),
64};
65#endif
66
67struct srio_liodn_id_table srio_liodn_tbl[] = {
68 SET_SRIO_LIODN_1(1, 307),
69 SET_SRIO_LIODN_1(2, 387),
70};
71int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
72
73struct liodn_id_table liodn_tbl[] = {
74#ifdef CONFIG_SYS_DPAA_QBMAN
75 SET_QMAN_LIODN(62),
76 SET_BMAN_LIODN(63),
77#endif
78
79 SET_SDHC_LIODN(1, 552),
80
81 SET_PME_LIODN(117),
82
83 SET_USB_LIODN(1, "fsl-usb2-mph", 553),
84 SET_USB_LIODN(2, "fsl-usb2-dr", 554),
85
86 SET_SATA_LIODN(1, 555),
87 SET_SATA_LIODN(2, 556),
88
89 SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
90 SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 228),
91 SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 308),
92 SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 4, 388),
93
94 SET_DMA_LIODN(1, 147),
95 SET_DMA_LIODN(2, 227),
96
97 SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
98 SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
99 SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
100 SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
101
102#ifdef CONFIG_SYS_PMAN
103 SET_PMAN_LIODN(1, 513),
104 SET_PMAN_LIODN(2, 514),
105 SET_PMAN_LIODN(3, 515),
106#endif
107
108 /* SET_NEXUS_LIODN(557), -- not yet implemented */
109};
110int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
111
112#ifdef CONFIG_SYS_DPAA_FMAN
113struct liodn_id_table fman1_liodn_tbl[] = {
114 SET_FMAN_RX_1G_LIODN(1, 0, 88),
115 SET_FMAN_RX_1G_LIODN(1, 1, 89),
116 SET_FMAN_RX_1G_LIODN(1, 2, 90),
117 SET_FMAN_RX_1G_LIODN(1, 3, 91),
118 SET_FMAN_RX_1G_LIODN(1, 4, 92),
119 SET_FMAN_RX_1G_LIODN(1, 5, 93),
120 SET_FMAN_RX_10G_LIODN(1, 0, 94),
121 SET_FMAN_RX_10G_LIODN(1, 1, 95),
122};
123int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
124#if (CONFIG_SYS_NUM_FMAN == 2)
125struct liodn_id_table fman2_liodn_tbl[] = {
126 SET_FMAN_RX_1G_LIODN(2, 0, 88),
127 SET_FMAN_RX_1G_LIODN(2, 1, 89),
128 SET_FMAN_RX_1G_LIODN(2, 2, 90),
129 SET_FMAN_RX_1G_LIODN(2, 3, 91),
130 SET_FMAN_RX_1G_LIODN(2, 4, 92),
131 SET_FMAN_RX_1G_LIODN(2, 5, 93),
132 SET_FMAN_RX_10G_LIODN(2, 0, 94),
133 SET_FMAN_RX_10G_LIODN(2, 1, 95),
134};
135int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);
136#endif
137#endif
138
139struct liodn_id_table sec_liodn_tbl[] = {
140 SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
141 SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
142 SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
143 SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
144 SET_SEC_RTIC_LIODN_ENTRY(a, 453),
145 SET_SEC_RTIC_LIODN_ENTRY(b, 549),
146 SET_SEC_RTIC_LIODN_ENTRY(c, 550),
147 SET_SEC_RTIC_LIODN_ENTRY(d, 551),
148 SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
149 SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
150 SET_SEC_DECO_LIODN_ENTRY(2, 543, 612),
151 SET_SEC_DECO_LIODN_ENTRY(3, 544, 613),
152 SET_SEC_DECO_LIODN_ENTRY(4, 545, 614),
153 SET_SEC_DECO_LIODN_ENTRY(5, 546, 615),
154 SET_SEC_DECO_LIODN_ENTRY(6, 547, 616),
155 SET_SEC_DECO_LIODN_ENTRY(7, 548, 617),
156};
157int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
158
159#ifdef CONFIG_SYS_DPAA_RMAN
160struct liodn_id_table rman_liodn_tbl[] = {
161 /* Set RMan block 0-3 liodn offset */
162 SET_RMAN_LIODN(0, 678),
163 SET_RMAN_LIODN(1, 679),
164 SET_RMAN_LIODN(2, 680),
165 SET_RMAN_LIODN(3, 681),
166};
167int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
168#endif
169
170struct liodn_id_table liodn_bases[] = {
171#ifdef CONFIG_SYS_DPAA_DCE
172 [FSL_HW_PORTAL_DCE] = SET_LIODN_BASE_2(618, 694),
173#endif
174 [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(462, 558),
175#ifdef CONFIG_SYS_DPAA_FMAN
176 [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
177#if (CONFIG_SYS_NUM_FMAN == 2)
178 [FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(1069),
179#endif
180#endif
181#ifdef CONFIG_SYS_DPAA_PME
182 [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(770, 846),
183#endif
184#ifdef CONFIG_SYS_DPAA_RMAN
185 [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922),
186#endif
187};