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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic1c2b3ac2011-01-20 07:49:52 +00002/*
3 * (C) Copyright 2011
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
Stefano Babic1c2b3ac2011-01-20 07:49:52 +00005 */
6
7#ifndef __ASM_ARCH_CLOCK_H
8#define __ASM_ARCH_CLOCK_H
9
Benoît Thébaudeaue4528342012-08-21 11:07:20 +000010#include <common.h>
11
12#ifdef CONFIG_MX35_HCLK_FREQ
13#define MXC_HCLK CONFIG_MX35_HCLK_FREQ
14#else
15#define MXC_HCLK 24000000
16#endif
17
18#ifdef CONFIG_MX35_CLK32
19#define MXC_CLK32 CONFIG_MX35_CLK32
20#else
21#define MXC_CLK32 32768
22#endif
23
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000024enum mxc_clock {
Benoît Thébaudeauefc91872012-08-14 10:32:21 +000025 MXC_ARM_CLK,
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000026 MXC_AHB_CLK,
27 MXC_IPG_CLK,
28 MXC_IPG_PERCLK,
29 MXC_UART_CLK,
Benoît Thébaudeau8eae5692012-09-27 10:26:02 +000030 MXC_ESDHC1_CLK,
31 MXC_ESDHC2_CLK,
32 MXC_ESDHC3_CLK,
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000033 MXC_USB_CLK,
34 MXC_CSPI_CLK,
35 MXC_FEC_CLK,
Matthias Weisser99ba3422012-09-24 02:46:53 +000036 MXC_I2C_CLK,
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000037};
38
Benoît Thébaudeauefc91872012-08-14 10:32:21 +000039enum mxc_main_clock {
40 CPU_CLK,
41 AHB_CLK,
42 IPG_CLK,
43 IPG_PER_CLK,
44 NFC_CLK,
45 USB_CLK,
46 HSP_CLK,
47};
48
49enum mxc_peri_clock {
50 UART1_BAUD,
51 UART2_BAUD,
52 UART3_BAUD,
53 SSI1_BAUD,
54 SSI2_BAUD,
55 CSI_BAUD,
56 MSHC_CLK,
57 ESDHC1_CLK,
58 ESDHC2_CLK,
59 ESDHC3_CLK,
60 SPDIF_CLK,
61 SPI1_CLK,
62 SPI2_CLK,
63};
64
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000065u32 imx_get_uartclk(void);
66u32 imx_get_fecclk(void);
67unsigned int mxc_get_clock(enum mxc_clock clk);
68
69#endif /* __ASM_ARCH_CLOCK_H */