blob: 3bca3a25a97b656def5dbf3734e1da72e148600c [file] [log] [blame]
Michal Simek014d3042019-01-21 15:25:02 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2019 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
5 */
6
7#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06008#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Michal Simek878ba362019-12-19 17:45:15 +010010#include <asm/sections.h>
Michal Simek014d3042019-01-21 15:25:02 +010011#include <dm/uclass.h>
12#include <i2c.h>
Michal Simekb90b97e2020-04-08 10:51:36 +020013#include <linux/sizes.h>
Michal Simek705d44a2020-03-31 12:39:37 +020014#include "board.h"
Michal Simek014d3042019-01-21 15:25:02 +010015
16int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
17{
Michal Simek13db6162019-01-21 16:29:07 +010018 int ret = -EINVAL;
19
20#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
21 struct udevice *dev;
22 ofnode eeprom;
23
24 eeprom = ofnode_get_chosen_node("xlnx,eeprom");
25 if (!ofnode_valid(eeprom))
26 return -ENODEV;
27
28 debug("%s: Path to EEPROM %s\n", __func__,
Simon Glassf3455962020-01-27 08:49:43 -070029 ofnode_read_chosen_string("xlnx,eeprom"));
Michal Simek13db6162019-01-21 16:29:07 +010030
31 ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
32 if (ret)
33 return ret;
34
35 ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
36 if (ret)
37 debug("%s: I2C EEPROM MAC address read failed\n", __func__);
38 else
39 debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
40#endif
41
42 return ret;
43}
Ibai Erkiaga6f658202019-10-02 15:57:36 +010044
Michal Simek878ba362019-12-19 17:45:15 +010045#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
Ibai Erkiaga6f658202019-10-02 15:57:36 +010046void *board_fdt_blob_setup(void)
47{
Michal Simekc89f4292020-03-19 10:23:56 +010048 static void *fdt_blob;
49
50#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
51 fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
Ibai Erkiaga6f658202019-10-02 15:57:36 +010052
Michal Simek878ba362019-12-19 17:45:15 +010053 if (fdt_magic(fdt_blob) == FDT_MAGIC)
54 return fdt_blob;
55
56 debug("DTB is not passed via %p\n", fdt_blob);
Michal Simekc89f4292020-03-19 10:23:56 +010057#endif
Michal Simek878ba362019-12-19 17:45:15 +010058
59#ifdef CONFIG_SPL_BUILD
60 /* FDT is at end of BSS unless it is in a different memory region */
61 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
62 fdt_blob = (ulong *)&_image_binary_end;
63 else
64 fdt_blob = (ulong *)&__bss_end;
65#else
66 /* FDT is at end of image */
67 fdt_blob = (ulong *)&_end;
68#endif
69
70 if (fdt_magic(fdt_blob) == FDT_MAGIC)
71 return fdt_blob;
72
73 debug("DTB is also not passed via %p\n", fdt_blob);
Ibai Erkiaga6f658202019-10-02 15:57:36 +010074
Michal Simek878ba362019-12-19 17:45:15 +010075 return NULL;
Ibai Erkiaga6f658202019-10-02 15:57:36 +010076}
77#endif
Michal Simek705d44a2020-03-31 12:39:37 +020078
79int board_late_init_xilinx(void)
80{
Michal Simekb90b97e2020-04-08 10:51:36 +020081 ulong initrd_hi;
82
Michal Simek705d44a2020-03-31 12:39:37 +020083 env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
84
Michal Simekb90b97e2020-04-08 10:51:36 +020085 initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
86 initrd_hi = round_down(initrd_hi, SZ_16M);
87 env_set_addr("initrd_high", (void *)initrd_hi);
88
Michal Simek8ba62d22020-07-09 15:57:56 +020089 env_set_addr("bootm_low", (void *)gd->ram_base);
90 env_set_addr("bootm_size", (void *)gd->ram_size);
91
Michal Simek705d44a2020-03-31 12:39:37 +020092 return 0;
93}