blob: b8cdaaada1d9198ca95ad3debf09116ee6c08568 [file] [log] [blame]
Michal Simek014d3042019-01-21 15:25:02 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2019 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
5 */
6
7#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06008#include <env.h>
Michal Simek878ba362019-12-19 17:45:15 +01009#include <asm/sections.h>
Michal Simek014d3042019-01-21 15:25:02 +010010#include <dm/uclass.h>
11#include <i2c.h>
Michal Simekb90b97e2020-04-08 10:51:36 +020012#include <linux/sizes.h>
Michal Simek705d44a2020-03-31 12:39:37 +020013#include "board.h"
Michal Simek014d3042019-01-21 15:25:02 +010014
15int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
16{
Michal Simek13db6162019-01-21 16:29:07 +010017 int ret = -EINVAL;
18
19#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
20 struct udevice *dev;
21 ofnode eeprom;
22
23 eeprom = ofnode_get_chosen_node("xlnx,eeprom");
24 if (!ofnode_valid(eeprom))
25 return -ENODEV;
26
27 debug("%s: Path to EEPROM %s\n", __func__,
Simon Glassf3455962020-01-27 08:49:43 -070028 ofnode_read_chosen_string("xlnx,eeprom"));
Michal Simek13db6162019-01-21 16:29:07 +010029
30 ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
31 if (ret)
32 return ret;
33
34 ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
35 if (ret)
36 debug("%s: I2C EEPROM MAC address read failed\n", __func__);
37 else
38 debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
39#endif
40
41 return ret;
42}
Ibai Erkiaga6f658202019-10-02 15:57:36 +010043
Michal Simek878ba362019-12-19 17:45:15 +010044#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
Ibai Erkiaga6f658202019-10-02 15:57:36 +010045void *board_fdt_blob_setup(void)
46{
Michal Simekc89f4292020-03-19 10:23:56 +010047 static void *fdt_blob;
48
49#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
50 fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
Ibai Erkiaga6f658202019-10-02 15:57:36 +010051
Michal Simek878ba362019-12-19 17:45:15 +010052 if (fdt_magic(fdt_blob) == FDT_MAGIC)
53 return fdt_blob;
54
55 debug("DTB is not passed via %p\n", fdt_blob);
Michal Simekc89f4292020-03-19 10:23:56 +010056#endif
Michal Simek878ba362019-12-19 17:45:15 +010057
58#ifdef CONFIG_SPL_BUILD
59 /* FDT is at end of BSS unless it is in a different memory region */
60 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
61 fdt_blob = (ulong *)&_image_binary_end;
62 else
63 fdt_blob = (ulong *)&__bss_end;
64#else
65 /* FDT is at end of image */
66 fdt_blob = (ulong *)&_end;
67#endif
68
69 if (fdt_magic(fdt_blob) == FDT_MAGIC)
70 return fdt_blob;
71
72 debug("DTB is also not passed via %p\n", fdt_blob);
Ibai Erkiaga6f658202019-10-02 15:57:36 +010073
Michal Simek878ba362019-12-19 17:45:15 +010074 return NULL;
Ibai Erkiaga6f658202019-10-02 15:57:36 +010075}
76#endif
Michal Simek705d44a2020-03-31 12:39:37 +020077
78int board_late_init_xilinx(void)
79{
Michal Simekb90b97e2020-04-08 10:51:36 +020080 ulong initrd_hi;
81
Michal Simek705d44a2020-03-31 12:39:37 +020082 env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
83
Michal Simekb90b97e2020-04-08 10:51:36 +020084 initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
85 initrd_hi = round_down(initrd_hi, SZ_16M);
86 env_set_addr("initrd_high", (void *)initrd_hi);
87
Michal Simek705d44a2020-03-31 12:39:37 +020088 return 0;
89}