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git01.mediatek.com / filogic / uboot / 89e5838bb4f18e966cdc91bca69aeff8574e5642 / . / arch / arm / dts / exynos5250.dtsi
blob: ccbafe9b07d7500569c4be9a82f3cb57bdf5d322 [file] [log] [blame]
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]1/*
Rajeshwari Birje4185c0c2013-12-26 09:44:25 +0530[diff] [blame]2 * (C) Copyright 2012 SAMSUNG Electronics
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]3 * SAMSUNG EXYNOS5250 SoC device tree source
4 *
Rajeshwari Birje4185c0c2013-12-26 09:44:25 +0530[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
6 */
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]7
Simon Glass78cefc02014-10-20 19:48:29 -0600[diff] [blame]8#include "exynos5.dtsi"
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]9#include "exynos5250-pinctrl.dtsi"
Simon Glass89e58382014-10-20 19:48:32 -0600[diff] [blame^]10#include "exynos5250-pinctrl-uboot.dtsi"
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]11
12/ {
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]13 aliases {
14 pinctrl0 = &pinctrl_0;
15 pinctrl1 = &pinctrl_1;
16 pinctrl2 = &pinctrl_2;
17 pinctrl3 = &pinctrl_3;
18 };
19
20 pinctrl_0: pinctrl@11400000 {
21 compatible = "samsung,exynos5250-pinctrl";
22 reg = <0x11400000 0x1000>;
23 interrupts = <0 46 0>;
24
25 wakup_eint: wakeup-interrupt-controller {
26 compatible = "samsung,exynos4210-wakeup-eint";
27 interrupt-parent = <&gic>;
28 interrupts = <0 32 0>;
29 };
30 };
31
32 pinctrl_1: pinctrl@13400000 {
33 compatible = "samsung,exynos5250-pinctrl";
34 reg = <0x13400000 0x1000>;
35 interrupts = <0 45 0>;
36 };
37
38 pinctrl_2: pinctrl@10d10000 {
39 compatible = "samsung,exynos5250-pinctrl";
40 reg = <0x10d10000 0x1000>;
41 interrupts = <0 50 0>;
42 };
43
44 pinctrl_3: pinctrl@03860000 {
45 compatible = "samsung,exynos5250-pinctrl";
46 reg = <0x03860000 0x1000>;
47 interrupts = <0 47 0>;
48 };
49
Rajeshwari Shinde44a4a822012-12-26 20:03:08 +0000[diff] [blame]50 i2c@12ca0000 {
51 #address-cells = <1>;
52 #size-cells = <0>;
53 compatible = "samsung,s3c2440-i2c";
54 reg = <0x12CA0000 0x100>;
55 interrupts = <0 60 0>;
56 };
57
58 i2c@12cb0000 {
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "samsung,s3c2440-i2c";
62 reg = <0x12CB0000 0x100>;
63 interrupts = <0 61 0>;
64 };
65
66 i2c@12cc0000 {
67 #address-cells = <1>;
68 #size-cells = <0>;
69 compatible = "samsung,s3c2440-i2c";
70 reg = <0x12CC0000 0x100>;
71 interrupts = <0 62 0>;
72 };
73
74 i2c@12cd0000 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 compatible = "samsung,s3c2440-i2c";
78 reg = <0x12CD0000 0x100>;
79 interrupts = <0 63 0>;
80 };
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]81
Dani Krishna Mohan76c444d2013-09-11 16:38:47 +0530[diff] [blame]82 sound@3830000 {
83 compatible = "samsung,exynos-sound";
84 reg = <0x3830000 0x50>;
85 samsung,i2s-epll-clock-frequency = <192000000>;
86 samsung,i2s-sampling-rate = <48000>;
87 samsung,i2s-bits-per-sample = <16>;
88 samsung,i2s-channels = <2>;
89 samsung,i2s-lr-clk-framesize = <256>;
90 samsung,i2s-bit-clk-framesize = <32>;
91 samsung,i2s-id = <0>;
92 };
93
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]94 sound@12d60000 {
95 compatible = "samsung,exynos-sound";
96 reg = <0x12d60000 0x20>;
Dani Krishna Mohan76c444d2013-09-11 16:38:47 +0530[diff] [blame]97 samsung,i2s-epll-clock-frequency = <192000000>;
98 samsung,i2s-sampling-rate = <48000>;
99 samsung,i2s-bits-per-sample = <16>;
100 samsung,i2s-channels = <2>;
101 samsung,i2s-lr-clk-framesize = <256>;
102 samsung,i2s-bit-clk-framesize = <32>;
103 samsung,i2s-id = <1>;
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]104 };
Rajeshwari Shinde44c87012012-12-26 20:03:22 +0000[diff] [blame]105
Rajeshwari Shindee17037d2013-01-07 23:35:04 +0000[diff] [blame]106
Vivek Gautam03b34372013-09-14 14:02:49 +0530[diff] [blame]107 xhci@12000000 {
108 compatible = "samsung,exynos5250-xhci";
109 reg = <0x12000000 0x10000>;
110 #address-cells = <1>;
111 #size-cells = <1>;
112
113 phy {
114 compatible = "samsung,exynos5250-usb3-phy";
115 reg = <0x12100000 0x100>;
116 };
117 };
118
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]119};