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git01.mediatek.com / filogic / uboot / e3582fab28ab69f62435038aa0769eaf547e829c / . / arch / arm / dts / exynos5250.dtsi
blob: 16581dd91e7a474060b29886e0c03df3b471a91a [file] [log] [blame]
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]1/*
Rajeshwari Birje4185c0c2013-12-26 09:44:25 +0530[diff] [blame]2 * (C) Copyright 2012 SAMSUNG Electronics
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]3 * SAMSUNG EXYNOS5250 SoC device tree source
4 *
Rajeshwari Birje4185c0c2013-12-26 09:44:25 +0530[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
6 */
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]7
Simon Glass78cefc02014-10-20 19:48:29 -0600[diff] [blame]8#include "exynos5.dtsi"
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]9#include "exynos5250-pinctrl.dtsi"
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]10
11/ {
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]12 aliases {
13 pinctrl0 = &pinctrl_0;
14 pinctrl1 = &pinctrl_1;
15 pinctrl2 = &pinctrl_2;
16 pinctrl3 = &pinctrl_3;
17 };
18
19 pinctrl_0: pinctrl@11400000 {
20 compatible = "samsung,exynos5250-pinctrl";
21 reg = <0x11400000 0x1000>;
22 interrupts = <0 46 0>;
23
24 wakup_eint: wakeup-interrupt-controller {
25 compatible = "samsung,exynos4210-wakeup-eint";
26 interrupt-parent = <&gic>;
27 interrupts = <0 32 0>;
28 };
29 };
30
31 pinctrl_1: pinctrl@13400000 {
32 compatible = "samsung,exynos5250-pinctrl";
33 reg = <0x13400000 0x1000>;
34 interrupts = <0 45 0>;
35 };
36
37 pinctrl_2: pinctrl@10d10000 {
38 compatible = "samsung,exynos5250-pinctrl";
39 reg = <0x10d10000 0x1000>;
40 interrupts = <0 50 0>;
41 };
42
43 pinctrl_3: pinctrl@03860000 {
44 compatible = "samsung,exynos5250-pinctrl";
45 reg = <0x03860000 0x1000>;
46 interrupts = <0 47 0>;
47 };
48
Rajeshwari Shinde44a4a822012-12-26 20:03:08 +0000[diff] [blame]49 i2c@12ca0000 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "samsung,s3c2440-i2c";
53 reg = <0x12CA0000 0x100>;
54 interrupts = <0 60 0>;
55 };
56
57 i2c@12cb0000 {
58 #address-cells = <1>;
59 #size-cells = <0>;
60 compatible = "samsung,s3c2440-i2c";
61 reg = <0x12CB0000 0x100>;
62 interrupts = <0 61 0>;
63 };
64
65 i2c@12cc0000 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "samsung,s3c2440-i2c";
69 reg = <0x12CC0000 0x100>;
70 interrupts = <0 62 0>;
71 };
72
73 i2c@12cd0000 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "samsung,s3c2440-i2c";
77 reg = <0x12CD0000 0x100>;
78 interrupts = <0 63 0>;
79 };
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]80
Dani Krishna Mohan76c444d2013-09-11 16:38:47 +0530[diff] [blame]81 sound@3830000 {
82 compatible = "samsung,exynos-sound";
83 reg = <0x3830000 0x50>;
84 samsung,i2s-epll-clock-frequency = <192000000>;
85 samsung,i2s-sampling-rate = <48000>;
86 samsung,i2s-bits-per-sample = <16>;
87 samsung,i2s-channels = <2>;
88 samsung,i2s-lr-clk-framesize = <256>;
89 samsung,i2s-bit-clk-framesize = <32>;
90 samsung,i2s-id = <0>;
91 };
92
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]93 sound@12d60000 {
94 compatible = "samsung,exynos-sound";
95 reg = <0x12d60000 0x20>;
Dani Krishna Mohan76c444d2013-09-11 16:38:47 +0530[diff] [blame]96 samsung,i2s-epll-clock-frequency = <192000000>;
97 samsung,i2s-sampling-rate = <48000>;
98 samsung,i2s-bits-per-sample = <16>;
99 samsung,i2s-channels = <2>;
100 samsung,i2s-lr-clk-framesize = <256>;
101 samsung,i2s-bit-clk-framesize = <32>;
102 samsung,i2s-id = <1>;
Rajeshwari Shinde9b3cc402012-12-26 20:03:14 +0000[diff] [blame]103 };
Rajeshwari Shinde44c87012012-12-26 20:03:22 +0000[diff] [blame]104
Rajeshwari Shindee17037d2013-01-07 23:35:04 +0000[diff] [blame]105
Vivek Gautam03b34372013-09-14 14:02:49 +0530[diff] [blame]106 xhci@12000000 {
107 compatible = "samsung,exynos5250-xhci";
108 reg = <0x12000000 0x10000>;
109 #address-cells = <1>;
110 #size-cells = <1>;
111
112 phy {
113 compatible = "samsung,exynos5250-usb3-phy";
114 reg = <0x12100000 0x100>;
115 };
116 };
117
Hatim RV89ee4022012-12-11 00:52:45 +0000[diff] [blame]118};