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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warrena2148922016-08-08 09:41:34 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warrena2148922016-08-08 09:41:34 -06004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -07009#include <malloc.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070010#include <time.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060011#include <asm/global_data.h>
Stephen Warrena2148922016-08-08 09:41:34 -060012#include <dm/lists.h>
13#include <dm/root.h>
14#include <mailbox.h>
15#include <misc.h>
16#include <asm/arch-tegra/bpmp_abi.h>
17#include <asm/arch-tegra/ivc.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060018#include <linux/bitops.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070019#include <linux/err.h>
Simon Glassbdd5f812023-09-14 18:21:46 -060020#include <linux/printk.h>
Stephen Warrena2148922016-08-08 09:41:34 -060021
22#define BPMP_IVC_FRAME_COUNT 1
23#define BPMP_IVC_FRAME_SIZE 128
24
25#define BPMP_FLAG_DO_ACK BIT(0)
26#define BPMP_FLAG_RING_DOORBELL BIT(1)
27
28DECLARE_GLOBAL_DATA_PTR;
29
30struct tegra186_bpmp {
31 struct mbox_chan mbox;
32 struct tegra_ivc ivc;
33};
34
35static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
36 int tx_size, void *rx_msg, int rx_size)
37{
38 struct tegra186_bpmp *priv = dev_get_priv(dev);
39 int ret, err;
40 void *ivc_frame;
41 struct mrq_request *req;
42 struct mrq_response *resp;
43 ulong start_time;
44
45 debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
46 __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv);
47
48 if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE))
49 return -EINVAL;
50
51 ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
52 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090053 pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060054 return ret;
55 }
56
57 req = ivc_frame;
58 req->mrq = mrq;
59 req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL;
60 memcpy(req + 1, tx_msg, tx_size);
61
62 ret = tegra_ivc_write_advance(&priv->ivc);
63 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090064 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060065 return ret;
66 }
67
68 start_time = timer_get_us();
69 for (;;) {
70 ret = tegra_ivc_channel_notified(&priv->ivc);
71 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090072 pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060073 return ret;
74 }
75
76 ret = tegra_ivc_read_get_next_frame(&priv->ivc, &ivc_frame);
77 if (!ret)
78 break;
79
80 /* Timeout 20ms; roughly 10x current max observed duration */
81 if ((timer_get_us() - start_time) > 20 * 1000) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090082 pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
Stephen Warrena2148922016-08-08 09:41:34 -060083 ret);
84 return -ETIMEDOUT;
85 }
86 }
87
88 resp = ivc_frame;
89 err = resp->err;
90 if (!err && rx_msg && rx_size)
91 memcpy(rx_msg, resp + 1, rx_size);
92
93 ret = tegra_ivc_read_advance(&priv->ivc);
94 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090095 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060096 return ret;
97 }
98
99 if (err) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900100 pr_err("BPMP responded with error %d\n", err);
Stephen Warrena2148922016-08-08 09:41:34 -0600101 /* err isn't a U-Boot error code, so don't that */
102 return -EIO;
103 }
104
105 return rx_size;
106}
107
108/**
109 * The BPMP exposes multiple different services. We create a sub-device for
110 * each separate type of service, since each device must be of the appropriate
111 * UCLASS.
112 */
113static int tegra186_bpmp_bind(struct udevice *dev)
114{
115 int ret;
116 struct udevice *child;
117
118 debug("%s(dev=%p)\n", __func__, dev);
119
120 ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600121 dev_ofnode(dev), &child);
Stephen Warrena2148922016-08-08 09:41:34 -0600122 if (ret)
123 return ret;
124
125 ret = device_bind_driver_to_node(dev, "tegra186_reset",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600126 "tegra186_reset", dev_ofnode(dev),
Stephen Warrena2148922016-08-08 09:41:34 -0600127 &child);
128 if (ret)
129 return ret;
130
131 ret = device_bind_driver_to_node(dev, "tegra186_power_domain",
132 "tegra186_power_domain",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600133 dev_ofnode(dev), &child);
Stephen Warrena2148922016-08-08 09:41:34 -0600134 if (ret)
135 return ret;
136
137 ret = dm_scan_fdt_dev(dev);
138 if (ret)
139 return ret;
140
141 return 0;
142}
143
144static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
145{
146 int ret;
147 struct fdtdec_phandle_args args;
148 fdt_addr_t reg;
149
Simon Glassdd79d6e2017-01-17 16:52:55 -0700150 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
Stephen Warrena2148922016-08-08 09:41:34 -0600151 "shmem", NULL, 0, index, &args);
152 if (ret < 0) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900153 pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600154 return ret;
155 }
156
157 reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
158 "reg", 0, NULL, true);
159 if (reg == FDT_ADDR_T_NONE) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900160 pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600161 return -ENODEV;
162 }
163
164 return reg;
165}
166
167static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
168{
169 struct tegra186_bpmp *priv =
170 container_of(ivc, struct tegra186_bpmp, ivc);
171 int ret;
172
173 ret = mbox_send(&priv->mbox, NULL);
174 if (ret)
Masahiro Yamada81e10422017-09-16 14:10:41 +0900175 pr_err("mbox_send() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600176}
177
178static int tegra186_bpmp_probe(struct udevice *dev)
179{
180 struct tegra186_bpmp *priv = dev_get_priv(dev);
181 int ret;
182 ulong tx_base, rx_base, start_time;
183
184 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
185
186 ret = mbox_get_by_index(dev, 0, &priv->mbox);
187 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900188 pr_err("mbox_get_by_index() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600189 return ret;
190 }
191
192 tx_base = tegra186_bpmp_get_shmem(dev, 0);
193 if (IS_ERR_VALUE(tx_base)) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900194 pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600195 return tx_base;
196 }
197 rx_base = tegra186_bpmp_get_shmem(dev, 1);
198 if (IS_ERR_VALUE(rx_base)) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900199 pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600200 return rx_base;
201 }
202 debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
203
204 ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
205 BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
206 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900207 pr_err("tegra_ivc_init() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600208 return ret;
209 }
210
211 tegra_ivc_channel_reset(&priv->ivc);
212 start_time = timer_get_us();
213 for (;;) {
214 ret = tegra_ivc_channel_notified(&priv->ivc);
215 if (!ret)
216 break;
217
218 /* Timeout 100ms */
219 if ((timer_get_us() - start_time) > 100 * 1000) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900220 pr_err("Initial IVC reset timed out (%d)\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600221 ret = -ETIMEDOUT;
222 goto err_free_mbox;
223 }
224 }
225
226 return 0;
227
228err_free_mbox:
229 mbox_free(&priv->mbox);
230
231 return ret;
232}
233
234static int tegra186_bpmp_remove(struct udevice *dev)
235{
236 struct tegra186_bpmp *priv = dev_get_priv(dev);
237
238 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
239
240 mbox_free(&priv->mbox);
241
242 return 0;
243}
244
245static struct misc_ops tegra186_bpmp_ops = {
246 .call = tegra186_bpmp_call,
247};
248
249static const struct udevice_id tegra186_bpmp_ids[] = {
250 { .compatible = "nvidia,tegra186-bpmp" },
251 { }
252};
253
254U_BOOT_DRIVER(tegra186_bpmp) = {
255 .name = "tegra186_bpmp",
256 .id = UCLASS_MISC,
257 .of_match = tegra186_bpmp_ids,
258 .bind = tegra186_bpmp_bind,
259 .probe = tegra186_bpmp_probe,
260 .remove = tegra186_bpmp_remove,
261 .ops = &tegra186_bpmp_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700262 .priv_auto = sizeof(struct tegra186_bpmp),
Stephen Warrena2148922016-08-08 09:41:34 -0600263};