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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warrena2148922016-08-08 09:41:34 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warrena2148922016-08-08 09:41:34 -06004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass9bc15642020-02-03 07:36:16 -07008#include <malloc.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07009#include <time.h>
Stephen Warrena2148922016-08-08 09:41:34 -060010#include <dm/lists.h>
11#include <dm/root.h>
12#include <mailbox.h>
13#include <misc.h>
14#include <asm/arch-tegra/bpmp_abi.h>
15#include <asm/arch-tegra/ivc.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070016#include <linux/err.h>
Stephen Warrena2148922016-08-08 09:41:34 -060017
18#define BPMP_IVC_FRAME_COUNT 1
19#define BPMP_IVC_FRAME_SIZE 128
20
21#define BPMP_FLAG_DO_ACK BIT(0)
22#define BPMP_FLAG_RING_DOORBELL BIT(1)
23
24DECLARE_GLOBAL_DATA_PTR;
25
26struct tegra186_bpmp {
27 struct mbox_chan mbox;
28 struct tegra_ivc ivc;
29};
30
31static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
32 int tx_size, void *rx_msg, int rx_size)
33{
34 struct tegra186_bpmp *priv = dev_get_priv(dev);
35 int ret, err;
36 void *ivc_frame;
37 struct mrq_request *req;
38 struct mrq_response *resp;
39 ulong start_time;
40
41 debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
42 __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv);
43
44 if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE))
45 return -EINVAL;
46
47 ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
48 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090049 pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060050 return ret;
51 }
52
53 req = ivc_frame;
54 req->mrq = mrq;
55 req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL;
56 memcpy(req + 1, tx_msg, tx_size);
57
58 ret = tegra_ivc_write_advance(&priv->ivc);
59 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090060 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060061 return ret;
62 }
63
64 start_time = timer_get_us();
65 for (;;) {
66 ret = tegra_ivc_channel_notified(&priv->ivc);
67 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090068 pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060069 return ret;
70 }
71
72 ret = tegra_ivc_read_get_next_frame(&priv->ivc, &ivc_frame);
73 if (!ret)
74 break;
75
76 /* Timeout 20ms; roughly 10x current max observed duration */
77 if ((timer_get_us() - start_time) > 20 * 1000) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090078 pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
Stephen Warrena2148922016-08-08 09:41:34 -060079 ret);
80 return -ETIMEDOUT;
81 }
82 }
83
84 resp = ivc_frame;
85 err = resp->err;
86 if (!err && rx_msg && rx_size)
87 memcpy(rx_msg, resp + 1, rx_size);
88
89 ret = tegra_ivc_read_advance(&priv->ivc);
90 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090091 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -060092 return ret;
93 }
94
95 if (err) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090096 pr_err("BPMP responded with error %d\n", err);
Stephen Warrena2148922016-08-08 09:41:34 -060097 /* err isn't a U-Boot error code, so don't that */
98 return -EIO;
99 }
100
101 return rx_size;
102}
103
104/**
105 * The BPMP exposes multiple different services. We create a sub-device for
106 * each separate type of service, since each device must be of the appropriate
107 * UCLASS.
108 */
109static int tegra186_bpmp_bind(struct udevice *dev)
110{
111 int ret;
112 struct udevice *child;
113
114 debug("%s(dev=%p)\n", __func__, dev);
115
116 ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600117 dev_ofnode(dev), &child);
Stephen Warrena2148922016-08-08 09:41:34 -0600118 if (ret)
119 return ret;
120
121 ret = device_bind_driver_to_node(dev, "tegra186_reset",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600122 "tegra186_reset", dev_ofnode(dev),
Stephen Warrena2148922016-08-08 09:41:34 -0600123 &child);
124 if (ret)
125 return ret;
126
127 ret = device_bind_driver_to_node(dev, "tegra186_power_domain",
128 "tegra186_power_domain",
Simon Glasse6dd8da2017-05-18 20:09:07 -0600129 dev_ofnode(dev), &child);
Stephen Warrena2148922016-08-08 09:41:34 -0600130 if (ret)
131 return ret;
132
133 ret = dm_scan_fdt_dev(dev);
134 if (ret)
135 return ret;
136
137 return 0;
138}
139
140static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
141{
142 int ret;
143 struct fdtdec_phandle_args args;
144 fdt_addr_t reg;
145
Simon Glassdd79d6e2017-01-17 16:52:55 -0700146 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
Stephen Warrena2148922016-08-08 09:41:34 -0600147 "shmem", NULL, 0, index, &args);
148 if (ret < 0) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900149 pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600150 return ret;
151 }
152
153 reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
154 "reg", 0, NULL, true);
155 if (reg == FDT_ADDR_T_NONE) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900156 pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600157 return -ENODEV;
158 }
159
160 return reg;
161}
162
163static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
164{
165 struct tegra186_bpmp *priv =
166 container_of(ivc, struct tegra186_bpmp, ivc);
167 int ret;
168
169 ret = mbox_send(&priv->mbox, NULL);
170 if (ret)
Masahiro Yamada81e10422017-09-16 14:10:41 +0900171 pr_err("mbox_send() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600172}
173
174static int tegra186_bpmp_probe(struct udevice *dev)
175{
176 struct tegra186_bpmp *priv = dev_get_priv(dev);
177 int ret;
178 ulong tx_base, rx_base, start_time;
179
180 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
181
182 ret = mbox_get_by_index(dev, 0, &priv->mbox);
183 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900184 pr_err("mbox_get_by_index() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600185 return ret;
186 }
187
188 tx_base = tegra186_bpmp_get_shmem(dev, 0);
189 if (IS_ERR_VALUE(tx_base)) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900190 pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600191 return tx_base;
192 }
193 rx_base = tegra186_bpmp_get_shmem(dev, 1);
194 if (IS_ERR_VALUE(rx_base)) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900195 pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
Stephen Warrena2148922016-08-08 09:41:34 -0600196 return rx_base;
197 }
198 debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
199
200 ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
201 BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
202 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900203 pr_err("tegra_ivc_init() failed: %d\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600204 return ret;
205 }
206
207 tegra_ivc_channel_reset(&priv->ivc);
208 start_time = timer_get_us();
209 for (;;) {
210 ret = tegra_ivc_channel_notified(&priv->ivc);
211 if (!ret)
212 break;
213
214 /* Timeout 100ms */
215 if ((timer_get_us() - start_time) > 100 * 1000) {
Masahiro Yamada81e10422017-09-16 14:10:41 +0900216 pr_err("Initial IVC reset timed out (%d)\n", ret);
Stephen Warrena2148922016-08-08 09:41:34 -0600217 ret = -ETIMEDOUT;
218 goto err_free_mbox;
219 }
220 }
221
222 return 0;
223
224err_free_mbox:
225 mbox_free(&priv->mbox);
226
227 return ret;
228}
229
230static int tegra186_bpmp_remove(struct udevice *dev)
231{
232 struct tegra186_bpmp *priv = dev_get_priv(dev);
233
234 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
235
236 mbox_free(&priv->mbox);
237
238 return 0;
239}
240
241static struct misc_ops tegra186_bpmp_ops = {
242 .call = tegra186_bpmp_call,
243};
244
245static const struct udevice_id tegra186_bpmp_ids[] = {
246 { .compatible = "nvidia,tegra186-bpmp" },
247 { }
248};
249
250U_BOOT_DRIVER(tegra186_bpmp) = {
251 .name = "tegra186_bpmp",
252 .id = UCLASS_MISC,
253 .of_match = tegra186_bpmp_ids,
254 .bind = tegra186_bpmp_bind,
255 .probe = tegra186_bpmp_probe,
256 .remove = tegra186_bpmp_remove,
257 .ops = &tegra186_bpmp_ops,
258 .priv_auto_alloc_size = sizeof(struct tegra186_bpmp),
259};