blob: a13769ea25894424646c0fdf4f5f6836853c2ac4 [file] [log] [blame]
Andy Flemingad347bb2008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Flemingad347bb2008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Stephen Warrenbf0c7852014-05-23 12:47:06 -060013#include <errno.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050014#include <mmc.h>
15#include <part.h>
16#include <malloc.h>
17#include <linux/list.h>
Rabin Vincent69d4e2c2009-04-05 13:30:54 +053018#include <div64.h>
Paul Burton8d30cc92013-09-09 15:30:26 +010019#include "mmc_private.h"
Andy Flemingad347bb2008-10-30 16:41:01 -050020
21static struct list_head mmc_devices;
22static int cur_dev_num = -1;
23
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +020024__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanov020f2612012-12-03 02:19:46 +000025{
26 return -1;
27}
28
29int mmc_getwp(struct mmc *mmc)
30{
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
Peter Korsgaardf7b15102013-03-21 04:00:03 +000035 if (wp < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +020036 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +000038 else
39 wp = 0;
40 }
Nikita Kiryanov020f2612012-12-03 02:19:46 +000041
42 return wp;
43}
44
Jeroen Hofstee47726302014-07-10 22:46:28 +020045__weak int board_mmc_getcd(struct mmc *mmc)
46{
Stefano Babic6e00edf2010-02-05 15:04:43 +010047 return -1;
48}
49
Paul Burton8d30cc92013-09-09 15:30:26 +010050int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Flemingad347bb2008-10-30 16:41:01 -050051{
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000052 int ret;
Marek Vasutdccb6082012-03-15 18:41:35 +000053
Marek Vasutdccb6082012-03-15 18:41:35 +000054#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000055 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou2c850462014-03-11 19:34:20 +020060 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000061 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
Dirk Behmec9cb4a92012-03-08 02:35:34 +000087 ptr = (u8 *)&cmd->response[i];
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000088 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000102#else
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000104#endif
Marek Vasutdccb6082012-03-15 18:41:35 +0000105 return ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500106}
107
Paul Burton8d30cc92013-09-09 15:30:26 +0100108int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000109{
110 struct mmc_cmd cmd;
Jan Kloetzke31789322012-02-05 22:29:12 +0000111 int err, retries = 5;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000112#ifdef CONFIG_MMC_TRACE
113 int status;
114#endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
Marek Vasutc4427392011-08-10 09:24:48 +0200118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000120
121 do {
122 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzke31789322012-02-05 22:29:12 +0000123 if (!err) {
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
126 MMC_STATE_PRG)
127 break;
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100129#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzke31789322012-02-05 22:29:12 +0000130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100132#endif
Jan Kloetzke31789322012-02-05 22:29:12 +0000133 return COMM_ERR;
134 }
135 } else if (--retries < 0)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000136 return err;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000137
138 udelay(1000);
139
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000140 } while (timeout--);
141
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000142#ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
145#endif
Jongman Heo1be00d92012-06-03 21:32:13 +0000146 if (timeout <= 0) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100147#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000148 printf("Timeout waiting card ready\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100149#endif
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000150 return TIMEOUT;
151 }
Andrew Gabbasove80682f2014-04-03 04:34:32 -0500152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
153 return SWITCH_ERR;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000154
155 return 0;
156}
157
Paul Burton8d30cc92013-09-09 15:30:26 +0100158int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Flemingad347bb2008-10-30 16:41:01 -0500159{
160 struct mmc_cmd cmd;
161
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -0600162 if (mmc->ddr_mode)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900163 return 0;
164
Andy Flemingad347bb2008-10-30 16:41:01 -0500165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
167 cmd.cmdarg = len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500168
169 return mmc_send_cmd(mmc, &cmd, NULL);
170}
171
172struct mmc *find_mmc_device(int dev_num)
173{
174 struct mmc *m;
175 struct list_head *entry;
176
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
179
180 if (m->block_dev.dev == dev_num)
181 return m;
182 }
183
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100184#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -0500185 printf("MMC Device %d not found\n", dev_num);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100186#endif
Andy Flemingad347bb2008-10-30 16:41:01 -0500187
188 return NULL;
189}
190
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200191static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillips87ea3892012-10-29 13:34:43 +0000192 lbaint_t blkcnt)
Andy Flemingad347bb2008-10-30 16:41:01 -0500193{
194 struct mmc_cmd cmd;
195 struct mmc_data data;
196
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700197 if (blkcnt > 1)
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
199 else
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Flemingad347bb2008-10-30 16:41:01 -0500201
202 if (mmc->high_capacity)
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700203 cmd.cmdarg = start;
Andy Flemingad347bb2008-10-30 16:41:01 -0500204 else
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700205 cmd.cmdarg = start * mmc->read_bl_len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500206
207 cmd.resp_type = MMC_RSP_R1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500208
209 data.dest = dst;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700210 data.blocks = blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
213
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700214 if (mmc_send_cmd(mmc, &cmd, &data))
215 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500216
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700217 if (blkcnt > 1) {
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
219 cmd.cmdarg = 0;
220 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100222#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700223 printf("mmc fail to send stop cmd\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100224#endif
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700225 return 0;
226 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500227 }
228
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700229 return blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500230}
231
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200232static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
Andy Flemingad347bb2008-10-30 16:41:01 -0500233{
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700234 lbaint_t cur, blocks_todo = blkcnt;
235
236 if (blkcnt == 0)
237 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500238
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700239 struct mmc *mmc = find_mmc_device(dev_num);
Andy Flemingad347bb2008-10-30 16:41:01 -0500240 if (!mmc)
241 return 0;
242
Lei Wene1cc9c82010-09-13 22:07:27 +0800243 if ((start + blkcnt) > mmc->block_dev.lba) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100244#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Lei Wene1cc9c82010-09-13 22:07:27 +0800246 start + blkcnt, mmc->block_dev.lba);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100247#endif
Lei Wene1cc9c82010-09-13 22:07:27 +0800248 return 0;
249 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500250
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
Andy Flemingad347bb2008-10-30 16:41:01 -0500252 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500253
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700254 do {
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
Andy Flemingad347bb2008-10-30 16:41:01 -0500263
264 return blkcnt;
265}
266
Kim Phillips87ea3892012-10-29 13:34:43 +0000267static int mmc_go_idle(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500268{
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
Andy Flemingad347bb2008-10-30 16:41:01 -0500277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286}
287
Kim Phillips87ea3892012-10-29 13:34:43 +0000288static int sd_send_op_cond(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500289{
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
Stefano Babicf8e9a212010-01-20 18:20:39 +0100306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
Thomas Chou1254c3d2010-12-24 13:12:21 +0000314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200315 (mmc->cfg->voltages & 0xff8000);
Andy Flemingad347bb2008-10-30 16:41:01 -0500316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
Thomas Chou1254c3d2010-12-24 13:12:21 +0000334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
Rabin Vincentb6eed942009-04-05 13:30:56 +0530345 mmc->ocr = cmd.response[0];
Andy Flemingad347bb2008-10-30 16:41:01 -0500346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351}
352
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000353/* We pass in the cmd since otherwise the init seems to fail */
354static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
355 int use_arg)
Andy Flemingad347bb2008-10-30 16:41:01 -0500356{
Andy Flemingad347bb2008-10-30 16:41:01 -0500357 int err;
358
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
361 cmd->cmdarg = 0;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
363 cmd->cmdarg =
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200364 (mmc->cfg->voltages &
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
367
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200368 if (mmc->cfg->host_caps & MMC_MODE_HC)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000369 cmd->cmdarg |= OCR_HCS;
370 }
371 err = mmc_send_cmd(mmc, cmd, NULL);
372 if (err)
373 return err;
374 mmc->op_cond_response = cmd->response[0];
375 return 0;
376}
377
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200378static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000379{
380 struct mmc_cmd cmd;
381 int err, i;
382
Andy Flemingad347bb2008-10-30 16:41:01 -0500383 /* Some cards seem to need this */
384 mmc_go_idle(mmc);
385
Raffaele Recalcati1df837e2011-03-11 02:01:13 +0000386 /* Asking to the card its capabilities */
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
390 if (err)
391 return err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200392
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
395 return 0;
396 }
397 return IN_PROGRESS;
398}
Wolfgang Denk80f70212011-05-19 22:21:41 +0200399
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200400static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000401{
402 struct mmc_cmd cmd;
403 int timeout = 1000;
404 uint start;
405 int err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200406
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
Andy Flemingad347bb2008-10-30 16:41:01 -0500409 do {
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
Andy Flemingad347bb2008-10-30 16:41:01 -0500411 if (err)
412 return err;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000413 if (get_timer(start) > timeout)
414 return UNUSABLE_ERR;
415 udelay(100);
416 } while (!(mmc->op_cond_response & OCR_BUSY));
Andy Flemingad347bb2008-10-30 16:41:01 -0500417
Thomas Chou1254c3d2010-12-24 13:12:21 +0000418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427 }
428
Andy Flemingad347bb2008-10-30 16:41:01 -0500429 mmc->version = MMC_VERSION_UNKNOWN;
Rabin Vincentb6eed942009-04-05 13:30:56 +0530430 mmc->ocr = cmd.response[0];
Andy Flemingad347bb2008-10-30 16:41:01 -0500431
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrenf6545f12014-01-30 16:11:12 -0700433 mmc->rca = 1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500434
435 return 0;
436}
437
438
Kim Phillips87ea3892012-10-29 13:34:43 +0000439static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Flemingad347bb2008-10-30 16:41:01 -0500440{
441 struct mmc_cmd cmd;
442 struct mmc_data data;
443 int err;
444
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500449
Yoshihiro Shimodaf6bec732012-06-07 19:09:11 +0000450 data.dest = (char *)ext_csd;
Andy Flemingad347bb2008-10-30 16:41:01 -0500451 data.blocks = 1;
Simon Glassa09c2b72013-04-03 08:54:30 +0000452 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -0500453 data.flags = MMC_DATA_READ;
454
455 err = mmc_send_cmd(mmc, &cmd, &data);
456
457 return err;
458}
459
460
Kim Phillips87ea3892012-10-29 13:34:43 +0000461static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Flemingad347bb2008-10-30 16:41:01 -0500462{
463 struct mmc_cmd cmd;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000464 int timeout = 1000;
465 int ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500466
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000470 (index << 16) |
471 (value << 8);
Andy Flemingad347bb2008-10-30 16:41:01 -0500472
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000473 ret = mmc_send_cmd(mmc, &cmd, NULL);
474
475 /* Waiting for the ready status */
Jan Kloetzke4e929dd2012-02-05 22:29:11 +0000476 if (!ret)
477 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000478
479 return ret;
480
Andy Flemingad347bb2008-10-30 16:41:01 -0500481}
482
Kim Phillips87ea3892012-10-29 13:34:43 +0000483static int mmc_change_freq(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500484{
Simon Glassa09c2b72013-04-03 08:54:30 +0000485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Flemingad347bb2008-10-30 16:41:01 -0500486 char cardtype;
487 int err;
488
Andrew Gabbasovccb7b042014-12-25 10:22:25 -0600489 mmc->card_caps = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500490
Thomas Chou1254c3d2010-12-24 13:12:21 +0000491 if (mmc_host_is_spi(mmc))
492 return 0;
493
Andy Flemingad347bb2008-10-30 16:41:01 -0500494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
496 return 0;
497
Andrew Gabbasovccb7b042014-12-25 10:22:25 -0600498 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
499
Andy Flemingad347bb2008-10-30 16:41:01 -0500500 err = mmc_send_ext_csd(mmc, ext_csd);
501
502 if (err)
503 return err;
504
Lei Wen217467f2011-10-03 20:35:10 +0000505 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Flemingad347bb2008-10-30 16:41:01 -0500506
507 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
508
509 if (err)
Andrew Gabbasove80682f2014-04-03 04:34:32 -0500510 return err == SWITCH_ERR ? 0 : err;
Andy Flemingad347bb2008-10-30 16:41:01 -0500511
512 /* Now check to see that it worked */
513 err = mmc_send_ext_csd(mmc, ext_csd);
514
515 if (err)
516 return err;
517
518 /* No high-speed support */
Lei Wen217467f2011-10-03 20:35:10 +0000519 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Flemingad347bb2008-10-30 16:41:01 -0500520 return 0;
521
522 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900523 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov95a37132014-12-01 06:59:10 -0600524 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900525 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Flemingad347bb2008-10-30 16:41:01 -0500526 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900527 } else {
Andy Flemingad347bb2008-10-30 16:41:01 -0500528 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900529 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500530
531 return 0;
532}
533
Stephen Warrene315ae82013-06-11 15:14:01 -0600534static int mmc_set_capacity(struct mmc *mmc, int part_num)
535{
536 switch (part_num) {
537 case 0:
538 mmc->capacity = mmc->capacity_user;
539 break;
540 case 1:
541 case 2:
542 mmc->capacity = mmc->capacity_boot;
543 break;
544 case 3:
545 mmc->capacity = mmc->capacity_rpmb;
546 break;
547 case 4:
548 case 5:
549 case 6:
550 case 7:
551 mmc->capacity = mmc->capacity_gp[part_num - 4];
552 break;
553 default:
554 return -1;
555 }
556
557 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
558
559 return 0;
560}
561
Stephen Warren52c44e42014-05-07 12:19:02 -0600562int mmc_select_hwpart(int dev_num, int hwpart)
563{
564 struct mmc *mmc = find_mmc_device(dev_num);
565 int ret;
566
567 if (!mmc)
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600568 return -ENODEV;
Stephen Warren52c44e42014-05-07 12:19:02 -0600569
570 if (mmc->part_num == hwpart)
571 return 0;
572
573 if (mmc->part_config == MMCPART_NOAVAILABLE) {
574 printf("Card doesn't support part_switch\n");
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600575 return -EMEDIUMTYPE;
Stephen Warren52c44e42014-05-07 12:19:02 -0600576 }
577
578 ret = mmc_switch_part(dev_num, hwpart);
579 if (ret)
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600580 return ret;
Stephen Warren52c44e42014-05-07 12:19:02 -0600581
582 mmc->part_num = hwpart;
583
584 return 0;
585}
586
587
Lei Wen31b99802011-05-02 16:26:26 +0000588int mmc_switch_part(int dev_num, unsigned int part_num)
589{
590 struct mmc *mmc = find_mmc_device(dev_num);
Stephen Warrene315ae82013-06-11 15:14:01 -0600591 int ret;
Lei Wen31b99802011-05-02 16:26:26 +0000592
593 if (!mmc)
594 return -1;
595
Stephen Warrene315ae82013-06-11 15:14:01 -0600596 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
597 (mmc->part_config & ~PART_ACCESS_MASK)
598 | (part_num & PART_ACCESS_MASK));
Peter Bigot45fde892014-09-02 18:31:23 -0500599
600 /*
601 * Set the capacity if the switch succeeded or was intended
602 * to return to representing the raw device.
603 */
604 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
605 ret = mmc_set_capacity(mmc, part_num);
Stephen Warrene315ae82013-06-11 15:14:01 -0600606
Peter Bigot45fde892014-09-02 18:31:23 -0500607 return ret;
Lei Wen31b99802011-05-02 16:26:26 +0000608}
609
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100610int mmc_hwpart_config(struct mmc *mmc,
611 const struct mmc_hwpart_conf *conf,
612 enum mmc_hwpart_conf_mode mode)
613{
614 u8 part_attrs = 0;
615 u32 enh_size_mult;
616 u32 enh_start_addr;
617 u32 gp_size_mult[4];
618 u32 max_enh_size_mult;
619 u32 tot_enh_size_mult = 0;
Diego Santa Cruz80200272014-12-23 10:50:31 +0100620 u8 wr_rel_set;
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100621 int i, pidx, err;
622 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
623
624 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
625 return -EINVAL;
626
627 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
628 printf("eMMC >= 4.4 required for enhanced user data area\n");
629 return -EMEDIUMTYPE;
630 }
631
632 if (!(mmc->part_support & PART_SUPPORT)) {
633 printf("Card does not support partitioning\n");
634 return -EMEDIUMTYPE;
635 }
636
637 if (!mmc->hc_wp_grp_size) {
638 printf("Card does not define HC WP group size\n");
639 return -EMEDIUMTYPE;
640 }
641
642 /* check partition alignment and total enhanced size */
643 if (conf->user.enh_size) {
644 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
645 conf->user.enh_start % mmc->hc_wp_grp_size) {
646 printf("User data enhanced area not HC WP group "
647 "size aligned\n");
648 return -EINVAL;
649 }
650 part_attrs |= EXT_CSD_ENH_USR;
651 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
652 if (mmc->high_capacity) {
653 enh_start_addr = conf->user.enh_start;
654 } else {
655 enh_start_addr = (conf->user.enh_start << 9);
656 }
657 } else {
658 enh_size_mult = 0;
659 enh_start_addr = 0;
660 }
661 tot_enh_size_mult += enh_size_mult;
662
663 for (pidx = 0; pidx < 4; pidx++) {
664 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
665 printf("GP%i partition not HC WP group size "
666 "aligned\n", pidx+1);
667 return -EINVAL;
668 }
669 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
670 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
671 part_attrs |= EXT_CSD_ENH_GP(pidx);
672 tot_enh_size_mult += gp_size_mult[pidx];
673 }
674 }
675
676 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
677 printf("Card does not support enhanced attribute\n");
678 return -EMEDIUMTYPE;
679 }
680
681 err = mmc_send_ext_csd(mmc, ext_csd);
682 if (err)
683 return err;
684
685 max_enh_size_mult =
686 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
687 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
688 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
689 if (tot_enh_size_mult > max_enh_size_mult) {
690 printf("Total enhanced size exceeds maximum (%u > %u)\n",
691 tot_enh_size_mult, max_enh_size_mult);
692 return -EMEDIUMTYPE;
693 }
694
Diego Santa Cruz80200272014-12-23 10:50:31 +0100695 /* The default value of EXT_CSD_WR_REL_SET is device
696 * dependent, the values can only be changed if the
697 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
698 * changed only once and before partitioning is completed. */
699 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
700 if (conf->user.wr_rel_change) {
701 if (conf->user.wr_rel_set)
702 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
703 else
704 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
705 }
706 for (pidx = 0; pidx < 4; pidx++) {
707 if (conf->gp_part[pidx].wr_rel_change) {
708 if (conf->gp_part[pidx].wr_rel_set)
709 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
710 else
711 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
712 }
713 }
714
715 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
716 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
717 puts("Card does not support host controlled partition write "
718 "reliability settings\n");
719 return -EMEDIUMTYPE;
720 }
721
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100722 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
723 EXT_CSD_PARTITION_SETTING_COMPLETED) {
724 printf("Card already partitioned\n");
725 return -EPERM;
726 }
727
728 if (mode == MMC_HWPART_CONF_CHECK)
729 return 0;
730
731 /* Partitioning requires high-capacity size definitions */
732 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
733 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
734 EXT_CSD_ERASE_GROUP_DEF, 1);
735
736 if (err)
737 return err;
738
739 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
740
741 /* update erase group size to be high-capacity */
742 mmc->erase_grp_size =
743 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
744
745 }
746
747 /* all OK, write the configuration */
748 for (i = 0; i < 4; i++) {
749 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
750 EXT_CSD_ENH_START_ADDR+i,
751 (enh_start_addr >> (i*8)) & 0xFF);
752 if (err)
753 return err;
754 }
755 for (i = 0; i < 3; i++) {
756 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
757 EXT_CSD_ENH_SIZE_MULT+i,
758 (enh_size_mult >> (i*8)) & 0xFF);
759 if (err)
760 return err;
761 }
762 for (pidx = 0; pidx < 4; pidx++) {
763 for (i = 0; i < 3; i++) {
764 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
765 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
766 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
767 if (err)
768 return err;
769 }
770 }
771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
772 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
773 if (err)
774 return err;
775
776 if (mode == MMC_HWPART_CONF_SET)
777 return 0;
778
Diego Santa Cruz80200272014-12-23 10:50:31 +0100779 /* The WR_REL_SET is a write-once register but shall be
780 * written before setting PART_SETTING_COMPLETED. As it is
781 * write-once we can only write it when completing the
782 * partitioning. */
783 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
784 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
785 EXT_CSD_WR_REL_SET, wr_rel_set);
786 if (err)
787 return err;
788 }
789
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100790 /* Setting PART_SETTING_COMPLETED confirms the partition
791 * configuration but it only becomes effective after power
792 * cycle, so we do not adjust the partition related settings
793 * in the mmc struct. */
794
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_PARTITION_SETTING,
797 EXT_CSD_PARTITION_SETTING_COMPLETED);
798 if (err)
799 return err;
800
801 return 0;
802}
803
Thierry Redingb9c8b772012-01-02 01:15:37 +0000804int mmc_getcd(struct mmc *mmc)
805{
806 int cd;
807
808 cd = board_mmc_getcd(mmc);
809
Peter Korsgaardf7b15102013-03-21 04:00:03 +0000810 if (cd < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200811 if (mmc->cfg->ops->getcd)
812 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +0000813 else
814 cd = 1;
815 }
Thierry Redingb9c8b772012-01-02 01:15:37 +0000816
817 return cd;
818}
819
Kim Phillips87ea3892012-10-29 13:34:43 +0000820static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Flemingad347bb2008-10-30 16:41:01 -0500821{
822 struct mmc_cmd cmd;
823 struct mmc_data data;
824
825 /* Switch the frequency */
826 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
827 cmd.resp_type = MMC_RSP_R1;
828 cmd.cmdarg = (mode << 31) | 0xffffff;
829 cmd.cmdarg &= ~(0xf << (group * 4));
830 cmd.cmdarg |= value << (group * 4);
Andy Flemingad347bb2008-10-30 16:41:01 -0500831
832 data.dest = (char *)resp;
833 data.blocksize = 64;
834 data.blocks = 1;
835 data.flags = MMC_DATA_READ;
836
837 return mmc_send_cmd(mmc, &cmd, &data);
838}
839
840
Kim Phillips87ea3892012-10-29 13:34:43 +0000841static int sd_change_freq(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500842{
843 int err;
844 struct mmc_cmd cmd;
Anton staaf9b00f0d2011-10-03 13:54:59 +0000845 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
846 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Flemingad347bb2008-10-30 16:41:01 -0500847 struct mmc_data data;
848 int timeout;
849
850 mmc->card_caps = 0;
851
Thomas Chou1254c3d2010-12-24 13:12:21 +0000852 if (mmc_host_is_spi(mmc))
853 return 0;
854
Andy Flemingad347bb2008-10-30 16:41:01 -0500855 /* Read the SCR to find out if this card supports higher speeds */
856 cmd.cmdidx = MMC_CMD_APP_CMD;
857 cmd.resp_type = MMC_RSP_R1;
858 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -0500859
860 err = mmc_send_cmd(mmc, &cmd, NULL);
861
862 if (err)
863 return err;
864
865 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
866 cmd.resp_type = MMC_RSP_R1;
867 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500868
869 timeout = 3;
870
871retry_scr:
Anton staaf9b00f0d2011-10-03 13:54:59 +0000872 data.dest = (char *)scr;
Andy Flemingad347bb2008-10-30 16:41:01 -0500873 data.blocksize = 8;
874 data.blocks = 1;
875 data.flags = MMC_DATA_READ;
876
877 err = mmc_send_cmd(mmc, &cmd, &data);
878
879 if (err) {
880 if (timeout--)
881 goto retry_scr;
882
883 return err;
884 }
885
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300886 mmc->scr[0] = __be32_to_cpu(scr[0]);
887 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Flemingad347bb2008-10-30 16:41:01 -0500888
889 switch ((mmc->scr[0] >> 24) & 0xf) {
890 case 0:
891 mmc->version = SD_VERSION_1_0;
892 break;
893 case 1:
894 mmc->version = SD_VERSION_1_10;
895 break;
896 case 2:
897 mmc->version = SD_VERSION_2;
Jaehoon Chungd552bd12013-01-29 22:58:16 +0000898 if ((mmc->scr[0] >> 15) & 0x1)
899 mmc->version = SD_VERSION_3;
Andy Flemingad347bb2008-10-30 16:41:01 -0500900 break;
901 default:
902 mmc->version = SD_VERSION_1_0;
903 break;
904 }
905
Alagu Sankar24bb5ab2010-05-12 15:08:24 +0530906 if (mmc->scr[0] & SD_DATA_4BIT)
907 mmc->card_caps |= MMC_MODE_4BIT;
908
Andy Flemingad347bb2008-10-30 16:41:01 -0500909 /* Version 1.0 doesn't support switching */
910 if (mmc->version == SD_VERSION_1_0)
911 return 0;
912
913 timeout = 4;
914 while (timeout--) {
915 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaf9b00f0d2011-10-03 13:54:59 +0000916 (u8 *)switch_status);
Andy Flemingad347bb2008-10-30 16:41:01 -0500917
918 if (err)
919 return err;
920
921 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300922 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Flemingad347bb2008-10-30 16:41:01 -0500923 break;
924 }
925
Andy Flemingad347bb2008-10-30 16:41:01 -0500926 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300927 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Flemingad347bb2008-10-30 16:41:01 -0500928 return 0;
929
Macpaul Lin24e92ec2011-11-28 16:31:09 +0000930 /*
931 * If the host doesn't support SD_HIGHSPEED, do not switch card to
932 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
933 * This can avoid furthur problem when the card runs in different
934 * mode between the host.
935 */
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200936 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
937 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin24e92ec2011-11-28 16:31:09 +0000938 return 0;
939
Anton staaf9b00f0d2011-10-03 13:54:59 +0000940 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Flemingad347bb2008-10-30 16:41:01 -0500941
942 if (err)
943 return err;
944
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300945 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Flemingad347bb2008-10-30 16:41:01 -0500946 mmc->card_caps |= MMC_MODE_HS;
947
948 return 0;
949}
950
951/* frequency bases */
952/* divided by 10 to be nice to platforms without floating point */
Mike Frysingerb588caf2010-10-20 01:15:53 +0000953static const int fbase[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -0500954 10000,
955 100000,
956 1000000,
957 10000000,
958};
959
960/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
961 * to platforms without floating point.
962 */
Mike Frysingerb588caf2010-10-20 01:15:53 +0000963static const int multipliers[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -0500964 0, /* reserved */
965 10,
966 12,
967 13,
968 15,
969 20,
970 25,
971 30,
972 35,
973 40,
974 45,
975 50,
976 55,
977 60,
978 70,
979 80,
980};
981
Kim Phillips87ea3892012-10-29 13:34:43 +0000982static void mmc_set_ios(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500983{
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200984 if (mmc->cfg->ops->set_ios)
985 mmc->cfg->ops->set_ios(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -0500986}
987
988void mmc_set_clock(struct mmc *mmc, uint clock)
989{
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200990 if (clock > mmc->cfg->f_max)
991 clock = mmc->cfg->f_max;
Andy Flemingad347bb2008-10-30 16:41:01 -0500992
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200993 if (clock < mmc->cfg->f_min)
994 clock = mmc->cfg->f_min;
Andy Flemingad347bb2008-10-30 16:41:01 -0500995
996 mmc->clock = clock;
997
998 mmc_set_ios(mmc);
999}
1000
Kim Phillips87ea3892012-10-29 13:34:43 +00001001static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Flemingad347bb2008-10-30 16:41:01 -05001002{
1003 mmc->bus_width = width;
1004
1005 mmc_set_ios(mmc);
1006}
1007
Kim Phillips87ea3892012-10-29 13:34:43 +00001008static int mmc_startup(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001009{
Stephen Warrene315ae82013-06-11 15:14:01 -06001010 int err, i;
Andy Flemingad347bb2008-10-30 16:41:01 -05001011 uint mult, freq;
Yoshihiro Shimoda7d88de52011-07-04 22:13:26 +00001012 u64 cmult, csize, capacity;
Andy Flemingad347bb2008-10-30 16:41:01 -05001013 struct mmc_cmd cmd;
Simon Glassa09c2b72013-04-03 08:54:30 +00001014 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1015 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +00001016 int timeout = 1000;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001017 bool has_parts = false;
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001018 bool part_completed;
Andy Flemingad347bb2008-10-30 16:41:01 -05001019
Thomas Chou1254c3d2010-12-24 13:12:21 +00001020#ifdef CONFIG_MMC_SPI_CRC_ON
1021 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1022 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1023 cmd.resp_type = MMC_RSP_R1;
1024 cmd.cmdarg = 1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001025 err = mmc_send_cmd(mmc, &cmd, NULL);
1026
1027 if (err)
1028 return err;
1029 }
1030#endif
1031
Andy Flemingad347bb2008-10-30 16:41:01 -05001032 /* Put the Card in Identify Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001033 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1034 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Flemingad347bb2008-10-30 16:41:01 -05001035 cmd.resp_type = MMC_RSP_R2;
1036 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05001037
1038 err = mmc_send_cmd(mmc, &cmd, NULL);
1039
1040 if (err)
1041 return err;
1042
1043 memcpy(mmc->cid, cmd.response, 16);
1044
1045 /*
1046 * For MMC cards, set the Relative Address.
1047 * For SD cards, get the Relatvie Address.
1048 * This also puts the cards into Standby State
1049 */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001050 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1051 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1052 cmd.cmdarg = mmc->rca << 16;
1053 cmd.resp_type = MMC_RSP_R6;
Andy Flemingad347bb2008-10-30 16:41:01 -05001054
Thomas Chou1254c3d2010-12-24 13:12:21 +00001055 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05001056
Thomas Chou1254c3d2010-12-24 13:12:21 +00001057 if (err)
1058 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001059
Thomas Chou1254c3d2010-12-24 13:12:21 +00001060 if (IS_SD(mmc))
1061 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1062 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001063
1064 /* Get the Card-Specific Data */
1065 cmd.cmdidx = MMC_CMD_SEND_CSD;
1066 cmd.resp_type = MMC_RSP_R2;
1067 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05001068
1069 err = mmc_send_cmd(mmc, &cmd, NULL);
1070
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +00001071 /* Waiting for the ready status */
1072 mmc_send_status(mmc, timeout);
1073
Andy Flemingad347bb2008-10-30 16:41:01 -05001074 if (err)
1075 return err;
1076
Rabin Vincentb6eed942009-04-05 13:30:56 +05301077 mmc->csd[0] = cmd.response[0];
1078 mmc->csd[1] = cmd.response[1];
1079 mmc->csd[2] = cmd.response[2];
1080 mmc->csd[3] = cmd.response[3];
Andy Flemingad347bb2008-10-30 16:41:01 -05001081
1082 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincentbdf7a682009-04-05 13:30:55 +05301083 int version = (cmd.response[0] >> 26) & 0xf;
Andy Flemingad347bb2008-10-30 16:41:01 -05001084
1085 switch (version) {
1086 case 0:
1087 mmc->version = MMC_VERSION_1_2;
1088 break;
1089 case 1:
1090 mmc->version = MMC_VERSION_1_4;
1091 break;
1092 case 2:
1093 mmc->version = MMC_VERSION_2_2;
1094 break;
1095 case 3:
1096 mmc->version = MMC_VERSION_3;
1097 break;
1098 case 4:
1099 mmc->version = MMC_VERSION_4;
1100 break;
1101 default:
1102 mmc->version = MMC_VERSION_1_2;
1103 break;
1104 }
1105 }
1106
1107 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincentbdf7a682009-04-05 13:30:55 +05301108 freq = fbase[(cmd.response[0] & 0x7)];
1109 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Flemingad347bb2008-10-30 16:41:01 -05001110
1111 mmc->tran_speed = freq * mult;
1112
Markus Niebel03951412013-12-16 13:40:46 +01001113 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincentb6eed942009-04-05 13:30:56 +05301114 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Flemingad347bb2008-10-30 16:41:01 -05001115
1116 if (IS_SD(mmc))
1117 mmc->write_bl_len = mmc->read_bl_len;
1118 else
Rabin Vincentb6eed942009-04-05 13:30:56 +05301119 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Flemingad347bb2008-10-30 16:41:01 -05001120
1121 if (mmc->high_capacity) {
1122 csize = (mmc->csd[1] & 0x3f) << 16
1123 | (mmc->csd[2] & 0xffff0000) >> 16;
1124 cmult = 8;
1125 } else {
1126 csize = (mmc->csd[1] & 0x3ff) << 2
1127 | (mmc->csd[2] & 0xc0000000) >> 30;
1128 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1129 }
1130
Stephen Warrene315ae82013-06-11 15:14:01 -06001131 mmc->capacity_user = (csize + 1) << (cmult + 2);
1132 mmc->capacity_user *= mmc->read_bl_len;
1133 mmc->capacity_boot = 0;
1134 mmc->capacity_rpmb = 0;
1135 for (i = 0; i < 4; i++)
1136 mmc->capacity_gp[i] = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05001137
Simon Glassa09c2b72013-04-03 08:54:30 +00001138 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1139 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -05001140
Simon Glassa09c2b72013-04-03 08:54:30 +00001141 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1142 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -05001143
Markus Niebel03951412013-12-16 13:40:46 +01001144 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1145 cmd.cmdidx = MMC_CMD_SET_DSR;
1146 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1147 cmd.resp_type = MMC_RSP_NONE;
1148 if (mmc_send_cmd(mmc, &cmd, NULL))
1149 printf("MMC: SET_DSR failed\n");
1150 }
1151
Andy Flemingad347bb2008-10-30 16:41:01 -05001152 /* Select the card, and put it into Transfer Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001153 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1154 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargav4a32fba2011-10-05 03:13:23 +00001155 cmd.resp_type = MMC_RSP_R1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001156 cmd.cmdarg = mmc->rca << 16;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001157 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05001158
Thomas Chou1254c3d2010-12-24 13:12:21 +00001159 if (err)
1160 return err;
1161 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001162
Lei Wenea526762011-06-22 17:03:31 +00001163 /*
1164 * For SD, its erase group is always one sector
1165 */
1166 mmc->erase_grp_size = 1;
Lei Wen31b99802011-05-02 16:26:26 +00001167 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301168 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1169 /* check ext_csd version and capacity */
1170 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruzca25e062014-12-23 10:50:28 +01001171 if (err)
1172 return err;
1173 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda7d88de52011-07-04 22:13:26 +00001174 /*
1175 * According to the JEDEC Standard, the value of
1176 * ext_csd's capacity is valid if the value is more
1177 * than 2GB
1178 */
Lei Wen217467f2011-10-03 20:35:10 +00001179 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1180 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1181 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1182 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glassa09c2b72013-04-03 08:54:30 +00001183 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewski237823e2011-07-05 02:19:44 +00001184 if ((capacity >> 20) > 2 * 1024)
Stephen Warrene315ae82013-06-11 15:14:01 -06001185 mmc->capacity_user = capacity;
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301186 }
Lei Wen31b99802011-05-02 16:26:26 +00001187
Jaehoon Chung6108ef62013-01-29 19:31:16 +00001188 switch (ext_csd[EXT_CSD_REV]) {
1189 case 1:
1190 mmc->version = MMC_VERSION_4_1;
1191 break;
1192 case 2:
1193 mmc->version = MMC_VERSION_4_2;
1194 break;
1195 case 3:
1196 mmc->version = MMC_VERSION_4_3;
1197 break;
1198 case 5:
1199 mmc->version = MMC_VERSION_4_41;
1200 break;
1201 case 6:
1202 mmc->version = MMC_VERSION_4_5;
1203 break;
Markus Niebel32f53b62014-11-18 15:13:53 +01001204 case 7:
1205 mmc->version = MMC_VERSION_5_0;
1206 break;
Jaehoon Chung6108ef62013-01-29 19:31:16 +00001207 }
1208
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001209 /* The partition data may be non-zero but it is only
1210 * effective if PARTITION_SETTING_COMPLETED is set in
1211 * EXT_CSD, so ignore any data if this bit is not set,
1212 * except for enabling the high-capacity group size
1213 * definition (see below). */
1214 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1215 EXT_CSD_PARTITION_SETTING_COMPLETED);
1216
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001217 /* store the partition info of emmc */
1218 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1219 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1220 ext_csd[EXT_CSD_BOOT_MULT])
1221 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001222 if (part_completed &&
1223 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001224 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1225
1226 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1227
1228 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1229
1230 for (i = 0; i < 4; i++) {
1231 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001232 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001233 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001234 if (mult)
1235 has_parts = true;
1236 if (!part_completed)
1237 continue;
1238 mmc->capacity_gp[i] = mult;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001239 mmc->capacity_gp[i] *=
1240 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1241 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruze5a2a3a2014-12-23 10:50:21 +01001242 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001243 }
1244
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001245 if (part_completed) {
1246 mmc->enh_user_size =
1247 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1248 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1249 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1250 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1251 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1252 mmc->enh_user_size <<= 19;
1253 mmc->enh_user_start =
1254 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1255 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1256 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1257 ext_csd[EXT_CSD_ENH_START_ADDR];
1258 if (mmc->high_capacity)
1259 mmc->enh_user_start <<= 9;
1260 }
Diego Santa Cruz3b62d842014-12-23 10:50:22 +01001261
Lei Wenea526762011-06-22 17:03:31 +00001262 /*
Oliver Metzb3f14092013-10-01 20:32:07 +02001263 * Host needs to enable ERASE_GRP_DEF bit if device is
1264 * partitioned. This bit will be lost every time after a reset
1265 * or power off. This will affect erase size.
Lei Wenea526762011-06-22 17:03:31 +00001266 */
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001267 if (part_completed)
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001268 has_parts = true;
Oliver Metzb3f14092013-10-01 20:32:07 +02001269 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001270 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1271 has_parts = true;
1272 if (has_parts) {
Oliver Metzb3f14092013-10-01 20:32:07 +02001273 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1274 EXT_CSD_ERASE_GROUP_DEF, 1);
1275
1276 if (err)
1277 return err;
Hannes Petermaier15e874d2014-08-08 09:47:22 +02001278 else
1279 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001280 }
Oliver Metzb3f14092013-10-01 20:32:07 +02001281
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001282 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metzb3f14092013-10-01 20:32:07 +02001283 /* Read out group size from ext_csd */
Lei Wen217467f2011-10-03 20:35:10 +00001284 mmc->erase_grp_size =
Diego Santa Cruz747f6fa2014-12-23 10:50:24 +01001285 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebel6d398922014-11-18 15:11:42 +01001286 /*
1287 * if high capacity and partition setting completed
1288 * SEC_COUNT is valid even if it is smaller than 2 GiB
1289 * JEDEC Standard JESD84-B45, 6.2.4
1290 */
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001291 if (mmc->high_capacity && part_completed) {
Markus Niebel6d398922014-11-18 15:11:42 +01001292 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1293 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1294 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1295 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1296 capacity *= MMC_MAX_BLOCK_LEN;
1297 mmc->capacity_user = capacity;
1298 }
Simon Glassa09c2b72013-04-03 08:54:30 +00001299 } else {
Oliver Metzb3f14092013-10-01 20:32:07 +02001300 /* Calculate the group size from the csd value. */
Lei Wenea526762011-06-22 17:03:31 +00001301 int erase_gsz, erase_gmul;
1302 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1303 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1304 mmc->erase_grp_size = (erase_gsz + 1)
1305 * (erase_gmul + 1);
1306 }
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001307
1308 mmc->hc_wp_grp_size = 1024
1309 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1310 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz37a50b92014-12-23 10:50:33 +01001311
1312 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301313 }
1314
Stephen Warrene315ae82013-06-11 15:14:01 -06001315 err = mmc_set_capacity(mmc, mmc->part_num);
1316 if (err)
1317 return err;
1318
Andy Flemingad347bb2008-10-30 16:41:01 -05001319 if (IS_SD(mmc))
1320 err = sd_change_freq(mmc);
1321 else
1322 err = mmc_change_freq(mmc);
1323
1324 if (err)
1325 return err;
1326
1327 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001328 mmc->card_caps &= mmc->cfg->host_caps;
Andy Flemingad347bb2008-10-30 16:41:01 -05001329
1330 if (IS_SD(mmc)) {
1331 if (mmc->card_caps & MMC_MODE_4BIT) {
1332 cmd.cmdidx = MMC_CMD_APP_CMD;
1333 cmd.resp_type = MMC_RSP_R1;
1334 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05001335
1336 err = mmc_send_cmd(mmc, &cmd, NULL);
1337 if (err)
1338 return err;
1339
1340 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1341 cmd.resp_type = MMC_RSP_R1;
1342 cmd.cmdarg = 2;
Andy Flemingad347bb2008-10-30 16:41:01 -05001343 err = mmc_send_cmd(mmc, &cmd, NULL);
1344 if (err)
1345 return err;
1346
1347 mmc_set_bus_width(mmc, 4);
1348 }
1349
1350 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001351 mmc->tran_speed = 50000000;
Andy Flemingad347bb2008-10-30 16:41:01 -05001352 else
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001353 mmc->tran_speed = 25000000;
Andrew Gabbasovccb7b042014-12-25 10:22:25 -06001354 } else if (mmc->version >= MMC_VERSION_4) {
1355 /* Only version 4 of MMC supports wider bus widths */
Andy Flemingeb766ad2012-10-31 19:02:38 +00001356 int idx;
1357
1358 /* An array of possible bus widths in order of preference */
1359 static unsigned ext_csd_bits[] = {
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001360 EXT_CSD_DDR_BUS_WIDTH_8,
1361 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001362 EXT_CSD_BUS_WIDTH_8,
1363 EXT_CSD_BUS_WIDTH_4,
1364 EXT_CSD_BUS_WIDTH_1,
1365 };
1366
1367 /* An array to map CSD bus widths to host cap bits */
1368 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001369 [EXT_CSD_DDR_BUS_WIDTH_4] =
1370 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1371 [EXT_CSD_DDR_BUS_WIDTH_8] =
1372 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001373 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1374 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1375 };
1376
1377 /* An array to map chosen bus width to an integer */
1378 static unsigned widths[] = {
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001379 8, 4, 8, 4, 1,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001380 };
1381
1382 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1383 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001384 unsigned int caps = ext_to_hostcaps[extw];
Andy Flemingeb766ad2012-10-31 19:02:38 +00001385
1386 /*
Andrew Gabbasovc1b2cf02014-12-25 10:22:24 -06001387 * If the bus width is still not changed,
1388 * don't try to set the default again.
1389 * Otherwise, recover from switch attempts
1390 * by switching to 1-bit bus width.
1391 */
1392 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1393 mmc->bus_width == 1) {
1394 err = 0;
1395 break;
1396 }
1397
1398 /*
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001399 * Check to make sure the card and controller support
1400 * these capabilities
Andy Flemingeb766ad2012-10-31 19:02:38 +00001401 */
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001402 if ((mmc->card_caps & caps) != caps)
Andy Flemingeb766ad2012-10-31 19:02:38 +00001403 continue;
1404
Andy Flemingad347bb2008-10-30 16:41:01 -05001405 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001406 EXT_CSD_BUS_WIDTH, extw);
Andy Flemingad347bb2008-10-30 16:41:01 -05001407
1408 if (err)
Lei Wen4f5a6a52011-10-03 20:35:11 +00001409 continue;
Andy Flemingad347bb2008-10-30 16:41:01 -05001410
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001411 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Flemingeb766ad2012-10-31 19:02:38 +00001412 mmc_set_bus_width(mmc, widths[idx]);
Andy Flemingad347bb2008-10-30 16:41:01 -05001413
Lei Wen4f5a6a52011-10-03 20:35:11 +00001414 err = mmc_send_ext_csd(mmc, test_csd);
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001415
1416 if (err)
1417 continue;
Andy Flemingad347bb2008-10-30 16:41:01 -05001418
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001419 /* Only compare read only fields */
1420 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1421 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1422 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1423 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1424 ext_csd[EXT_CSD_REV]
1425 == test_csd[EXT_CSD_REV] &&
1426 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1427 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1428 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1429 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen4f5a6a52011-10-03 20:35:11 +00001430 break;
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001431 else
1432 err = SWITCH_ERR;
Andy Flemingad347bb2008-10-30 16:41:01 -05001433 }
1434
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001435 if (err)
1436 return err;
1437
Andy Flemingad347bb2008-10-30 16:41:01 -05001438 if (mmc->card_caps & MMC_MODE_HS) {
1439 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001440 mmc->tran_speed = 52000000;
Andy Flemingad347bb2008-10-30 16:41:01 -05001441 else
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001442 mmc->tran_speed = 26000000;
1443 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001444 }
1445
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001446 mmc_set_clock(mmc, mmc->tran_speed);
1447
Andrew Gabbasov532663b2014-12-01 06:59:11 -06001448 /* Fix the block length for DDR mode */
1449 if (mmc->ddr_mode) {
1450 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1451 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1452 }
1453
Andy Flemingad347bb2008-10-30 16:41:01 -05001454 /* fill in device description */
1455 mmc->block_dev.lun = 0;
1456 mmc->block_dev.type = 0;
1457 mmc->block_dev.blksz = mmc->read_bl_len;
Egbert Eich2eec2ab2013-04-09 21:11:56 +00001458 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
Rabin Vincent69d4e2c2009-04-05 13:30:54 +05301459 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001460#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Taylor Hutt7367ec22012-10-20 17:15:59 +00001461 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1462 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1463 (mmc->cid[3] >> 16) & 0xffff);
1464 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1465 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1466 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1467 (mmc->cid[2] >> 24) & 0xff);
1468 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1469 (mmc->cid[2] >> 16) & 0xf);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001470#else
1471 mmc->block_dev.vendor[0] = 0;
1472 mmc->block_dev.product[0] = 0;
1473 mmc->block_dev.revision[0] = 0;
1474#endif
Mikhail Kshevetskiy5cbfa8e7a2012-07-09 08:53:38 +00001475#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -05001476 init_part(&mmc->block_dev);
Mikhail Kshevetskiy5cbfa8e7a2012-07-09 08:53:38 +00001477#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001478
1479 return 0;
1480}
1481
Kim Phillips87ea3892012-10-29 13:34:43 +00001482static int mmc_send_if_cond(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001483{
1484 struct mmc_cmd cmd;
1485 int err;
1486
1487 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1488 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001489 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Flemingad347bb2008-10-30 16:41:01 -05001490 cmd.resp_type = MMC_RSP_R7;
Andy Flemingad347bb2008-10-30 16:41:01 -05001491
1492 err = mmc_send_cmd(mmc, &cmd, NULL);
1493
1494 if (err)
1495 return err;
1496
Rabin Vincentb6eed942009-04-05 13:30:56 +05301497 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Flemingad347bb2008-10-30 16:41:01 -05001498 return UNUSABLE_ERR;
1499 else
1500 mmc->version = SD_VERSION_2;
1501
1502 return 0;
1503}
1504
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001505/* not used any more */
1506int __deprecated mmc_register(struct mmc *mmc)
1507{
1508#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1509 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1510#endif
1511 return -1;
1512}
1513
1514struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
Andy Flemingad347bb2008-10-30 16:41:01 -05001515{
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001516 struct mmc *mmc;
1517
1518 /* quick validation */
1519 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1520 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1521 return NULL;
1522
1523 mmc = calloc(1, sizeof(*mmc));
1524 if (mmc == NULL)
1525 return NULL;
1526
1527 mmc->cfg = cfg;
1528 mmc->priv = priv;
1529
1530 /* the following chunk was mmc_register() */
1531
Markus Niebel03951412013-12-16 13:40:46 +01001532 /* Setup dsr related values */
1533 mmc->dsr_imp = 0;
1534 mmc->dsr = 0xffffffff;
Andy Flemingad347bb2008-10-30 16:41:01 -05001535 /* Setup the universal parts of the block interface just once */
1536 mmc->block_dev.if_type = IF_TYPE_MMC;
1537 mmc->block_dev.dev = cur_dev_num++;
1538 mmc->block_dev.removable = 1;
1539 mmc->block_dev.block_read = mmc_bread;
1540 mmc->block_dev.block_write = mmc_bwrite;
Lei Wenea526762011-06-22 17:03:31 +00001541 mmc->block_dev.block_erase = mmc_berase;
Andy Flemingad347bb2008-10-30 16:41:01 -05001542
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001543 /* setup initial part type */
1544 mmc->block_dev.part_type = mmc->cfg->part_type;
Andy Flemingad347bb2008-10-30 16:41:01 -05001545
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001546 INIT_LIST_HEAD(&mmc->link);
Andy Flemingad347bb2008-10-30 16:41:01 -05001547
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001548 list_add_tail(&mmc->link, &mmc_devices);
1549
1550 return mmc;
1551}
1552
1553void mmc_destroy(struct mmc *mmc)
1554{
1555 /* only freeing memory for now */
1556 free(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001557}
1558
Matthew McClintock6252b4f2011-05-24 05:31:19 +00001559#ifdef CONFIG_PARTITIONS
Andy Flemingad347bb2008-10-30 16:41:01 -05001560block_dev_desc_t *mmc_get_dev(int dev)
1561{
1562 struct mmc *mmc = find_mmc_device(dev);
Benoît Thébaudeau6ce8aed2012-08-10 08:59:12 +00001563 if (!mmc || mmc_init(mmc))
Łukasz Majewski65b04cf2012-04-19 02:39:18 +00001564 return NULL;
Andy Flemingad347bb2008-10-30 16:41:01 -05001565
Łukasz Majewski65b04cf2012-04-19 02:39:18 +00001566 return &mmc->block_dev;
Andy Flemingad347bb2008-10-30 16:41:01 -05001567}
Matthew McClintock6252b4f2011-05-24 05:31:19 +00001568#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001569
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01001570/* board-specific MMC power initializations. */
1571__weak void board_mmc_power_init(void)
1572{
1573}
1574
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001575int mmc_start_init(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001576{
Macpaul Lin028bde12011-11-14 23:35:39 +00001577 int err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001578
Pantelis Antoniouc9e75912014-02-26 19:28:45 +02001579 /* we pretend there's no card when init is NULL */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001580 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Redingb9c8b772012-01-02 01:15:37 +00001581 mmc->has_init = 0;
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001582#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Redingb9c8b772012-01-02 01:15:37 +00001583 printf("MMC: no card present\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001584#endif
Thierry Redingb9c8b772012-01-02 01:15:37 +00001585 return NO_CARD_ERR;
1586 }
1587
Lei Wen31b99802011-05-02 16:26:26 +00001588 if (mmc->has_init)
1589 return 0;
1590
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01001591 board_mmc_power_init();
1592
Pantelis Antoniouc9e75912014-02-26 19:28:45 +02001593 /* made sure it's not NULL earlier */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001594 err = mmc->cfg->ops->init(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001595
1596 if (err)
1597 return err;
1598
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001599 mmc->ddr_mode = 0;
Ilya Yanok8459aab2009-06-29 17:53:16 +04001600 mmc_set_bus_width(mmc, 1);
1601 mmc_set_clock(mmc, 1);
1602
Andy Flemingad347bb2008-10-30 16:41:01 -05001603 /* Reset the Card */
1604 err = mmc_go_idle(mmc);
1605
1606 if (err)
1607 return err;
1608
Lei Wen31b99802011-05-02 16:26:26 +00001609 /* The internal partition reset to user partition(0) at every CMD0*/
1610 mmc->part_num = 0;
1611
Andy Flemingad347bb2008-10-30 16:41:01 -05001612 /* Test for SD version 2 */
Macpaul Lin028bde12011-11-14 23:35:39 +00001613 err = mmc_send_if_cond(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001614
Andy Flemingad347bb2008-10-30 16:41:01 -05001615 /* Now try to get the SD card's operating condition */
1616 err = sd_send_op_cond(mmc);
1617
1618 /* If the command timed out, we check for an MMC card */
1619 if (err == TIMEOUT) {
1620 err = mmc_send_op_cond(mmc);
1621
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001622 if (err && err != IN_PROGRESS) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001623#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -05001624 printf("Card did not respond to voltage select!\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001625#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001626 return UNUSABLE_ERR;
1627 }
1628 }
1629
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001630 if (err == IN_PROGRESS)
1631 mmc->init_in_progress = 1;
1632
1633 return err;
1634}
1635
1636static int mmc_complete_init(struct mmc *mmc)
1637{
1638 int err = 0;
1639
1640 if (mmc->op_cond_pending)
1641 err = mmc_complete_op_cond(mmc);
1642
1643 if (!err)
1644 err = mmc_startup(mmc);
Lei Wen31b99802011-05-02 16:26:26 +00001645 if (err)
1646 mmc->has_init = 0;
1647 else
1648 mmc->has_init = 1;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001649 mmc->init_in_progress = 0;
Lei Wen31b99802011-05-02 16:26:26 +00001650 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001651}
1652
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001653int mmc_init(struct mmc *mmc)
1654{
1655 int err = IN_PROGRESS;
Mateusz Zalegada351782014-04-29 20:15:30 +02001656 unsigned start;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001657
1658 if (mmc->has_init)
1659 return 0;
Mateusz Zalegada351782014-04-29 20:15:30 +02001660
1661 start = get_timer(0);
1662
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001663 if (!mmc->init_in_progress)
1664 err = mmc_start_init(mmc);
1665
1666 if (!err || err == IN_PROGRESS)
1667 err = mmc_complete_init(mmc);
1668 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1669 return err;
1670}
1671
Markus Niebel03951412013-12-16 13:40:46 +01001672int mmc_set_dsr(struct mmc *mmc, u16 val)
1673{
1674 mmc->dsr = val;
1675 return 0;
1676}
1677
Jeroen Hofstee47726302014-07-10 22:46:28 +02001678/* CPU-specific MMC initializations */
1679__weak int cpu_mmc_init(bd_t *bis)
Andy Flemingad347bb2008-10-30 16:41:01 -05001680{
1681 return -1;
1682}
1683
Jeroen Hofstee47726302014-07-10 22:46:28 +02001684/* board-specific MMC initializations. */
1685__weak int board_mmc_init(bd_t *bis)
1686{
1687 return -1;
1688}
Andy Flemingad347bb2008-10-30 16:41:01 -05001689
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001690#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1691
Andy Flemingad347bb2008-10-30 16:41:01 -05001692void print_mmc_devices(char separator)
1693{
1694 struct mmc *m;
1695 struct list_head *entry;
Przemyslaw Marczak7bc4e302015-02-20 12:29:27 +01001696 char *mmc_type;
Andy Flemingad347bb2008-10-30 16:41:01 -05001697
1698 list_for_each(entry, &mmc_devices) {
1699 m = list_entry(entry, struct mmc, link);
1700
Przemyslaw Marczak7bc4e302015-02-20 12:29:27 +01001701 if (m->has_init)
1702 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1703 else
1704 mmc_type = NULL;
1705
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001706 printf("%s: %d", m->cfg->name, m->block_dev.dev);
Przemyslaw Marczak7bc4e302015-02-20 12:29:27 +01001707 if (mmc_type)
1708 printf(" (%s)", mmc_type);
Andy Flemingad347bb2008-10-30 16:41:01 -05001709
Lubomir Popov456104e2014-11-11 12:25:42 +02001710 if (entry->next != &mmc_devices) {
1711 printf("%c", separator);
1712 if (separator != '\n')
1713 puts (" ");
1714 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001715 }
1716
1717 printf("\n");
1718}
1719
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001720#else
1721void print_mmc_devices(char separator) { }
1722#endif
1723
Lei Wend430d7c2011-05-02 16:26:25 +00001724int get_mmc_num(void)
1725{
1726 return cur_dev_num;
1727}
1728
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001729void mmc_set_preinit(struct mmc *mmc, int preinit)
1730{
1731 mmc->preinit = preinit;
1732}
1733
1734static void do_preinit(void)
1735{
1736 struct mmc *m;
1737 struct list_head *entry;
1738
1739 list_for_each(entry, &mmc_devices) {
1740 m = list_entry(entry, struct mmc, link);
1741
1742 if (m->preinit)
1743 mmc_start_init(m);
1744 }
1745}
1746
1747
Andy Flemingad347bb2008-10-30 16:41:01 -05001748int mmc_initialize(bd_t *bis)
1749{
1750 INIT_LIST_HEAD (&mmc_devices);
1751 cur_dev_num = 0;
1752
1753 if (board_mmc_init(bis) < 0)
1754 cpu_mmc_init(bis);
1755
Ying Zhang9ff70262013-08-16 15:16:11 +08001756#ifndef CONFIG_SPL_BUILD
Andy Flemingad347bb2008-10-30 16:41:01 -05001757 print_mmc_devices(',');
Ying Zhang9ff70262013-08-16 15:16:11 +08001758#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001759
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001760 do_preinit();
Andy Flemingad347bb2008-10-30 16:41:01 -05001761 return 0;
1762}
Amar1104e9b2013-04-27 11:42:58 +05301763
1764#ifdef CONFIG_SUPPORT_EMMC_BOOT
1765/*
1766 * This function changes the size of boot partition and the size of rpmb
1767 * partition present on EMMC devices.
1768 *
1769 * Input Parameters:
1770 * struct *mmc: pointer for the mmc device strcuture
1771 * bootsize: size of boot partition
1772 * rpmbsize: size of rpmb partition
1773 *
1774 * Returns 0 on success.
1775 */
1776
1777int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1778 unsigned long rpmbsize)
1779{
1780 int err;
1781 struct mmc_cmd cmd;
1782
1783 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1784 cmd.cmdidx = MMC_CMD_RES_MAN;
1785 cmd.resp_type = MMC_RSP_R1b;
1786 cmd.cmdarg = MMC_CMD62_ARG1;
1787
1788 err = mmc_send_cmd(mmc, &cmd, NULL);
1789 if (err) {
1790 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1791 return err;
1792 }
1793
1794 /* Boot partition changing mode */
1795 cmd.cmdidx = MMC_CMD_RES_MAN;
1796 cmd.resp_type = MMC_RSP_R1b;
1797 cmd.cmdarg = MMC_CMD62_ARG2;
1798
1799 err = mmc_send_cmd(mmc, &cmd, NULL);
1800 if (err) {
1801 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1802 return err;
1803 }
1804 /* boot partition size is multiple of 128KB */
1805 bootsize = (bootsize * 1024) / 128;
1806
1807 /* Arg: boot partition size */
1808 cmd.cmdidx = MMC_CMD_RES_MAN;
1809 cmd.resp_type = MMC_RSP_R1b;
1810 cmd.cmdarg = bootsize;
1811
1812 err = mmc_send_cmd(mmc, &cmd, NULL);
1813 if (err) {
1814 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1815 return err;
1816 }
1817 /* RPMB partition size is multiple of 128KB */
1818 rpmbsize = (rpmbsize * 1024) / 128;
1819 /* Arg: RPMB partition size */
1820 cmd.cmdidx = MMC_CMD_RES_MAN;
1821 cmd.resp_type = MMC_RSP_R1b;
1822 cmd.cmdarg = rpmbsize;
1823
1824 err = mmc_send_cmd(mmc, &cmd, NULL);
1825 if (err) {
1826 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1827 return err;
1828 }
1829 return 0;
1830}
1831
1832/*
Tom Rini4cf854c2014-02-05 10:24:22 -05001833 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1834 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1835 * and BOOT_MODE.
1836 *
1837 * Returns 0 on success.
1838 */
1839int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1840{
1841 int err;
1842
1843 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1844 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1845 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1846 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1847
1848 if (err)
1849 return err;
1850 return 0;
1851}
1852
1853/*
Tom Rinif8c6f792014-02-05 10:24:21 -05001854 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1855 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1856 * PARTITION_ACCESS.
1857 *
1858 * Returns 0 on success.
1859 */
1860int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1861{
1862 int err;
1863
1864 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1865 EXT_CSD_BOOT_ACK(ack) |
1866 EXT_CSD_BOOT_PART_NUM(part_num) |
1867 EXT_CSD_PARTITION_ACCESS(access));
1868
1869 if (err)
1870 return err;
1871 return 0;
1872}
Tom Rini35a3ea12014-02-07 14:15:20 -05001873
1874/*
1875 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1876 * for enable. Note that this is a write-once field for non-zero values.
1877 *
1878 * Returns 0 on success.
1879 */
1880int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1881{
1882 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1883 enable);
1884}
Amar1104e9b2013-04-27 11:42:58 +05301885#endif