blob: 19ac4c482fa5d72504513f651f92aae73ccd88a3 [file] [log] [blame]
Andy Flemingad347bb2008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Flemingad347bb2008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Stephen Warrenbf0c7852014-05-23 12:47:06 -060013#include <errno.h>
Andy Flemingad347bb2008-10-30 16:41:01 -050014#include <mmc.h>
15#include <part.h>
16#include <malloc.h>
17#include <linux/list.h>
Rabin Vincent69d4e2c2009-04-05 13:30:54 +053018#include <div64.h>
Paul Burton8d30cc92013-09-09 15:30:26 +010019#include "mmc_private.h"
Andy Flemingad347bb2008-10-30 16:41:01 -050020
21static struct list_head mmc_devices;
22static int cur_dev_num = -1;
23
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +020024__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanov020f2612012-12-03 02:19:46 +000025{
26 return -1;
27}
28
29int mmc_getwp(struct mmc *mmc)
30{
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
Peter Korsgaardf7b15102013-03-21 04:00:03 +000035 if (wp < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +020036 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +000038 else
39 wp = 0;
40 }
Nikita Kiryanov020f2612012-12-03 02:19:46 +000041
42 return wp;
43}
44
Jeroen Hofstee47726302014-07-10 22:46:28 +020045__weak int board_mmc_getcd(struct mmc *mmc)
46{
Stefano Babic6e00edf2010-02-05 15:04:43 +010047 return -1;
48}
49
Paul Burton8d30cc92013-09-09 15:30:26 +010050int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Flemingad347bb2008-10-30 16:41:01 -050051{
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000052 int ret;
Marek Vasutdccb6082012-03-15 18:41:35 +000053
Marek Vasutdccb6082012-03-15 18:41:35 +000054#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000055 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou2c850462014-03-11 19:34:20 +020060 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000061 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
Dirk Behmec9cb4a92012-03-08 02:35:34 +000087 ptr = (u8 *)&cmd->response[i];
Raffaele Recalcati894b1e22011-03-11 02:01:14 +000088 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000102#else
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000104#endif
Marek Vasutdccb6082012-03-15 18:41:35 +0000105 return ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500106}
107
Paul Burton8d30cc92013-09-09 15:30:26 +0100108int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000109{
110 struct mmc_cmd cmd;
Jan Kloetzke31789322012-02-05 22:29:12 +0000111 int err, retries = 5;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000112#ifdef CONFIG_MMC_TRACE
113 int status;
114#endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
Marek Vasutc4427392011-08-10 09:24:48 +0200118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000120
121 do {
122 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzke31789322012-02-05 22:29:12 +0000123 if (!err) {
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
126 MMC_STATE_PRG)
127 break;
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100129#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzke31789322012-02-05 22:29:12 +0000130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100132#endif
Jan Kloetzke31789322012-02-05 22:29:12 +0000133 return COMM_ERR;
134 }
135 } else if (--retries < 0)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000136 return err;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000137
138 udelay(1000);
139
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000140 } while (timeout--);
141
Raffaele Recalcati894b1e22011-03-11 02:01:14 +0000142#ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
145#endif
Jongman Heo1be00d92012-06-03 21:32:13 +0000146 if (timeout <= 0) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100147#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000148 printf("Timeout waiting card ready\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100149#endif
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000150 return TIMEOUT;
151 }
Andrew Gabbasove80682f2014-04-03 04:34:32 -0500152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
153 return SWITCH_ERR;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000154
155 return 0;
156}
157
Paul Burton8d30cc92013-09-09 15:30:26 +0100158int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Flemingad347bb2008-10-30 16:41:01 -0500159{
160 struct mmc_cmd cmd;
161
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -0600162 if (mmc->ddr_mode)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900163 return 0;
164
Andy Flemingad347bb2008-10-30 16:41:01 -0500165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
167 cmd.cmdarg = len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500168
169 return mmc_send_cmd(mmc, &cmd, NULL);
170}
171
172struct mmc *find_mmc_device(int dev_num)
173{
174 struct mmc *m;
175 struct list_head *entry;
176
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
179
180 if (m->block_dev.dev == dev_num)
181 return m;
182 }
183
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100184#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -0500185 printf("MMC Device %d not found\n", dev_num);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100186#endif
Andy Flemingad347bb2008-10-30 16:41:01 -0500187
188 return NULL;
189}
190
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200191static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillips87ea3892012-10-29 13:34:43 +0000192 lbaint_t blkcnt)
Andy Flemingad347bb2008-10-30 16:41:01 -0500193{
194 struct mmc_cmd cmd;
195 struct mmc_data data;
196
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700197 if (blkcnt > 1)
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
199 else
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Flemingad347bb2008-10-30 16:41:01 -0500201
202 if (mmc->high_capacity)
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700203 cmd.cmdarg = start;
Andy Flemingad347bb2008-10-30 16:41:01 -0500204 else
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700205 cmd.cmdarg = start * mmc->read_bl_len;
Andy Flemingad347bb2008-10-30 16:41:01 -0500206
207 cmd.resp_type = MMC_RSP_R1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500208
209 data.dest = dst;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700210 data.blocks = blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
213
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700214 if (mmc_send_cmd(mmc, &cmd, &data))
215 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500216
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700217 if (blkcnt > 1) {
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
219 cmd.cmdarg = 0;
220 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100222#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700223 printf("mmc fail to send stop cmd\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100224#endif
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700225 return 0;
226 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500227 }
228
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700229 return blkcnt;
Andy Flemingad347bb2008-10-30 16:41:01 -0500230}
231
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200232static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
Andy Flemingad347bb2008-10-30 16:41:01 -0500233{
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700234 lbaint_t cur, blocks_todo = blkcnt;
235
236 if (blkcnt == 0)
237 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500238
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700239 struct mmc *mmc = find_mmc_device(dev_num);
Andy Flemingad347bb2008-10-30 16:41:01 -0500240 if (!mmc)
241 return 0;
242
Lei Wene1cc9c82010-09-13 22:07:27 +0800243 if ((start + blkcnt) > mmc->block_dev.lba) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100244#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbe4bdf6fd2013-06-14 13:07:25 +0200245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Lei Wene1cc9c82010-09-13 22:07:27 +0800246 start + blkcnt, mmc->block_dev.lba);
Paul Burton6a7c5ba2013-09-04 16:12:25 +0100247#endif
Lei Wene1cc9c82010-09-13 22:07:27 +0800248 return 0;
249 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500250
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
Andy Flemingad347bb2008-10-30 16:41:01 -0500252 return 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500253
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700254 do {
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
Alagu Sankarc25d1b92010-10-25 07:23:56 -0700257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
Andy Flemingad347bb2008-10-30 16:41:01 -0500263
264 return blkcnt;
265}
266
Kim Phillips87ea3892012-10-29 13:34:43 +0000267static int mmc_go_idle(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500268{
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
Andy Flemingad347bb2008-10-30 16:41:01 -0500277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286}
287
Kim Phillips87ea3892012-10-29 13:34:43 +0000288static int sd_send_op_cond(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500289{
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
Stefano Babicf8e9a212010-01-20 18:20:39 +0100306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
Thomas Chou1254c3d2010-12-24 13:12:21 +0000314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200315 (mmc->cfg->voltages & 0xff8000);
Andy Flemingad347bb2008-10-30 16:41:01 -0500316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
Thomas Chou1254c3d2010-12-24 13:12:21 +0000334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
Rabin Vincentb6eed942009-04-05 13:30:56 +0530345 mmc->ocr = cmd.response[0];
Andy Flemingad347bb2008-10-30 16:41:01 -0500346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351}
352
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000353/* We pass in the cmd since otherwise the init seems to fail */
354static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
355 int use_arg)
Andy Flemingad347bb2008-10-30 16:41:01 -0500356{
Andy Flemingad347bb2008-10-30 16:41:01 -0500357 int err;
358
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
361 cmd->cmdarg = 0;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
363 cmd->cmdarg =
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200364 (mmc->cfg->voltages &
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
367
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200368 if (mmc->cfg->host_caps & MMC_MODE_HC)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000369 cmd->cmdarg |= OCR_HCS;
370 }
371 err = mmc_send_cmd(mmc, cmd, NULL);
372 if (err)
373 return err;
374 mmc->op_cond_response = cmd->response[0];
375 return 0;
376}
377
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200378static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000379{
380 struct mmc_cmd cmd;
381 int err, i;
382
Andy Flemingad347bb2008-10-30 16:41:01 -0500383 /* Some cards seem to need this */
384 mmc_go_idle(mmc);
385
Raffaele Recalcati1df837e2011-03-11 02:01:13 +0000386 /* Asking to the card its capabilities */
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
390 if (err)
391 return err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200392
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
395 return 0;
396 }
397 return IN_PROGRESS;
398}
Wolfgang Denk80f70212011-05-19 22:21:41 +0200399
Jeroen Hofsteeaedeeaa2014-07-12 21:24:08 +0200400static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000401{
402 struct mmc_cmd cmd;
403 int timeout = 1000;
404 uint start;
405 int err;
Wolfgang Denk80f70212011-05-19 22:21:41 +0200406
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
Andy Flemingad347bb2008-10-30 16:41:01 -0500409 do {
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
Andy Flemingad347bb2008-10-30 16:41:01 -0500411 if (err)
412 return err;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +0000413 if (get_timer(start) > timeout)
414 return UNUSABLE_ERR;
415 udelay(100);
416 } while (!(mmc->op_cond_response & OCR_BUSY));
Andy Flemingad347bb2008-10-30 16:41:01 -0500417
Thomas Chou1254c3d2010-12-24 13:12:21 +0000418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
Thomas Chou1254c3d2010-12-24 13:12:21 +0000422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427 }
428
Andy Flemingad347bb2008-10-30 16:41:01 -0500429 mmc->version = MMC_VERSION_UNKNOWN;
Rabin Vincentb6eed942009-04-05 13:30:56 +0530430 mmc->ocr = cmd.response[0];
Andy Flemingad347bb2008-10-30 16:41:01 -0500431
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrenf6545f12014-01-30 16:11:12 -0700433 mmc->rca = 1;
Andy Flemingad347bb2008-10-30 16:41:01 -0500434
435 return 0;
436}
437
438
Kim Phillips87ea3892012-10-29 13:34:43 +0000439static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Flemingad347bb2008-10-30 16:41:01 -0500440{
441 struct mmc_cmd cmd;
442 struct mmc_data data;
443 int err;
444
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500449
Yoshihiro Shimodaf6bec732012-06-07 19:09:11 +0000450 data.dest = (char *)ext_csd;
Andy Flemingad347bb2008-10-30 16:41:01 -0500451 data.blocks = 1;
Simon Glassa09c2b72013-04-03 08:54:30 +0000452 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -0500453 data.flags = MMC_DATA_READ;
454
455 err = mmc_send_cmd(mmc, &cmd, &data);
456
457 return err;
458}
459
460
Kim Phillips87ea3892012-10-29 13:34:43 +0000461static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Flemingad347bb2008-10-30 16:41:01 -0500462{
463 struct mmc_cmd cmd;
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000464 int timeout = 1000;
465 int ret;
Andy Flemingad347bb2008-10-30 16:41:01 -0500466
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000470 (index << 16) |
471 (value << 8);
Andy Flemingad347bb2008-10-30 16:41:01 -0500472
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000473 ret = mmc_send_cmd(mmc, &cmd, NULL);
474
475 /* Waiting for the ready status */
Jan Kloetzke4e929dd2012-02-05 22:29:11 +0000476 if (!ret)
477 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +0000478
479 return ret;
480
Andy Flemingad347bb2008-10-30 16:41:01 -0500481}
482
Kim Phillips87ea3892012-10-29 13:34:43 +0000483static int mmc_change_freq(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500484{
Simon Glassa09c2b72013-04-03 08:54:30 +0000485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Flemingad347bb2008-10-30 16:41:01 -0500486 char cardtype;
487 int err;
488
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -0600489 mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
Andy Flemingad347bb2008-10-30 16:41:01 -0500490
Thomas Chou1254c3d2010-12-24 13:12:21 +0000491 if (mmc_host_is_spi(mmc))
492 return 0;
493
Andy Flemingad347bb2008-10-30 16:41:01 -0500494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
496 return 0;
497
Andy Flemingad347bb2008-10-30 16:41:01 -0500498 err = mmc_send_ext_csd(mmc, ext_csd);
499
500 if (err)
501 return err;
502
Lei Wen217467f2011-10-03 20:35:10 +0000503 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Flemingad347bb2008-10-30 16:41:01 -0500504
505 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
506
507 if (err)
Andrew Gabbasove80682f2014-04-03 04:34:32 -0500508 return err == SWITCH_ERR ? 0 : err;
Andy Flemingad347bb2008-10-30 16:41:01 -0500509
510 /* Now check to see that it worked */
511 err = mmc_send_ext_csd(mmc, ext_csd);
512
513 if (err)
514 return err;
515
516 /* No high-speed support */
Lei Wen217467f2011-10-03 20:35:10 +0000517 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Flemingad347bb2008-10-30 16:41:01 -0500518 return 0;
519
520 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900521 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov95a37132014-12-01 06:59:10 -0600522 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900523 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Flemingad347bb2008-10-30 16:41:01 -0500524 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900525 } else {
Andy Flemingad347bb2008-10-30 16:41:01 -0500526 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chung38ce30b2014-05-16 13:59:54 +0900527 }
Andy Flemingad347bb2008-10-30 16:41:01 -0500528
529 return 0;
530}
531
Stephen Warrene315ae82013-06-11 15:14:01 -0600532static int mmc_set_capacity(struct mmc *mmc, int part_num)
533{
534 switch (part_num) {
535 case 0:
536 mmc->capacity = mmc->capacity_user;
537 break;
538 case 1:
539 case 2:
540 mmc->capacity = mmc->capacity_boot;
541 break;
542 case 3:
543 mmc->capacity = mmc->capacity_rpmb;
544 break;
545 case 4:
546 case 5:
547 case 6:
548 case 7:
549 mmc->capacity = mmc->capacity_gp[part_num - 4];
550 break;
551 default:
552 return -1;
553 }
554
555 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
556
557 return 0;
558}
559
Stephen Warren52c44e42014-05-07 12:19:02 -0600560int mmc_select_hwpart(int dev_num, int hwpart)
561{
562 struct mmc *mmc = find_mmc_device(dev_num);
563 int ret;
564
565 if (!mmc)
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600566 return -ENODEV;
Stephen Warren52c44e42014-05-07 12:19:02 -0600567
568 if (mmc->part_num == hwpart)
569 return 0;
570
571 if (mmc->part_config == MMCPART_NOAVAILABLE) {
572 printf("Card doesn't support part_switch\n");
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600573 return -EMEDIUMTYPE;
Stephen Warren52c44e42014-05-07 12:19:02 -0600574 }
575
576 ret = mmc_switch_part(dev_num, hwpart);
577 if (ret)
Stephen Warrenbf0c7852014-05-23 12:47:06 -0600578 return ret;
Stephen Warren52c44e42014-05-07 12:19:02 -0600579
580 mmc->part_num = hwpart;
581
582 return 0;
583}
584
585
Lei Wen31b99802011-05-02 16:26:26 +0000586int mmc_switch_part(int dev_num, unsigned int part_num)
587{
588 struct mmc *mmc = find_mmc_device(dev_num);
Stephen Warrene315ae82013-06-11 15:14:01 -0600589 int ret;
Lei Wen31b99802011-05-02 16:26:26 +0000590
591 if (!mmc)
592 return -1;
593
Stephen Warrene315ae82013-06-11 15:14:01 -0600594 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
595 (mmc->part_config & ~PART_ACCESS_MASK)
596 | (part_num & PART_ACCESS_MASK));
Peter Bigot45fde892014-09-02 18:31:23 -0500597
598 /*
599 * Set the capacity if the switch succeeded or was intended
600 * to return to representing the raw device.
601 */
602 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
603 ret = mmc_set_capacity(mmc, part_num);
Stephen Warrene315ae82013-06-11 15:14:01 -0600604
Peter Bigot45fde892014-09-02 18:31:23 -0500605 return ret;
Lei Wen31b99802011-05-02 16:26:26 +0000606}
607
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100608int mmc_hwpart_config(struct mmc *mmc,
609 const struct mmc_hwpart_conf *conf,
610 enum mmc_hwpart_conf_mode mode)
611{
612 u8 part_attrs = 0;
613 u32 enh_size_mult;
614 u32 enh_start_addr;
615 u32 gp_size_mult[4];
616 u32 max_enh_size_mult;
617 u32 tot_enh_size_mult = 0;
Diego Santa Cruz80200272014-12-23 10:50:31 +0100618 u8 wr_rel_set;
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100619 int i, pidx, err;
620 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
621
622 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
623 return -EINVAL;
624
625 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
626 printf("eMMC >= 4.4 required for enhanced user data area\n");
627 return -EMEDIUMTYPE;
628 }
629
630 if (!(mmc->part_support & PART_SUPPORT)) {
631 printf("Card does not support partitioning\n");
632 return -EMEDIUMTYPE;
633 }
634
635 if (!mmc->hc_wp_grp_size) {
636 printf("Card does not define HC WP group size\n");
637 return -EMEDIUMTYPE;
638 }
639
640 /* check partition alignment and total enhanced size */
641 if (conf->user.enh_size) {
642 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
643 conf->user.enh_start % mmc->hc_wp_grp_size) {
644 printf("User data enhanced area not HC WP group "
645 "size aligned\n");
646 return -EINVAL;
647 }
648 part_attrs |= EXT_CSD_ENH_USR;
649 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
650 if (mmc->high_capacity) {
651 enh_start_addr = conf->user.enh_start;
652 } else {
653 enh_start_addr = (conf->user.enh_start << 9);
654 }
655 } else {
656 enh_size_mult = 0;
657 enh_start_addr = 0;
658 }
659 tot_enh_size_mult += enh_size_mult;
660
661 for (pidx = 0; pidx < 4; pidx++) {
662 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
663 printf("GP%i partition not HC WP group size "
664 "aligned\n", pidx+1);
665 return -EINVAL;
666 }
667 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
668 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
669 part_attrs |= EXT_CSD_ENH_GP(pidx);
670 tot_enh_size_mult += gp_size_mult[pidx];
671 }
672 }
673
674 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
675 printf("Card does not support enhanced attribute\n");
676 return -EMEDIUMTYPE;
677 }
678
679 err = mmc_send_ext_csd(mmc, ext_csd);
680 if (err)
681 return err;
682
683 max_enh_size_mult =
684 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
685 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
686 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
687 if (tot_enh_size_mult > max_enh_size_mult) {
688 printf("Total enhanced size exceeds maximum (%u > %u)\n",
689 tot_enh_size_mult, max_enh_size_mult);
690 return -EMEDIUMTYPE;
691 }
692
Diego Santa Cruz80200272014-12-23 10:50:31 +0100693 /* The default value of EXT_CSD_WR_REL_SET is device
694 * dependent, the values can only be changed if the
695 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
696 * changed only once and before partitioning is completed. */
697 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
698 if (conf->user.wr_rel_change) {
699 if (conf->user.wr_rel_set)
700 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
701 else
702 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
703 }
704 for (pidx = 0; pidx < 4; pidx++) {
705 if (conf->gp_part[pidx].wr_rel_change) {
706 if (conf->gp_part[pidx].wr_rel_set)
707 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
708 else
709 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
710 }
711 }
712
713 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
714 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
715 puts("Card does not support host controlled partition write "
716 "reliability settings\n");
717 return -EMEDIUMTYPE;
718 }
719
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100720 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
721 EXT_CSD_PARTITION_SETTING_COMPLETED) {
722 printf("Card already partitioned\n");
723 return -EPERM;
724 }
725
726 if (mode == MMC_HWPART_CONF_CHECK)
727 return 0;
728
729 /* Partitioning requires high-capacity size definitions */
730 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
731 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
732 EXT_CSD_ERASE_GROUP_DEF, 1);
733
734 if (err)
735 return err;
736
737 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
738
739 /* update erase group size to be high-capacity */
740 mmc->erase_grp_size =
741 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
742
743 }
744
745 /* all OK, write the configuration */
746 for (i = 0; i < 4; i++) {
747 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
748 EXT_CSD_ENH_START_ADDR+i,
749 (enh_start_addr >> (i*8)) & 0xFF);
750 if (err)
751 return err;
752 }
753 for (i = 0; i < 3; i++) {
754 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
755 EXT_CSD_ENH_SIZE_MULT+i,
756 (enh_size_mult >> (i*8)) & 0xFF);
757 if (err)
758 return err;
759 }
760 for (pidx = 0; pidx < 4; pidx++) {
761 for (i = 0; i < 3; i++) {
762 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
763 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
764 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
765 if (err)
766 return err;
767 }
768 }
769 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
770 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
771 if (err)
772 return err;
773
774 if (mode == MMC_HWPART_CONF_SET)
775 return 0;
776
Diego Santa Cruz80200272014-12-23 10:50:31 +0100777 /* The WR_REL_SET is a write-once register but shall be
778 * written before setting PART_SETTING_COMPLETED. As it is
779 * write-once we can only write it when completing the
780 * partitioning. */
781 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
782 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
783 EXT_CSD_WR_REL_SET, wr_rel_set);
784 if (err)
785 return err;
786 }
787
Diego Santa Cruz69eb71a02014-12-23 10:50:29 +0100788 /* Setting PART_SETTING_COMPLETED confirms the partition
789 * configuration but it only becomes effective after power
790 * cycle, so we do not adjust the partition related settings
791 * in the mmc struct. */
792
793 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
794 EXT_CSD_PARTITION_SETTING,
795 EXT_CSD_PARTITION_SETTING_COMPLETED);
796 if (err)
797 return err;
798
799 return 0;
800}
801
Thierry Redingb9c8b772012-01-02 01:15:37 +0000802int mmc_getcd(struct mmc *mmc)
803{
804 int cd;
805
806 cd = board_mmc_getcd(mmc);
807
Peter Korsgaardf7b15102013-03-21 04:00:03 +0000808 if (cd < 0) {
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200809 if (mmc->cfg->ops->getcd)
810 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardf7b15102013-03-21 04:00:03 +0000811 else
812 cd = 1;
813 }
Thierry Redingb9c8b772012-01-02 01:15:37 +0000814
815 return cd;
816}
817
Kim Phillips87ea3892012-10-29 13:34:43 +0000818static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Flemingad347bb2008-10-30 16:41:01 -0500819{
820 struct mmc_cmd cmd;
821 struct mmc_data data;
822
823 /* Switch the frequency */
824 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
825 cmd.resp_type = MMC_RSP_R1;
826 cmd.cmdarg = (mode << 31) | 0xffffff;
827 cmd.cmdarg &= ~(0xf << (group * 4));
828 cmd.cmdarg |= value << (group * 4);
Andy Flemingad347bb2008-10-30 16:41:01 -0500829
830 data.dest = (char *)resp;
831 data.blocksize = 64;
832 data.blocks = 1;
833 data.flags = MMC_DATA_READ;
834
835 return mmc_send_cmd(mmc, &cmd, &data);
836}
837
838
Kim Phillips87ea3892012-10-29 13:34:43 +0000839static int sd_change_freq(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500840{
841 int err;
842 struct mmc_cmd cmd;
Anton staaf9b00f0d2011-10-03 13:54:59 +0000843 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
844 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Flemingad347bb2008-10-30 16:41:01 -0500845 struct mmc_data data;
846 int timeout;
847
848 mmc->card_caps = 0;
849
Thomas Chou1254c3d2010-12-24 13:12:21 +0000850 if (mmc_host_is_spi(mmc))
851 return 0;
852
Andy Flemingad347bb2008-10-30 16:41:01 -0500853 /* Read the SCR to find out if this card supports higher speeds */
854 cmd.cmdidx = MMC_CMD_APP_CMD;
855 cmd.resp_type = MMC_RSP_R1;
856 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -0500857
858 err = mmc_send_cmd(mmc, &cmd, NULL);
859
860 if (err)
861 return err;
862
863 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
864 cmd.resp_type = MMC_RSP_R1;
865 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -0500866
867 timeout = 3;
868
869retry_scr:
Anton staaf9b00f0d2011-10-03 13:54:59 +0000870 data.dest = (char *)scr;
Andy Flemingad347bb2008-10-30 16:41:01 -0500871 data.blocksize = 8;
872 data.blocks = 1;
873 data.flags = MMC_DATA_READ;
874
875 err = mmc_send_cmd(mmc, &cmd, &data);
876
877 if (err) {
878 if (timeout--)
879 goto retry_scr;
880
881 return err;
882 }
883
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300884 mmc->scr[0] = __be32_to_cpu(scr[0]);
885 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Flemingad347bb2008-10-30 16:41:01 -0500886
887 switch ((mmc->scr[0] >> 24) & 0xf) {
888 case 0:
889 mmc->version = SD_VERSION_1_0;
890 break;
891 case 1:
892 mmc->version = SD_VERSION_1_10;
893 break;
894 case 2:
895 mmc->version = SD_VERSION_2;
Jaehoon Chungd552bd12013-01-29 22:58:16 +0000896 if ((mmc->scr[0] >> 15) & 0x1)
897 mmc->version = SD_VERSION_3;
Andy Flemingad347bb2008-10-30 16:41:01 -0500898 break;
899 default:
900 mmc->version = SD_VERSION_1_0;
901 break;
902 }
903
Alagu Sankar24bb5ab2010-05-12 15:08:24 +0530904 if (mmc->scr[0] & SD_DATA_4BIT)
905 mmc->card_caps |= MMC_MODE_4BIT;
906
Andy Flemingad347bb2008-10-30 16:41:01 -0500907 /* Version 1.0 doesn't support switching */
908 if (mmc->version == SD_VERSION_1_0)
909 return 0;
910
911 timeout = 4;
912 while (timeout--) {
913 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaf9b00f0d2011-10-03 13:54:59 +0000914 (u8 *)switch_status);
Andy Flemingad347bb2008-10-30 16:41:01 -0500915
916 if (err)
917 return err;
918
919 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300920 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Flemingad347bb2008-10-30 16:41:01 -0500921 break;
922 }
923
Andy Flemingad347bb2008-10-30 16:41:01 -0500924 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300925 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Flemingad347bb2008-10-30 16:41:01 -0500926 return 0;
927
Macpaul Lin24e92ec2011-11-28 16:31:09 +0000928 /*
929 * If the host doesn't support SD_HIGHSPEED, do not switch card to
930 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
931 * This can avoid furthur problem when the card runs in different
932 * mode between the host.
933 */
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200934 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
935 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin24e92ec2011-11-28 16:31:09 +0000936 return 0;
937
Anton staaf9b00f0d2011-10-03 13:54:59 +0000938 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Flemingad347bb2008-10-30 16:41:01 -0500939
940 if (err)
941 return err;
942
Yauhen Kharuzhy6e8edf42009-05-07 00:43:30 +0300943 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Flemingad347bb2008-10-30 16:41:01 -0500944 mmc->card_caps |= MMC_MODE_HS;
945
946 return 0;
947}
948
949/* frequency bases */
950/* divided by 10 to be nice to platforms without floating point */
Mike Frysingerb588caf2010-10-20 01:15:53 +0000951static const int fbase[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -0500952 10000,
953 100000,
954 1000000,
955 10000000,
956};
957
958/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
959 * to platforms without floating point.
960 */
Mike Frysingerb588caf2010-10-20 01:15:53 +0000961static const int multipliers[] = {
Andy Flemingad347bb2008-10-30 16:41:01 -0500962 0, /* reserved */
963 10,
964 12,
965 13,
966 15,
967 20,
968 25,
969 30,
970 35,
971 40,
972 45,
973 50,
974 55,
975 60,
976 70,
977 80,
978};
979
Kim Phillips87ea3892012-10-29 13:34:43 +0000980static void mmc_set_ios(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -0500981{
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200982 if (mmc->cfg->ops->set_ios)
983 mmc->cfg->ops->set_ios(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -0500984}
985
986void mmc_set_clock(struct mmc *mmc, uint clock)
987{
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200988 if (clock > mmc->cfg->f_max)
989 clock = mmc->cfg->f_max;
Andy Flemingad347bb2008-10-30 16:41:01 -0500990
Pantelis Antoniou2c850462014-03-11 19:34:20 +0200991 if (clock < mmc->cfg->f_min)
992 clock = mmc->cfg->f_min;
Andy Flemingad347bb2008-10-30 16:41:01 -0500993
994 mmc->clock = clock;
995
996 mmc_set_ios(mmc);
997}
998
Kim Phillips87ea3892012-10-29 13:34:43 +0000999static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Flemingad347bb2008-10-30 16:41:01 -05001000{
1001 mmc->bus_width = width;
1002
1003 mmc_set_ios(mmc);
1004}
1005
Kim Phillips87ea3892012-10-29 13:34:43 +00001006static int mmc_startup(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001007{
Stephen Warrene315ae82013-06-11 15:14:01 -06001008 int err, i;
Andy Flemingad347bb2008-10-30 16:41:01 -05001009 uint mult, freq;
Yoshihiro Shimoda7d88de52011-07-04 22:13:26 +00001010 u64 cmult, csize, capacity;
Andy Flemingad347bb2008-10-30 16:41:01 -05001011 struct mmc_cmd cmd;
Simon Glassa09c2b72013-04-03 08:54:30 +00001012 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1013 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +00001014 int timeout = 1000;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001015 bool has_parts = false;
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001016 bool part_completed;
Andy Flemingad347bb2008-10-30 16:41:01 -05001017
Thomas Chou1254c3d2010-12-24 13:12:21 +00001018#ifdef CONFIG_MMC_SPI_CRC_ON
1019 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1020 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1021 cmd.resp_type = MMC_RSP_R1;
1022 cmd.cmdarg = 1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001023 err = mmc_send_cmd(mmc, &cmd, NULL);
1024
1025 if (err)
1026 return err;
1027 }
1028#endif
1029
Andy Flemingad347bb2008-10-30 16:41:01 -05001030 /* Put the Card in Identify Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001031 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1032 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Flemingad347bb2008-10-30 16:41:01 -05001033 cmd.resp_type = MMC_RSP_R2;
1034 cmd.cmdarg = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05001035
1036 err = mmc_send_cmd(mmc, &cmd, NULL);
1037
1038 if (err)
1039 return err;
1040
1041 memcpy(mmc->cid, cmd.response, 16);
1042
1043 /*
1044 * For MMC cards, set the Relative Address.
1045 * For SD cards, get the Relatvie Address.
1046 * This also puts the cards into Standby State
1047 */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001048 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1049 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1050 cmd.cmdarg = mmc->rca << 16;
1051 cmd.resp_type = MMC_RSP_R6;
Andy Flemingad347bb2008-10-30 16:41:01 -05001052
Thomas Chou1254c3d2010-12-24 13:12:21 +00001053 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05001054
Thomas Chou1254c3d2010-12-24 13:12:21 +00001055 if (err)
1056 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001057
Thomas Chou1254c3d2010-12-24 13:12:21 +00001058 if (IS_SD(mmc))
1059 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1060 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001061
1062 /* Get the Card-Specific Data */
1063 cmd.cmdidx = MMC_CMD_SEND_CSD;
1064 cmd.resp_type = MMC_RSP_R2;
1065 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05001066
1067 err = mmc_send_cmd(mmc, &cmd, NULL);
1068
Raffaele Recalcati01a0dc62011-03-11 02:01:12 +00001069 /* Waiting for the ready status */
1070 mmc_send_status(mmc, timeout);
1071
Andy Flemingad347bb2008-10-30 16:41:01 -05001072 if (err)
1073 return err;
1074
Rabin Vincentb6eed942009-04-05 13:30:56 +05301075 mmc->csd[0] = cmd.response[0];
1076 mmc->csd[1] = cmd.response[1];
1077 mmc->csd[2] = cmd.response[2];
1078 mmc->csd[3] = cmd.response[3];
Andy Flemingad347bb2008-10-30 16:41:01 -05001079
1080 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincentbdf7a682009-04-05 13:30:55 +05301081 int version = (cmd.response[0] >> 26) & 0xf;
Andy Flemingad347bb2008-10-30 16:41:01 -05001082
1083 switch (version) {
1084 case 0:
1085 mmc->version = MMC_VERSION_1_2;
1086 break;
1087 case 1:
1088 mmc->version = MMC_VERSION_1_4;
1089 break;
1090 case 2:
1091 mmc->version = MMC_VERSION_2_2;
1092 break;
1093 case 3:
1094 mmc->version = MMC_VERSION_3;
1095 break;
1096 case 4:
1097 mmc->version = MMC_VERSION_4;
1098 break;
1099 default:
1100 mmc->version = MMC_VERSION_1_2;
1101 break;
1102 }
1103 }
1104
1105 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincentbdf7a682009-04-05 13:30:55 +05301106 freq = fbase[(cmd.response[0] & 0x7)];
1107 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Flemingad347bb2008-10-30 16:41:01 -05001108
1109 mmc->tran_speed = freq * mult;
1110
Markus Niebel03951412013-12-16 13:40:46 +01001111 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincentb6eed942009-04-05 13:30:56 +05301112 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Flemingad347bb2008-10-30 16:41:01 -05001113
1114 if (IS_SD(mmc))
1115 mmc->write_bl_len = mmc->read_bl_len;
1116 else
Rabin Vincentb6eed942009-04-05 13:30:56 +05301117 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Flemingad347bb2008-10-30 16:41:01 -05001118
1119 if (mmc->high_capacity) {
1120 csize = (mmc->csd[1] & 0x3f) << 16
1121 | (mmc->csd[2] & 0xffff0000) >> 16;
1122 cmult = 8;
1123 } else {
1124 csize = (mmc->csd[1] & 0x3ff) << 2
1125 | (mmc->csd[2] & 0xc0000000) >> 30;
1126 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1127 }
1128
Stephen Warrene315ae82013-06-11 15:14:01 -06001129 mmc->capacity_user = (csize + 1) << (cmult + 2);
1130 mmc->capacity_user *= mmc->read_bl_len;
1131 mmc->capacity_boot = 0;
1132 mmc->capacity_rpmb = 0;
1133 for (i = 0; i < 4; i++)
1134 mmc->capacity_gp[i] = 0;
Andy Flemingad347bb2008-10-30 16:41:01 -05001135
Simon Glassa09c2b72013-04-03 08:54:30 +00001136 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1137 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -05001138
Simon Glassa09c2b72013-04-03 08:54:30 +00001139 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1140 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Flemingad347bb2008-10-30 16:41:01 -05001141
Markus Niebel03951412013-12-16 13:40:46 +01001142 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1143 cmd.cmdidx = MMC_CMD_SET_DSR;
1144 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1145 cmd.resp_type = MMC_RSP_NONE;
1146 if (mmc_send_cmd(mmc, &cmd, NULL))
1147 printf("MMC: SET_DSR failed\n");
1148 }
1149
Andy Flemingad347bb2008-10-30 16:41:01 -05001150 /* Select the card, and put it into Transfer Mode */
Thomas Chou1254c3d2010-12-24 13:12:21 +00001151 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1152 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargav4a32fba2011-10-05 03:13:23 +00001153 cmd.resp_type = MMC_RSP_R1;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001154 cmd.cmdarg = mmc->rca << 16;
Thomas Chou1254c3d2010-12-24 13:12:21 +00001155 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Flemingad347bb2008-10-30 16:41:01 -05001156
Thomas Chou1254c3d2010-12-24 13:12:21 +00001157 if (err)
1158 return err;
1159 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001160
Lei Wenea526762011-06-22 17:03:31 +00001161 /*
1162 * For SD, its erase group is always one sector
1163 */
1164 mmc->erase_grp_size = 1;
Lei Wen31b99802011-05-02 16:26:26 +00001165 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301166 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1167 /* check ext_csd version and capacity */
1168 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruzca25e062014-12-23 10:50:28 +01001169 if (err)
1170 return err;
1171 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda7d88de52011-07-04 22:13:26 +00001172 /*
1173 * According to the JEDEC Standard, the value of
1174 * ext_csd's capacity is valid if the value is more
1175 * than 2GB
1176 */
Lei Wen217467f2011-10-03 20:35:10 +00001177 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1178 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1179 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1180 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glassa09c2b72013-04-03 08:54:30 +00001181 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewski237823e2011-07-05 02:19:44 +00001182 if ((capacity >> 20) > 2 * 1024)
Stephen Warrene315ae82013-06-11 15:14:01 -06001183 mmc->capacity_user = capacity;
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301184 }
Lei Wen31b99802011-05-02 16:26:26 +00001185
Jaehoon Chung6108ef62013-01-29 19:31:16 +00001186 switch (ext_csd[EXT_CSD_REV]) {
1187 case 1:
1188 mmc->version = MMC_VERSION_4_1;
1189 break;
1190 case 2:
1191 mmc->version = MMC_VERSION_4_2;
1192 break;
1193 case 3:
1194 mmc->version = MMC_VERSION_4_3;
1195 break;
1196 case 5:
1197 mmc->version = MMC_VERSION_4_41;
1198 break;
1199 case 6:
1200 mmc->version = MMC_VERSION_4_5;
1201 break;
Markus Niebel32f53b62014-11-18 15:13:53 +01001202 case 7:
1203 mmc->version = MMC_VERSION_5_0;
1204 break;
Jaehoon Chung6108ef62013-01-29 19:31:16 +00001205 }
1206
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001207 /* The partition data may be non-zero but it is only
1208 * effective if PARTITION_SETTING_COMPLETED is set in
1209 * EXT_CSD, so ignore any data if this bit is not set,
1210 * except for enabling the high-capacity group size
1211 * definition (see below). */
1212 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1213 EXT_CSD_PARTITION_SETTING_COMPLETED);
1214
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001215 /* store the partition info of emmc */
1216 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1217 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1218 ext_csd[EXT_CSD_BOOT_MULT])
1219 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001220 if (part_completed &&
1221 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001222 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1223
1224 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1225
1226 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1227
1228 for (i = 0; i < 4; i++) {
1229 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001230 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001231 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001232 if (mult)
1233 has_parts = true;
1234 if (!part_completed)
1235 continue;
1236 mmc->capacity_gp[i] = mult;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001237 mmc->capacity_gp[i] *=
1238 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1239 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruze5a2a3a2014-12-23 10:50:21 +01001240 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001241 }
1242
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001243 if (part_completed) {
1244 mmc->enh_user_size =
1245 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1246 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1247 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1248 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1249 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1250 mmc->enh_user_size <<= 19;
1251 mmc->enh_user_start =
1252 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1253 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1254 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1255 ext_csd[EXT_CSD_ENH_START_ADDR];
1256 if (mmc->high_capacity)
1257 mmc->enh_user_start <<= 9;
1258 }
Diego Santa Cruz3b62d842014-12-23 10:50:22 +01001259
Lei Wenea526762011-06-22 17:03:31 +00001260 /*
Oliver Metzb3f14092013-10-01 20:32:07 +02001261 * Host needs to enable ERASE_GRP_DEF bit if device is
1262 * partitioned. This bit will be lost every time after a reset
1263 * or power off. This will affect erase size.
Lei Wenea526762011-06-22 17:03:31 +00001264 */
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001265 if (part_completed)
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001266 has_parts = true;
Oliver Metzb3f14092013-10-01 20:32:07 +02001267 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruzcea8c5c2014-12-23 10:50:20 +01001268 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1269 has_parts = true;
1270 if (has_parts) {
Oliver Metzb3f14092013-10-01 20:32:07 +02001271 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1272 EXT_CSD_ERASE_GROUP_DEF, 1);
1273
1274 if (err)
1275 return err;
Hannes Petermaier15e874d2014-08-08 09:47:22 +02001276 else
1277 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001278 }
Oliver Metzb3f14092013-10-01 20:32:07 +02001279
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001280 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metzb3f14092013-10-01 20:32:07 +02001281 /* Read out group size from ext_csd */
Lei Wen217467f2011-10-03 20:35:10 +00001282 mmc->erase_grp_size =
Diego Santa Cruz747f6fa2014-12-23 10:50:24 +01001283 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebel6d398922014-11-18 15:11:42 +01001284 /*
1285 * if high capacity and partition setting completed
1286 * SEC_COUNT is valid even if it is smaller than 2 GiB
1287 * JEDEC Standard JESD84-B45, 6.2.4
1288 */
Diego Santa Cruza7a75992014-12-23 10:50:27 +01001289 if (mmc->high_capacity && part_completed) {
Markus Niebel6d398922014-11-18 15:11:42 +01001290 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1291 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1292 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1293 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1294 capacity *= MMC_MAX_BLOCK_LEN;
1295 mmc->capacity_user = capacity;
1296 }
Simon Glassa09c2b72013-04-03 08:54:30 +00001297 } else {
Oliver Metzb3f14092013-10-01 20:32:07 +02001298 /* Calculate the group size from the csd value. */
Lei Wenea526762011-06-22 17:03:31 +00001299 int erase_gsz, erase_gmul;
1300 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1301 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1302 mmc->erase_grp_size = (erase_gsz + 1)
1303 * (erase_gmul + 1);
1304 }
Diego Santa Cruz61b78fe2014-12-23 10:50:25 +01001305
1306 mmc->hc_wp_grp_size = 1024
1307 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1308 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz37a50b92014-12-23 10:50:33 +01001309
1310 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghorai232293c2010-09-20 18:29:29 +05301311 }
1312
Stephen Warrene315ae82013-06-11 15:14:01 -06001313 err = mmc_set_capacity(mmc, mmc->part_num);
1314 if (err)
1315 return err;
1316
Andy Flemingad347bb2008-10-30 16:41:01 -05001317 if (IS_SD(mmc))
1318 err = sd_change_freq(mmc);
1319 else
1320 err = mmc_change_freq(mmc);
1321
1322 if (err)
1323 return err;
1324
1325 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001326 mmc->card_caps &= mmc->cfg->host_caps;
Andy Flemingad347bb2008-10-30 16:41:01 -05001327
1328 if (IS_SD(mmc)) {
1329 if (mmc->card_caps & MMC_MODE_4BIT) {
1330 cmd.cmdidx = MMC_CMD_APP_CMD;
1331 cmd.resp_type = MMC_RSP_R1;
1332 cmd.cmdarg = mmc->rca << 16;
Andy Flemingad347bb2008-10-30 16:41:01 -05001333
1334 err = mmc_send_cmd(mmc, &cmd, NULL);
1335 if (err)
1336 return err;
1337
1338 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1339 cmd.resp_type = MMC_RSP_R1;
1340 cmd.cmdarg = 2;
Andy Flemingad347bb2008-10-30 16:41:01 -05001341 err = mmc_send_cmd(mmc, &cmd, NULL);
1342 if (err)
1343 return err;
1344
1345 mmc_set_bus_width(mmc, 4);
1346 }
1347
1348 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001349 mmc->tran_speed = 50000000;
Andy Flemingad347bb2008-10-30 16:41:01 -05001350 else
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001351 mmc->tran_speed = 25000000;
Andy Flemingad347bb2008-10-30 16:41:01 -05001352 } else {
Andy Flemingeb766ad2012-10-31 19:02:38 +00001353 int idx;
1354
1355 /* An array of possible bus widths in order of preference */
1356 static unsigned ext_csd_bits[] = {
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001357 EXT_CSD_DDR_BUS_WIDTH_8,
1358 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001359 EXT_CSD_BUS_WIDTH_8,
1360 EXT_CSD_BUS_WIDTH_4,
1361 EXT_CSD_BUS_WIDTH_1,
1362 };
1363
1364 /* An array to map CSD bus widths to host cap bits */
1365 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001366 [EXT_CSD_DDR_BUS_WIDTH_4] =
1367 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1368 [EXT_CSD_DDR_BUS_WIDTH_8] =
1369 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001370 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1371 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1372 };
1373
1374 /* An array to map chosen bus width to an integer */
1375 static unsigned widths[] = {
Jaehoon Chung38ce30b2014-05-16 13:59:54 +09001376 8, 4, 8, 4, 1,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001377 };
1378
1379 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1380 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001381 unsigned int caps = ext_to_hostcaps[extw];
Andy Flemingeb766ad2012-10-31 19:02:38 +00001382
1383 /*
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001384 * Check to make sure the card and controller support
1385 * these capabilities
Andy Flemingeb766ad2012-10-31 19:02:38 +00001386 */
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001387 if ((mmc->card_caps & caps) != caps)
Andy Flemingeb766ad2012-10-31 19:02:38 +00001388 continue;
1389
Andy Flemingad347bb2008-10-30 16:41:01 -05001390 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Flemingeb766ad2012-10-31 19:02:38 +00001391 EXT_CSD_BUS_WIDTH, extw);
Andy Flemingad347bb2008-10-30 16:41:01 -05001392
1393 if (err)
Lei Wen4f5a6a52011-10-03 20:35:11 +00001394 continue;
Andy Flemingad347bb2008-10-30 16:41:01 -05001395
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001396 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Flemingeb766ad2012-10-31 19:02:38 +00001397 mmc_set_bus_width(mmc, widths[idx]);
Andy Flemingad347bb2008-10-30 16:41:01 -05001398
Lei Wen4f5a6a52011-10-03 20:35:11 +00001399 err = mmc_send_ext_csd(mmc, test_csd);
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001400
1401 if (err)
1402 continue;
Andy Flemingad347bb2008-10-30 16:41:01 -05001403
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001404 /* Only compare read only fields */
1405 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1406 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1407 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1408 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1409 ext_csd[EXT_CSD_REV]
1410 == test_csd[EXT_CSD_REV] &&
1411 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1412 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1413 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1414 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen4f5a6a52011-10-03 20:35:11 +00001415 break;
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001416 else
1417 err = SWITCH_ERR;
Andy Flemingad347bb2008-10-30 16:41:01 -05001418 }
1419
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001420 if (err)
1421 return err;
1422
Andy Flemingad347bb2008-10-30 16:41:01 -05001423 if (mmc->card_caps & MMC_MODE_HS) {
1424 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001425 mmc->tran_speed = 52000000;
Andy Flemingad347bb2008-10-30 16:41:01 -05001426 else
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001427 mmc->tran_speed = 26000000;
1428 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001429 }
1430
Jaehoon Chunge1d4c7b2012-03-26 21:16:03 +00001431 mmc_set_clock(mmc, mmc->tran_speed);
1432
Andrew Gabbasov532663b2014-12-01 06:59:11 -06001433 /* Fix the block length for DDR mode */
1434 if (mmc->ddr_mode) {
1435 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1436 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1437 }
1438
Andy Flemingad347bb2008-10-30 16:41:01 -05001439 /* fill in device description */
1440 mmc->block_dev.lun = 0;
1441 mmc->block_dev.type = 0;
1442 mmc->block_dev.blksz = mmc->read_bl_len;
Egbert Eich2eec2ab2013-04-09 21:11:56 +00001443 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
Rabin Vincent69d4e2c2009-04-05 13:30:54 +05301444 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001445#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Taylor Hutt7367ec22012-10-20 17:15:59 +00001446 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1447 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1448 (mmc->cid[3] >> 16) & 0xffff);
1449 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1450 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1451 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1452 (mmc->cid[2] >> 24) & 0xff);
1453 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1454 (mmc->cid[2] >> 16) & 0xf);
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001455#else
1456 mmc->block_dev.vendor[0] = 0;
1457 mmc->block_dev.product[0] = 0;
1458 mmc->block_dev.revision[0] = 0;
1459#endif
Mikhail Kshevetskiy5cbfa8e7a2012-07-09 08:53:38 +00001460#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -05001461 init_part(&mmc->block_dev);
Mikhail Kshevetskiy5cbfa8e7a2012-07-09 08:53:38 +00001462#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001463
1464 return 0;
1465}
1466
Kim Phillips87ea3892012-10-29 13:34:43 +00001467static int mmc_send_if_cond(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001468{
1469 struct mmc_cmd cmd;
1470 int err;
1471
1472 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1473 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001474 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Flemingad347bb2008-10-30 16:41:01 -05001475 cmd.resp_type = MMC_RSP_R7;
Andy Flemingad347bb2008-10-30 16:41:01 -05001476
1477 err = mmc_send_cmd(mmc, &cmd, NULL);
1478
1479 if (err)
1480 return err;
1481
Rabin Vincentb6eed942009-04-05 13:30:56 +05301482 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Flemingad347bb2008-10-30 16:41:01 -05001483 return UNUSABLE_ERR;
1484 else
1485 mmc->version = SD_VERSION_2;
1486
1487 return 0;
1488}
1489
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001490/* not used any more */
1491int __deprecated mmc_register(struct mmc *mmc)
1492{
1493#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1494 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1495#endif
1496 return -1;
1497}
1498
1499struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
Andy Flemingad347bb2008-10-30 16:41:01 -05001500{
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001501 struct mmc *mmc;
1502
1503 /* quick validation */
1504 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1505 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1506 return NULL;
1507
1508 mmc = calloc(1, sizeof(*mmc));
1509 if (mmc == NULL)
1510 return NULL;
1511
1512 mmc->cfg = cfg;
1513 mmc->priv = priv;
1514
1515 /* the following chunk was mmc_register() */
1516
Markus Niebel03951412013-12-16 13:40:46 +01001517 /* Setup dsr related values */
1518 mmc->dsr_imp = 0;
1519 mmc->dsr = 0xffffffff;
Andy Flemingad347bb2008-10-30 16:41:01 -05001520 /* Setup the universal parts of the block interface just once */
1521 mmc->block_dev.if_type = IF_TYPE_MMC;
1522 mmc->block_dev.dev = cur_dev_num++;
1523 mmc->block_dev.removable = 1;
1524 mmc->block_dev.block_read = mmc_bread;
1525 mmc->block_dev.block_write = mmc_bwrite;
Lei Wenea526762011-06-22 17:03:31 +00001526 mmc->block_dev.block_erase = mmc_berase;
Andy Flemingad347bb2008-10-30 16:41:01 -05001527
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001528 /* setup initial part type */
1529 mmc->block_dev.part_type = mmc->cfg->part_type;
Andy Flemingad347bb2008-10-30 16:41:01 -05001530
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001531 INIT_LIST_HEAD(&mmc->link);
Andy Flemingad347bb2008-10-30 16:41:01 -05001532
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001533 list_add_tail(&mmc->link, &mmc_devices);
1534
1535 return mmc;
1536}
1537
1538void mmc_destroy(struct mmc *mmc)
1539{
1540 /* only freeing memory for now */
1541 free(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001542}
1543
Matthew McClintock6252b4f2011-05-24 05:31:19 +00001544#ifdef CONFIG_PARTITIONS
Andy Flemingad347bb2008-10-30 16:41:01 -05001545block_dev_desc_t *mmc_get_dev(int dev)
1546{
1547 struct mmc *mmc = find_mmc_device(dev);
Benoît Thébaudeau6ce8aed2012-08-10 08:59:12 +00001548 if (!mmc || mmc_init(mmc))
Łukasz Majewski65b04cf2012-04-19 02:39:18 +00001549 return NULL;
Andy Flemingad347bb2008-10-30 16:41:01 -05001550
Łukasz Majewski65b04cf2012-04-19 02:39:18 +00001551 return &mmc->block_dev;
Andy Flemingad347bb2008-10-30 16:41:01 -05001552}
Matthew McClintock6252b4f2011-05-24 05:31:19 +00001553#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001554
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01001555/* board-specific MMC power initializations. */
1556__weak void board_mmc_power_init(void)
1557{
1558}
1559
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001560int mmc_start_init(struct mmc *mmc)
Andy Flemingad347bb2008-10-30 16:41:01 -05001561{
Macpaul Lin028bde12011-11-14 23:35:39 +00001562 int err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001563
Pantelis Antoniouc9e75912014-02-26 19:28:45 +02001564 /* we pretend there's no card when init is NULL */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001565 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Redingb9c8b772012-01-02 01:15:37 +00001566 mmc->has_init = 0;
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001567#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Redingb9c8b772012-01-02 01:15:37 +00001568 printf("MMC: no card present\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001569#endif
Thierry Redingb9c8b772012-01-02 01:15:37 +00001570 return NO_CARD_ERR;
1571 }
1572
Lei Wen31b99802011-05-02 16:26:26 +00001573 if (mmc->has_init)
1574 return 0;
1575
Paul Kocialkowski2439fe92014-11-08 20:55:45 +01001576 board_mmc_power_init();
1577
Pantelis Antoniouc9e75912014-02-26 19:28:45 +02001578 /* made sure it's not NULL earlier */
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001579 err = mmc->cfg->ops->init(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001580
1581 if (err)
1582 return err;
1583
Andrew Gabbasov9fc2a412014-12-01 06:59:09 -06001584 mmc->ddr_mode = 0;
Ilya Yanok8459aab2009-06-29 17:53:16 +04001585 mmc_set_bus_width(mmc, 1);
1586 mmc_set_clock(mmc, 1);
1587
Andy Flemingad347bb2008-10-30 16:41:01 -05001588 /* Reset the Card */
1589 err = mmc_go_idle(mmc);
1590
1591 if (err)
1592 return err;
1593
Lei Wen31b99802011-05-02 16:26:26 +00001594 /* The internal partition reset to user partition(0) at every CMD0*/
1595 mmc->part_num = 0;
1596
Andy Flemingad347bb2008-10-30 16:41:01 -05001597 /* Test for SD version 2 */
Macpaul Lin028bde12011-11-14 23:35:39 +00001598 err = mmc_send_if_cond(mmc);
Andy Flemingad347bb2008-10-30 16:41:01 -05001599
Andy Flemingad347bb2008-10-30 16:41:01 -05001600 /* Now try to get the SD card's operating condition */
1601 err = sd_send_op_cond(mmc);
1602
1603 /* If the command timed out, we check for an MMC card */
1604 if (err == TIMEOUT) {
1605 err = mmc_send_op_cond(mmc);
1606
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001607 if (err && err != IN_PROGRESS) {
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001608#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Flemingad347bb2008-10-30 16:41:01 -05001609 printf("Card did not respond to voltage select!\n");
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001610#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001611 return UNUSABLE_ERR;
1612 }
1613 }
1614
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001615 if (err == IN_PROGRESS)
1616 mmc->init_in_progress = 1;
1617
1618 return err;
1619}
1620
1621static int mmc_complete_init(struct mmc *mmc)
1622{
1623 int err = 0;
1624
1625 if (mmc->op_cond_pending)
1626 err = mmc_complete_op_cond(mmc);
1627
1628 if (!err)
1629 err = mmc_startup(mmc);
Lei Wen31b99802011-05-02 16:26:26 +00001630 if (err)
1631 mmc->has_init = 0;
1632 else
1633 mmc->has_init = 1;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001634 mmc->init_in_progress = 0;
Lei Wen31b99802011-05-02 16:26:26 +00001635 return err;
Andy Flemingad347bb2008-10-30 16:41:01 -05001636}
1637
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001638int mmc_init(struct mmc *mmc)
1639{
1640 int err = IN_PROGRESS;
Mateusz Zalegada351782014-04-29 20:15:30 +02001641 unsigned start;
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001642
1643 if (mmc->has_init)
1644 return 0;
Mateusz Zalegada351782014-04-29 20:15:30 +02001645
1646 start = get_timer(0);
1647
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001648 if (!mmc->init_in_progress)
1649 err = mmc_start_init(mmc);
1650
1651 if (!err || err == IN_PROGRESS)
1652 err = mmc_complete_init(mmc);
1653 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1654 return err;
1655}
1656
Markus Niebel03951412013-12-16 13:40:46 +01001657int mmc_set_dsr(struct mmc *mmc, u16 val)
1658{
1659 mmc->dsr = val;
1660 return 0;
1661}
1662
Jeroen Hofstee47726302014-07-10 22:46:28 +02001663/* CPU-specific MMC initializations */
1664__weak int cpu_mmc_init(bd_t *bis)
Andy Flemingad347bb2008-10-30 16:41:01 -05001665{
1666 return -1;
1667}
1668
Jeroen Hofstee47726302014-07-10 22:46:28 +02001669/* board-specific MMC initializations. */
1670__weak int board_mmc_init(bd_t *bis)
1671{
1672 return -1;
1673}
Andy Flemingad347bb2008-10-30 16:41:01 -05001674
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001675#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1676
Andy Flemingad347bb2008-10-30 16:41:01 -05001677void print_mmc_devices(char separator)
1678{
1679 struct mmc *m;
1680 struct list_head *entry;
1681
1682 list_for_each(entry, &mmc_devices) {
1683 m = list_entry(entry, struct mmc, link);
1684
Pantelis Antoniou2c850462014-03-11 19:34:20 +02001685 printf("%s: %d", m->cfg->name, m->block_dev.dev);
Andy Flemingad347bb2008-10-30 16:41:01 -05001686
Lubomir Popov456104e2014-11-11 12:25:42 +02001687 if (entry->next != &mmc_devices) {
1688 printf("%c", separator);
1689 if (separator != '\n')
1690 puts (" ");
1691 }
Andy Flemingad347bb2008-10-30 16:41:01 -05001692 }
1693
1694 printf("\n");
1695}
1696
Paul Burton6a7c5ba2013-09-04 16:12:25 +01001697#else
1698void print_mmc_devices(char separator) { }
1699#endif
1700
Lei Wend430d7c2011-05-02 16:26:25 +00001701int get_mmc_num(void)
1702{
1703 return cur_dev_num;
1704}
1705
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001706void mmc_set_preinit(struct mmc *mmc, int preinit)
1707{
1708 mmc->preinit = preinit;
1709}
1710
1711static void do_preinit(void)
1712{
1713 struct mmc *m;
1714 struct list_head *entry;
1715
1716 list_for_each(entry, &mmc_devices) {
1717 m = list_entry(entry, struct mmc, link);
1718
1719 if (m->preinit)
1720 mmc_start_init(m);
1721 }
1722}
1723
1724
Andy Flemingad347bb2008-10-30 16:41:01 -05001725int mmc_initialize(bd_t *bis)
1726{
1727 INIT_LIST_HEAD (&mmc_devices);
1728 cur_dev_num = 0;
1729
1730 if (board_mmc_init(bis) < 0)
1731 cpu_mmc_init(bis);
1732
Ying Zhang9ff70262013-08-16 15:16:11 +08001733#ifndef CONFIG_SPL_BUILD
Andy Flemingad347bb2008-10-30 16:41:01 -05001734 print_mmc_devices(',');
Ying Zhang9ff70262013-08-16 15:16:11 +08001735#endif
Andy Flemingad347bb2008-10-30 16:41:01 -05001736
Che-Liang Chiou4a2c7d72012-11-28 15:21:13 +00001737 do_preinit();
Andy Flemingad347bb2008-10-30 16:41:01 -05001738 return 0;
1739}
Amar1104e9b2013-04-27 11:42:58 +05301740
1741#ifdef CONFIG_SUPPORT_EMMC_BOOT
1742/*
1743 * This function changes the size of boot partition and the size of rpmb
1744 * partition present on EMMC devices.
1745 *
1746 * Input Parameters:
1747 * struct *mmc: pointer for the mmc device strcuture
1748 * bootsize: size of boot partition
1749 * rpmbsize: size of rpmb partition
1750 *
1751 * Returns 0 on success.
1752 */
1753
1754int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1755 unsigned long rpmbsize)
1756{
1757 int err;
1758 struct mmc_cmd cmd;
1759
1760 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1761 cmd.cmdidx = MMC_CMD_RES_MAN;
1762 cmd.resp_type = MMC_RSP_R1b;
1763 cmd.cmdarg = MMC_CMD62_ARG1;
1764
1765 err = mmc_send_cmd(mmc, &cmd, NULL);
1766 if (err) {
1767 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1768 return err;
1769 }
1770
1771 /* Boot partition changing mode */
1772 cmd.cmdidx = MMC_CMD_RES_MAN;
1773 cmd.resp_type = MMC_RSP_R1b;
1774 cmd.cmdarg = MMC_CMD62_ARG2;
1775
1776 err = mmc_send_cmd(mmc, &cmd, NULL);
1777 if (err) {
1778 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1779 return err;
1780 }
1781 /* boot partition size is multiple of 128KB */
1782 bootsize = (bootsize * 1024) / 128;
1783
1784 /* Arg: boot partition size */
1785 cmd.cmdidx = MMC_CMD_RES_MAN;
1786 cmd.resp_type = MMC_RSP_R1b;
1787 cmd.cmdarg = bootsize;
1788
1789 err = mmc_send_cmd(mmc, &cmd, NULL);
1790 if (err) {
1791 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1792 return err;
1793 }
1794 /* RPMB partition size is multiple of 128KB */
1795 rpmbsize = (rpmbsize * 1024) / 128;
1796 /* Arg: RPMB partition size */
1797 cmd.cmdidx = MMC_CMD_RES_MAN;
1798 cmd.resp_type = MMC_RSP_R1b;
1799 cmd.cmdarg = rpmbsize;
1800
1801 err = mmc_send_cmd(mmc, &cmd, NULL);
1802 if (err) {
1803 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1804 return err;
1805 }
1806 return 0;
1807}
1808
1809/*
Tom Rini4cf854c2014-02-05 10:24:22 -05001810 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1811 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1812 * and BOOT_MODE.
1813 *
1814 * Returns 0 on success.
1815 */
1816int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1817{
1818 int err;
1819
1820 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1821 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1822 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1823 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1824
1825 if (err)
1826 return err;
1827 return 0;
1828}
1829
1830/*
Tom Rinif8c6f792014-02-05 10:24:21 -05001831 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1832 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1833 * PARTITION_ACCESS.
1834 *
1835 * Returns 0 on success.
1836 */
1837int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1838{
1839 int err;
1840
1841 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1842 EXT_CSD_BOOT_ACK(ack) |
1843 EXT_CSD_BOOT_PART_NUM(part_num) |
1844 EXT_CSD_PARTITION_ACCESS(access));
1845
1846 if (err)
1847 return err;
1848 return 0;
1849}
Tom Rini35a3ea12014-02-07 14:15:20 -05001850
1851/*
1852 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1853 * for enable. Note that this is a write-once field for non-zero values.
1854 *
1855 * Returns 0 on success.
1856 */
1857int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1858{
1859 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1860 enable);
1861}
Amar1104e9b2013-04-27 11:42:58 +05301862#endif