Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 2 | /* |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 3 | * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc. |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 4 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 9b61c7c | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 8 | #include <irq_func.h> |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 9 | |
| 10 | #include <asm/timer.h> |
| 11 | #include <asm/immap.h> |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 12 | #include <asm/io.h> |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 13 | |
| 14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | |
| 16 | static ulong timestamp; |
| 17 | |
| 18 | #if defined(CONFIG_SLTTMR) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 19 | #ifndef CONFIG_SYS_UDELAY_BASE |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 20 | # error "uDelay base not defined!" |
| 21 | #endif |
| 22 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 23 | #if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK) |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 24 | # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!" |
| 25 | #endif |
| 26 | extern void dtimer_intr_setup(void); |
| 27 | |
Ingo van Lil | f0f778a | 2009-11-24 14:09:21 +0100 | [diff] [blame] | 28 | void __udelay(unsigned long usec) |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 29 | { |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 30 | slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 31 | u32 now, freq; |
| 32 | |
| 33 | /* 1 us period */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 34 | freq = CONFIG_SYS_TIMER_PRESCALER; |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 35 | |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 36 | /* Disable */ |
| 37 | out_be32(&timerp->cr, 0); |
| 38 | out_be32(&timerp->tcnt, usec * freq); |
| 39 | out_be32(&timerp->cr, SLT_CR_TEN); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 40 | |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 41 | now = in_be32(&timerp->cnt); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 42 | while (now != 0) |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 43 | now = in_be32(&timerp->cnt); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 44 | |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 45 | setbits_be32(&timerp->sr, SLT_SR_ST); |
| 46 | out_be32(&timerp->cr, 0); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 47 | } |
| 48 | |
| 49 | void dtimer_interrupt(void *not_used) |
| 50 | { |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 51 | slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 52 | |
| 53 | /* check for timer interrupt asserted */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 54 | if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) { |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 55 | setbits_be32(&timerp->sr, SLT_SR_ST); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 56 | timestamp++; |
| 57 | return; |
| 58 | } |
| 59 | } |
| 60 | |
Jason Jin | 1dd491e | 2011-08-19 10:02:32 +0800 | [diff] [blame] | 61 | int timer_init(void) |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 62 | { |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 63 | slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 64 | |
| 65 | timestamp = 0; |
| 66 | |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 67 | /* disable timer */ |
| 68 | out_be32(&timerp->cr, 0); |
| 69 | out_be32(&timerp->tcnt, 0); |
| 70 | /* clear status */ |
| 71 | out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 72 | |
| 73 | /* initialize and enable timer interrupt */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 75 | |
| 76 | /* Interrupt every ms */ |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 77 | out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER); |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 78 | |
| 79 | dtimer_intr_setup(); |
| 80 | |
| 81 | /* set a period of 1us, set timer mode to restart and |
| 82 | enable timer and interrupt */ |
Alison Wang | 027f76f | 2012-03-26 21:49:07 +0000 | [diff] [blame] | 83 | out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN); |
Jason Jin | 1dd491e | 2011-08-19 10:02:32 +0800 | [diff] [blame] | 84 | return 0; |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 85 | } |
| 86 | |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 87 | ulong get_timer(ulong base) |
| 88 | { |
| 89 | return (timestamp - base); |
| 90 | } |
| 91 | |
TsiChungLiew | 8999e6b | 2008-01-15 13:37:34 -0600 | [diff] [blame] | 92 | #endif /* CONFIG_SLTTMR */ |