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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew8999e6b2008-01-15 13:37:34 -06002/*
Alison Wang027f76f2012-03-26 21:49:07 +00003 * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew8999e6b2008-01-15 13:37:34 -06004 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew8999e6b2008-01-15 13:37:34 -06005 */
6
7#include <common.h>
Simon Glass9b61c7c2019-11-14 12:57:41 -07008#include <irq_func.h>
TsiChungLiew8999e6b2008-01-15 13:37:34 -06009
10#include <asm/timer.h>
11#include <asm/immap.h>
Alison Wang027f76f2012-03-26 21:49:07 +000012#include <asm/io.h>
TsiChungLiew8999e6b2008-01-15 13:37:34 -060013
14DECLARE_GLOBAL_DATA_PTR;
15
16static ulong timestamp;
17
18#if defined(CONFIG_SLTTMR)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020019#ifndef CONFIG_SYS_UDELAY_BASE
TsiChungLiew8999e6b2008-01-15 13:37:34 -060020# error "uDelay base not defined!"
21#endif
22
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020023#if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
TsiChungLiew8999e6b2008-01-15 13:37:34 -060024# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
25#endif
26extern void dtimer_intr_setup(void);
27
Ingo van Lilf0f778a2009-11-24 14:09:21 +010028void __udelay(unsigned long usec)
TsiChungLiew8999e6b2008-01-15 13:37:34 -060029{
Alison Wang027f76f2012-03-26 21:49:07 +000030 slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060031 u32 now, freq;
32
33 /* 1 us period */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020034 freq = CONFIG_SYS_TIMER_PRESCALER;
TsiChungLiew8999e6b2008-01-15 13:37:34 -060035
Alison Wang027f76f2012-03-26 21:49:07 +000036 /* Disable */
37 out_be32(&timerp->cr, 0);
38 out_be32(&timerp->tcnt, usec * freq);
39 out_be32(&timerp->cr, SLT_CR_TEN);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060040
Alison Wang027f76f2012-03-26 21:49:07 +000041 now = in_be32(&timerp->cnt);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060042 while (now != 0)
Alison Wang027f76f2012-03-26 21:49:07 +000043 now = in_be32(&timerp->cnt);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060044
Alison Wang027f76f2012-03-26 21:49:07 +000045 setbits_be32(&timerp->sr, SLT_SR_ST);
46 out_be32(&timerp->cr, 0);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060047}
48
49void dtimer_interrupt(void *not_used)
50{
Alison Wang027f76f2012-03-26 21:49:07 +000051 slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060052
53 /* check for timer interrupt asserted */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054 if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
Alison Wang027f76f2012-03-26 21:49:07 +000055 setbits_be32(&timerp->sr, SLT_SR_ST);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060056 timestamp++;
57 return;
58 }
59}
60
Jason Jin1dd491e2011-08-19 10:02:32 +080061int timer_init(void)
TsiChungLiew8999e6b2008-01-15 13:37:34 -060062{
Alison Wang027f76f2012-03-26 21:49:07 +000063 slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060064
65 timestamp = 0;
66
Alison Wang027f76f2012-03-26 21:49:07 +000067 /* disable timer */
68 out_be32(&timerp->cr, 0);
69 out_be32(&timerp->tcnt, 0);
70 /* clear status */
71 out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060072
73 /* initialize and enable timer interrupt */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074 irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060075
76 /* Interrupt every ms */
Alison Wang027f76f2012-03-26 21:49:07 +000077 out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060078
79 dtimer_intr_setup();
80
81 /* set a period of 1us, set timer mode to restart and
82 enable timer and interrupt */
Alison Wang027f76f2012-03-26 21:49:07 +000083 out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN);
Jason Jin1dd491e2011-08-19 10:02:32 +080084 return 0;
TsiChungLiew8999e6b2008-01-15 13:37:34 -060085}
86
TsiChungLiew8999e6b2008-01-15 13:37:34 -060087ulong get_timer(ulong base)
88{
89 return (timestamp - base);
90}
91
TsiChungLiew8999e6b2008-01-15 13:37:34 -060092#endif /* CONFIG_SLTTMR */