blob: 459edadb5876c299458b354d75c2380ba22e5215 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +00002/*
3 * [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c]
4 *
5 * (C) Copyright 2011
Andreas Bießmann07dafdb2016-05-01 03:46:16 +02006 * Andreas Bießmann <andreas@biessmann.org>
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +00007 *
8 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01009 * Stelian Pop <stelian@popies.net>
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000010 * Lead Tech Design <www.leadtechdesign.com>
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000011 */
12
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000013#include <asm/io.h>
14#include <asm/arch/at91_common.h>
Wenyou Yang57b7f292016-02-03 10:16:49 +080015#include <asm/arch/clk.h>
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000016#include <asm/arch/gpio.h>
17
18/*
19 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
20 * peripheral pins. Good to have if hardware is soldered optionally
21 * or in case of SPI no slave is selected. Avoid lines to float
22 * needlessly. Use a short local PUP define.
23 *
24 * Due to errata "TXD floats when CTS is inactive" pullups are always
25 * on for TXD pins.
26 */
27#ifdef CONFIG_AT91_GPIO_PULLUP
28# define PUP CONFIG_AT91_GPIO_PULLUP
29#else
30# define PUP 0
31#endif
32
33void at91_serial0_hw_init(void)
34{
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000035 at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* TXD0 */
36 at91_set_a_periph(AT91_PIO_PORTA, 18, PUP); /* RXD0 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080037 at91_periph_clk_enable(ATMEL_ID_USART0);
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000038}
39
40void at91_serial1_hw_init(void)
41{
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000042 at91_set_a_periph(AT91_PIO_PORTB, 20, PUP); /* RXD1 */
43 at91_set_a_periph(AT91_PIO_PORTB, 21, 1); /* TXD1 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080044 at91_periph_clk_enable(ATMEL_ID_USART1);
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000045}
46
47void at91_serial2_hw_init(void)
48{
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000049 at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* RXD2 */
50 at91_set_a_periph(AT91_PIO_PORTA, 23, 1); /* TXD2 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080051 at91_periph_clk_enable(ATMEL_ID_USART2);
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000052}
53
Andreas Bießmann5e1f6c82011-06-12 01:49:13 +000054void at91_seriald_hw_init(void)
55{
56 at91_set_a_periph(AT91_PIO_PORTA, 30, PUP); /* DRXD */
57 at91_set_a_periph(AT91_PIO_PORTA, 31, 1); /* DTXD */
58 /* writing SYS to PCER has no effect on AT91RM9200 */
59}