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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk591dda52002-11-18 00:14:45 +00002/*
Bin Meng8c5acf42014-12-12 21:05:22 +08003 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00004 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10005 * (C) Copyright 2008-2011
6 * Graeme Russ, <graeme.russ@gmail.com>
7 *
8 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02009 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +000010 */
11
wdenk591dda52002-11-18 00:14:45 +000012#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110013#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070014#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110015#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110016#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110017#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080018#include <generated/asm-offsets.h>
Bin Meng253a24a2018-10-25 03:05:37 -070019#include <linux/linkage.h>
wdenk591dda52002-11-18 00:14:45 +000020
Alexander Graf94a10f22018-06-12 07:48:37 +020021.section .text.start
wdenk591dda52002-11-18 00:14:45 +000022.code32
23.globl _start
wdenk57b2d802003-06-27 21:31:46 +000024.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100025.globl _x86boot_start
26_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100027 /*
Simon Glass611f7492015-07-31 09:31:25 -060028 * This is the fail-safe 32-bit bootstrap entry point.
29 *
30 * This code is used when booting from another boot loader like
31 * coreboot or EFI. So we repeat some of the same init found in
32 * start16.
Graeme Russ8accbb92010-04-24 00:05:42 +100033 */
34 cli
35 cld
36
Graeme Russc379b5d2011-11-08 02:33:23 +000037 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100038 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110039 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100040 movl %eax, %cr0
41 wbinvd
42
Gabe Blackef899322012-11-03 11:41:28 +000043 /* Tell 32-bit code it is being entered from an in-RAM copy */
Simon Glass5d18dc92015-07-31 09:31:28 -060044 movl $GD_FLG_WARM_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060045
46 /*
47 * Zero the BIST (Built-In Self Test) value since we don't have it.
48 * It must be 0 or the previous loader would have reported an error.
49 */
50 movl $0, %ebp
51
Gabe Blackef899322012-11-03 11:41:28 +000052 jmp 1f
Simon Glass5d18dc92015-07-31 09:31:28 -060053
54 /* Add a way for tools to discover the _start entry point */
55 .align 4
56 .long 0x12345678
wdenk57b2d802003-06-27 21:31:46 +000057_start:
Gabe Blackef899322012-11-03 11:41:28 +000058 /*
Simon Glass611f7492015-07-31 09:31:25 -060059 * This is the 32-bit cold-reset entry point, coming from start16.
Simon Glass5d18dc92015-07-31 09:31:28 -060060 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
Gabe Blackef899322012-11-03 11:41:28 +000061 */
Simon Glass5d18dc92015-07-31 09:31:28 -060062 movl $GD_FLG_COLD_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060063
Simon Glass1f4476c2014-11-06 13:20:10 -070064 /* Save BIST */
65 movl %eax, %ebp
Simon Glassf95ad8c2015-08-04 12:33:57 -0600661:
67
68 /* Save table pointer */
69 movl %ecx, %esi
Graeme Russ8accbb92010-04-24 00:05:42 +100070
Andy Shevchenko2ae7da02017-02-05 16:52:00 +030071#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -060072 lgdt gdt_ptr2
73#endif
74
Simon Glass611f7492015-07-31 09:31:25 -060075 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110076 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110077 movw %ax, %fs
78 movw %ax, %ds
79 movw %ax, %gs
80 movw %ax, %es
81 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000082
Mike Williamsbf895ad2011-07-22 04:01:30 +000083 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100084 lidt blank_idt_ptr
85
Simon Glass611f7492015-07-31 09:31:25 -060086 /*
87 * Critical early platform init - generally not used, we prefer init
88 * to happen later when we have a console, in case something goes
89 * wrong.
90 */
wdenk591dda52002-11-18 00:14:45 +000091 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110092.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000093early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -070094 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +000095
Graeme Russbc761932011-02-12 15:11:52 +110096 /* Initialise Cache-As-RAM */
97 jmp car_init
98.globl car_init_ret
99car_init_ret:
Bin Meng005f0af2014-12-12 21:05:31 +0800100#ifndef CONFIG_HAVE_FSP
Graeme Russbc761932011-02-12 15:11:52 +1100101 /*
102 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
103 * or fully initialised SDRAM - we really don't care which)
104 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass611f7492015-07-31 09:31:25 -0600105 * and early malloc() area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -0700106 *
107 * Stack grows down from top of CAR. We have:
108 *
109 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -0700110 * MRC area
Simon Glass0e27b872015-08-10 20:44:32 -0600111 * global_data with x86 global descriptor table
Simon Glassa4fd0db2014-11-06 13:20:04 -0700112 * early malloc area
113 * stack
114 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +1100115 */
Simon Glass268eefd2014-11-12 22:42:28 -0700116 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
117#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
118 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
119#endif
Bin Meng005f0af2014-12-12 21:05:31 +0800120#else
121 /*
Bin Meng73574dc2015-08-20 06:40:20 -0700122 * U-Boot enters here twice. For the first time it comes from
123 * car_init_done() with esp points to a temporary stack and esi
124 * set to zero. For the second time it comes from fsp_init_done()
125 * with esi holding the HOB list address returned by the FSP.
Bin Meng005f0af2014-12-12 21:05:31 +0800126 */
127#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600128 /* Set up global data */
129 mov %esp, %eax
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100130 call board_init_f_alloc_reserve
Simon Glass0e27b872015-08-10 20:44:32 -0600131 mov %eax, %esp
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100132 call board_init_f_init_reserve
Graeme Russ007818a2012-11-27 15:38:36 +0000133
Simon Glass47730122015-10-18 19:51:26 -0600134#ifdef CONFIG_DEBUG_UART
135 call debug_uart_init
136#endif
Simon Glass9bbb37f2015-08-02 18:07:21 -0600137
Simon Glass0e27b872015-08-10 20:44:32 -0600138 /* Get address of global_data */
139 mov %fs:0, %edx
Bin Meng005f0af2014-12-12 21:05:31 +0800140#ifdef CONFIG_HAVE_FSP
Simon Glass0e27b872015-08-10 20:44:32 -0600141 /* Store the HOB list if we have one */
Bin Mengd560c5c2015-06-07 11:33:14 +0800142 test %esi, %esi
143 jz skip_hob
Simon Glass0e27b872015-08-10 20:44:32 -0600144 movl %esi, GD_HOB_LIST(%edx)
Bin Meng005f0af2014-12-12 21:05:31 +0800145
Bin Meng12440cd2015-08-20 06:40:19 -0700146 /*
147 * After fsp_init() returns, the stack has already been switched to a
148 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
149 * Enlarge the size of malloc() pool before relocation since we have
150 * plenty of memory now.
151 */
152 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
153 movl %esp, GD_MALLOC_BASE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800154skip_hob:
Simon Glassf95ad8c2015-08-04 12:33:57 -0600155#else
156 /* Store table pointer */
Simon Glass0e27b872015-08-10 20:44:32 -0600157 movl %esi, GD_TABLE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800158#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600159 /* Store BIST */
160 movl %ebp, GD_BIST(%edx)
Graeme Russ35368962011-12-31 22:58:15 +1100161
Graeme Russ38183932011-02-12 15:11:54 +1100162 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700163 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000164 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100165
Simon Glass611f7492015-07-31 09:31:25 -0600166 /* Enter, U-Boot! */
Graeme Russ45fc1d82011-04-13 19:43:26 +1000167 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000168
169 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000170 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100171 jmp die
172
Graeme Russd7755b42012-01-01 15:06:39 +1100173.globl board_init_f_r_trampoline
174.type board_init_f_r_trampoline, @function
175board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100176 /*
177 * SDRAM has been initialised, U-Boot code has been copied into
178 * RAM, BSS has been cleared and relocation adjustments have been
179 * made. It is now time to jump into the in-RAM copy of U-Boot
180 *
Graeme Russd7755b42012-01-01 15:06:39 +1100181 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100182 */
183
Graeme Russ007818a2012-11-27 15:38:36 +0000184 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100185 movl %eax, %esp
186
Simon Glass0e27b872015-08-10 20:44:32 -0600187 /* See if we need to disable CAR */
Simon Glass78da72c2015-01-01 16:18:13 -0700188 call car_uninit
Bin Meng253a24a2018-10-25 03:05:37 -0700189
Simon Glass611f7492015-07-31 09:31:25 -0600190 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russd7755b42012-01-01 15:06:39 +1100191 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100192
Simon Glassd4f266f2019-05-02 10:52:27 -0600193#ifdef CONFIG_TPL
194.globl jump_to_spl
195.type jump_to_spl, @function
196jump_to_spl:
197 /* Reset stack to the top of CAR space */
198 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
199#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
200 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
201#endif
202
203 jmp *%eax
204#endif
205
Graeme Russc379b5d2011-11-08 02:33:23 +0000206die:
207 hlt
wdenk591dda52002-11-18 00:14:45 +0000208 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000209 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000210
Bin Meng253a24a2018-10-25 03:05:37 -0700211WEAK(car_uninit)
212 ret
213ENDPROC(car_uninit)
214
Graeme Russ8accbb92010-04-24 00:05:42 +1000215blank_idt_ptr:
216 .word 0 /* limit */
217 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000218
219 .p2align 2 /* force 4-byte alignment */
220
Simon Glass611f7492015-07-31 09:31:25 -0600221 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russ786c3952011-11-08 02:33:19 +0000222multiboot_header:
223 /* magic */
Simon Glass611f7492015-07-31 09:31:25 -0600224 .long 0x1badb002
Graeme Russ786c3952011-11-08 02:33:19 +0000225 /* flags */
226 .long (1 << 16)
227 /* checksum */
228 .long -0x1BADB002 - (1 << 16)
229 /* header addr */
230 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
231 /* load addr */
232 .long CONFIG_SYS_TEXT_BASE
233 /* load end addr */
234 .long 0
235 /* bss end addr */
236 .long 0
237 /* entry addr */
238 .long CONFIG_SYS_TEXT_BASE
Simon Glassb4ded742016-03-16 07:44:40 -0600239
Andy Shevchenko2ae7da02017-02-05 16:52:00 +0300240#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -0600241 /*
242 * The following Global Descriptor Table is just enough to get us into
243 * 'Flat Protected Mode' - It will be discarded as soon as the final
244 * GDT is setup in a safe location in RAM
245 */
246gdt_ptr2:
247 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
248 .long gdt_rom2 /* base */
249
250 /* Some CPUs are picky about GDT alignment... */
251 .align 16
252.globl gdt_rom2
253gdt_rom2:
254 /*
255 * The GDT table ...
256 *
257 * Selector Type
258 * 0x00 NULL
259 * 0x08 Unused
260 * 0x10 32bit code
261 * 0x18 32bit data/stack
262 */
263 /* The NULL Desciptor - Mandatory */
264 .word 0x0000 /* limit_low */
265 .word 0x0000 /* base_low */
266 .byte 0x00 /* base_middle */
267 .byte 0x00 /* access */
268 .byte 0x00 /* flags + limit_high */
269 .byte 0x00 /* base_high */
270
271 /* Unused Desciptor - (matches Linux) */
272 .word 0x0000 /* limit_low */
273 .word 0x0000 /* base_low */
274 .byte 0x00 /* base_middle */
275 .byte 0x00 /* access */
276 .byte 0x00 /* flags + limit_high */
277 .byte 0x00 /* base_high */
278
279 /*
280 * The Code Segment Descriptor:
281 * - Base = 0x00000000
282 * - Size = 4GB
283 * - Access = Present, Ring 0, Exec (Code), Readable
284 * - Flags = 4kB Granularity, 32-bit
285 */
286 .word 0xffff /* limit_low */
287 .word 0x0000 /* base_low */
288 .byte 0x00 /* base_middle */
289 .byte 0x9b /* access */
290 .byte 0xcf /* flags + limit_high */
291 .byte 0x00 /* base_high */
292
293 /*
294 * The Data Segment Descriptor:
295 * - Base = 0x00000000
296 * - Size = 4GB
297 * - Access = Present, Ring 0, Non-Exec (Data), Writable
298 * - Flags = 4kB Granularity, 32-bit
299 */
300 .word 0xffff /* limit_low */
301 .word 0x0000 /* base_low */
302 .byte 0x00 /* base_middle */
303 .byte 0x93 /* access */
304 .byte 0xcf /* flags + limit_high */
305 .byte 0x00 /* base_high */
306#endif