blob: e118bba5a2a77b7aa6e985698ebbaebccfce32ba [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassfc0ba2d2015-01-01 16:18:15 -07002/*
3 * (C) Copyright 2014 Google, Inc
Simon Glassfc0ba2d2015-01-01 16:18:15 -07004 */
5
6#include <common.h>
Simon Glassed38aef2020-05-10 11:40:03 -06007#include <command.h>
Simon Glass7403c262020-07-17 08:48:22 -06008#include <log.h>
Simon Glassfc0ba2d2015-01-01 16:18:15 -07009#include <asm/msr.h>
Simon Glass7403c262020-07-17 08:48:22 -060010#include <asm/mp.h>
Simon Glassfc0ba2d2015-01-01 16:18:15 -070011#include <asm/mtrr.h>
12
13static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = {
14 "Uncacheable",
15 "Combine",
16 "2",
17 "3",
18 "Through",
19 "Protect",
20 "Back",
21};
22
Simon Glass7403c262020-07-17 08:48:22 -060023static void read_mtrrs(void *arg)
Simon Glassfc0ba2d2015-01-01 16:18:15 -070024{
Simon Glass7403c262020-07-17 08:48:22 -060025 struct mtrr_info *info = arg;
26
27 mtrr_read_all(info);
28}
29
30static int do_mtrr_list(int cpu_select)
31{
32 struct mtrr_info info;
33 int ret;
Simon Glassfc0ba2d2015-01-01 16:18:15 -070034 int i;
35
36 printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||",
37 "Mask ||", "Size ||");
Simon Glass7403c262020-07-17 08:48:22 -060038 memset(&info, '\0', sizeof(info));
39 ret = mp_run_on_cpus(cpu_select, read_mtrrs, &info);
40 if (ret)
41 return log_msg_ret("run", ret);
Simon Glassfc0ba2d2015-01-01 16:18:15 -070042 for (i = 0; i < MTRR_COUNT; i++) {
43 const char *type = "Invalid";
44 uint64_t base, mask, size;
45 bool valid;
46
Simon Glass7403c262020-07-17 08:48:22 -060047 base = info.mtrr[i].base;
48 mask = info.mtrr[i].mask;
Simon Glassfc0ba2d2015-01-01 16:18:15 -070049 size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1);
50 size |= (1 << 12) - 1;
51 size += 1;
52 valid = mask & MTRR_PHYS_MASK_VALID;
53 type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK];
54 printf("%d %-5s %-12s %016llx %016llx %016llx\n", i,
Bin Meng933a29b2015-07-06 16:31:32 +080055 valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK,
56 mask & ~MTRR_PHYS_MASK_VALID, size);
Simon Glassfc0ba2d2015-01-01 16:18:15 -070057 }
58
59 return 0;
60}
61
Simon Glass29e1d772020-07-17 08:48:27 -060062static int do_mtrr_set(int cpu_select, uint reg, int argc, char *const argv[])
Simon Glassfc0ba2d2015-01-01 16:18:15 -070063{
64 const char *typename = argv[0];
Simon Glassfc0ba2d2015-01-01 16:18:15 -070065 uint32_t start, size;
66 uint64_t base, mask;
67 int i, type = -1;
68 bool valid;
Simon Glass29e1d772020-07-17 08:48:27 -060069 int ret;
Simon Glassfc0ba2d2015-01-01 16:18:15 -070070
71 if (argc < 3)
72 return CMD_RET_USAGE;
73 for (i = 0; i < MTRR_TYPE_COUNT; i++) {
74 if (*typename == *mtrr_type_name[i])
75 type = i;
76 }
77 if (type == -1) {
78 printf("Invalid type name %s\n", typename);
79 return CMD_RET_USAGE;
80 }
81 start = simple_strtoul(argv[1], NULL, 16);
82 size = simple_strtoul(argv[2], NULL, 16);
83
84 base = start | type;
85 valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID;
86 mask = ~((uint64_t)size - 1);
87 mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1;
88 if (valid)
89 mask |= MTRR_PHYS_MASK_VALID;
90
Simon Glass29e1d772020-07-17 08:48:27 -060091 ret = mtrr_set(cpu_select, reg, base, mask);
92 if (ret)
93 return CMD_RET_FAILURE;
Simon Glassfc0ba2d2015-01-01 16:18:15 -070094
95 return 0;
96}
97
Simon Glassed38aef2020-05-10 11:40:03 -060098static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
99 char *const argv[])
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700100{
Simon Glass2c601b62020-07-17 08:48:28 -0600101 int cmd;
Simon Glass7403c262020-07-17 08:48:22 -0600102 int cpu_select;
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700103 uint reg;
Simon Glass2c601b62020-07-17 08:48:28 -0600104 int ret;
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700105
Simon Glass7403c262020-07-17 08:48:22 -0600106 cpu_select = MP_SELECT_BSP;
Simon Glasse643edd2020-07-17 08:48:29 -0600107 if (argc >= 3 && !strcmp("-c", argv[1])) {
108 const char *cpustr;
109
110 cpustr = argv[2];
111 if (*cpustr == 'a')
112 cpu_select = MP_SELECT_ALL;
113 else
114 cpu_select = simple_strtol(cpustr, NULL, 16);
115 argc -= 2;
116 argv += 2;
117 }
Simon Glass2c601b62020-07-17 08:48:28 -0600118 argc--;
119 argv++;
120 cmd = argv[0] ? *argv[0] : 0;
121 if (argc < 1 || !cmd) {
122 cmd = 'l';
123 reg = 0;
124 } else {
125 if (argc < 2)
126 return CMD_RET_USAGE;
127 reg = simple_strtoul(argv[1], NULL, 16);
128 if (reg >= MTRR_COUNT) {
129 printf("Invalid register number\n");
130 return CMD_RET_USAGE;
131 }
132 }
133 if (cmd == 'l') {
Simon Glass3ac9fdb2020-07-17 08:48:31 -0600134 bool first;
135 int i;
136
137 i = mp_first_cpu(cpu_select);
138 if (i < 0) {
139 printf("Invalid CPU (err=%d)\n", i);
140 return CMD_RET_FAILURE;
141 }
142 first = true;
143 for (; i >= 0; i = mp_next_cpu(cpu_select, i)) {
144 if (!first)
145 printf("\n");
146 printf("CPU %d:\n", i);
147 ret = do_mtrr_list(i);
148 if (ret) {
149 printf("Failed to read CPU %d (err=%d)\n", i,
150 ret);
151 return CMD_RET_FAILURE;
152 }
153 first = false;
154 }
Simon Glass2c601b62020-07-17 08:48:28 -0600155 } else {
156 switch (cmd) {
157 case 'e':
158 ret = mtrr_set_valid(cpu_select, reg, true);
159 break;
160 case 'd':
161 ret = mtrr_set_valid(cpu_select, reg, false);
162 break;
163 case 's':
164 ret = do_mtrr_set(cpu_select, reg, argc - 2, argv + 2);
165 break;
166 default:
167 return CMD_RET_USAGE;
168 }
169 if (ret) {
170 printf("Operation failed (err=%d)\n", ret);
171 return CMD_RET_FAILURE;
172 }
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700173 }
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700174
175 return 0;
176}
177
178U_BOOT_CMD(
Simon Glasse643edd2020-07-17 08:48:29 -0600179 mtrr, 8, 1, do_mtrr,
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700180 "Use x86 memory type range registers (32-bit only)",
181 "[list] - list current registers\n"
182 "set <reg> <type> <start> <size> - set a register\n"
183 "\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
184 "disable <reg> - disable a register\n"
Simon Glasse643edd2020-07-17 08:48:29 -0600185 "enable <reg> - enable a register\n"
186 "\n"
187 "Precede command with '-c <n>|all' to access a particular hex CPU, e.g.\n"
188 " mtrr -c all list; mtrr -c 2e list"
Simon Glassfc0ba2d2015-01-01 16:18:15 -0700189);