| Jerome Brunet | 993709a | 2019-02-08 16:23:20 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2018 BayLibre, SAS |
| 4 | * Author: Neil Armstrong <narmstrong@baylibre.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __G12A_H__ |
| 8 | #define __G12A_H__ |
| 9 | |
| Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 10 | #ifndef __ASSEMBLY__ |
| 11 | #include <linux/bitops.h> |
| 12 | #endif |
| 13 | |
| Jerome Brunet | 993709a | 2019-02-08 16:23:20 +0100 | [diff] [blame] | 14 | #define G12A_AOBUS_BASE 0xff800000 |
| 15 | #define G12A_PERIPHS_BASE 0xff634400 |
| 16 | #define G12A_HIU_BASE 0xff63c000 |
| 17 | #define G12A_ETH_PHY_BASE 0xff64c000 |
| 18 | #define G12A_ETH_BASE 0xff3f0000 |
| 19 | |
| 20 | /* Always-On Peripherals registers */ |
| 21 | #define G12A_AO_ADDR(off) (G12A_AOBUS_BASE + ((off) << 2)) |
| 22 | |
| 23 | #define G12A_AO_SEC_GP_CFG0 G12A_AO_ADDR(0x90) |
| 24 | #define G12A_AO_SEC_GP_CFG3 G12A_AO_ADDR(0x93) |
| 25 | #define G12A_AO_SEC_GP_CFG4 G12A_AO_ADDR(0x94) |
| 26 | #define G12A_AO_SEC_GP_CFG5 G12A_AO_ADDR(0x95) |
| 27 | |
| 28 | #define G12A_AO_BOOT_DEVICE 0xF |
| 29 | #define G12A_AO_MEM_SIZE_MASK 0xFFFF0000 |
| 30 | #define G12A_AO_MEM_SIZE_SHIFT 16 |
| 31 | #define G12A_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000 |
| 32 | #define G12A_AO_BL31_RSVMEM_SIZE_SHIFT 16 |
| 33 | #define G12A_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF |
| 34 | |
| Jerome Brunet | 993709a | 2019-02-08 16:23:20 +0100 | [diff] [blame] | 35 | #endif /* __G12A_H__ */ |