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Alex89e50d92017-02-06 19:17:34 -08001
2config BITBANGMII
3 bool "Bit-banged ethernet MII management channel support"
4
Tom Rini8b084372022-03-21 21:33:31 -04005config BITBANGMII_MULTI
6 bool "Enable the multi bus support"
7 depends on BITBANGMII
8
Alex89e50d92017-02-06 19:17:34 -08009config MV88E6352_SWITCH
10 bool "Marvell 88E6352 switch support"
11
12menuconfig PHYLIB
13 bool "Ethernet PHY (physical media interface) support"
Michal Simek5647da02018-02-06 13:23:52 +010014 depends on NET
Alex89e50d92017-02-06 19:17:34 -080015 help
16 Enable Ethernet PHY (physical media interface) support.
17
18if PHYLIB
19
Joe Hershberger46b7bd12018-03-30 11:52:16 -050020config PHY_ADDR_ENABLE
21 bool "Limit phy address"
22 default y if ARCH_SUNXI
23 help
24 Select this if you want to control which phy address is used
25
26if PHY_ADDR_ENABLE
Stefan Mavrodieve3ee5f52018-02-02 15:53:38 +020027config PHY_ADDR
28 int "PHY address"
29 default 1 if ARCH_SUNXI
30 default 0
31 help
32 The address of PHY on MII bus. Usually in range of 0 to 31.
Joe Hershberger46b7bd12018-03-30 11:52:16 -050033endif
Stefan Mavrodieve3ee5f52018-02-02 15:53:38 +020034
Florian Fainelli01b4ade2017-12-09 14:59:54 -080035config B53_SWITCH
36 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
37 help
38 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
39 This currently supports BCM53125 and similar models.
40
41if B53_SWITCH
42
43config B53_CPU_PORT
44 int "CPU port"
45 default 8
46
47config B53_PHY_PORTS
48 hex "Bitmask of PHY ports"
49
50endif # B53_SWITCH
51
Alex89e50d92017-02-06 19:17:34 -080052config MV88E61XX_SWITCH
Anatolij Gustschinb8b1a9e2019-10-27 01:14:41 +020053 bool "Marvell MV88E61xx Ethernet switch PHY support."
Alex89e50d92017-02-06 19:17:34 -080054
Tim Harveyc2cc9d42017-03-17 07:29:51 -070055if MV88E61XX_SWITCH
56
57config MV88E61XX_CPU_PORT
58 int "CPU Port"
59
60config MV88E61XX_PHY_PORTS
61 hex "Bitmask of PHY Ports"
62
63config MV88E61XX_FIXED_PORTS
64 hex "Bitmask of PHYless serdes Ports"
65
66endif # MV88E61XX_SWITCH
67
Alex89e50d92017-02-06 19:17:34 -080068config PHYLIB_10G
69 bool "Generic 10G PHY support"
70
Jeremy Gebbene662c0d2018-09-18 15:49:36 -060071menuconfig PHY_AQUANTIA
Alex89e50d92017-02-06 19:17:34 -080072 bool "Aquantia Ethernet PHYs support"
Jeremy Gebbenabe3edf2018-09-18 15:49:35 -060073 select PHY_GIGE
74 select PHYLIB_10G
Alex89e50d92017-02-06 19:17:34 -080075
Jeremy Gebbene662c0d2018-09-18 15:49:36 -060076config PHY_AQUANTIA_UPLOAD_FW
77 bool "Aquantia firmware loading support"
Jeremy Gebbene662c0d2018-09-18 15:49:36 -060078 depends on PHY_AQUANTIA
79 help
80 Aquantia PHYs use firmware which can be either loaded automatically
81 from storage directly attached to the phy or loaded by the boot loader
82 via MDIO commands. The firmware is loaded from a file, specified by
83 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
84
85config PHY_AQUANTIA_FW_PART
86 string "Aquantia firmware partition"
87 depends on PHY_AQUANTIA_UPLOAD_FW
88 help
89 Partition containing the firmware file.
90
91config PHY_AQUANTIA_FW_NAME
92 string "Aquantia firmware filename"
93 depends on PHY_AQUANTIA_UPLOAD_FW
94 help
95 Firmware filename.
96
Alex89e50d92017-02-06 19:17:34 -080097config PHY_ATHEROS
98 bool "Atheros Ethernet PHYs support"
99
100config PHY_BROADCOM
101 bool "Broadcom Ethernet PHYs support"
102
103config PHY_CORTINA
104 bool "Cortina Ethernet PHYs support"
105
Meenakshi Aggarwalf5ddc842020-10-29 19:16:15 +0530106config SYS_CORTINA_NO_FW_UPLOAD
107 bool "Cortina firmware loading support"
Meenakshi Aggarwalf5ddc842020-10-29 19:16:15 +0530108 depends on PHY_CORTINA
109 help
110 Cortina phy has provision to store phy firmware in attached dedicated
111 EEPROM. And boards designed with such EEPROM does not require firmware
112 upload.
113
Tom Rini0b0342f2019-11-26 17:32:43 -0500114choice
115 prompt "Location of the Cortina firmware"
116 default SYS_CORTINA_FW_IN_NOR
117 depends on PHY_CORTINA
118
119config SYS_CORTINA_FW_IN_MMC
120 bool "Cortina firmware in MMC"
121
122config SYS_CORTINA_FW_IN_NAND
123 bool "Cortina firmware in NAND flash"
124
125config SYS_CORTINA_FW_IN_NOR
126 bool "Cortina firmware in NOR flash"
127
128config SYS_CORTINA_FW_IN_REMOTE
129 bool "Cortina firmware in remote device"
130
131config SYS_CORTINA_FW_IN_SPIFLASH
132 bool "Cortina firmware in SPI flash"
133
134endchoice
135
Kuldeep Singh016965f2021-08-10 11:20:07 +0530136config CORTINA_FW_ADDR
137 hex "Cortina Firmware Address"
138 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
139 default 0x0
140
141config CORTINA_FW_LENGTH
142 hex "Cortina Firmware Length"
143 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
144 default 0x40000
145
Abbie Chang556872f2021-01-14 13:34:12 -0800146config PHY_CORTINA_ACCESS
147 bool "Cortina Access Ethernet PHYs support"
148 default y
149 depends on CORTINA_NI_ENET
150 help
151 Cortina Access Ethernet PHYs init process
152
Alex89e50d92017-02-06 19:17:34 -0800153config PHY_DAVICOM
154 bool "Davicom Ethernet PHYs support"
155
156config PHY_ET1011C
157 bool "LSI TruePHY ET1011C support"
158
159config PHY_LXT
160 bool "LXT971 Ethernet PHY support"
161
162config PHY_MARVELL
163 bool "Marvell Ethernet PHYs support"
164
Neil Armstrong7a4c90d2017-10-18 10:02:10 +0200165config PHY_MESON_GXL
166 bool "Amlogic Meson GXL Internal PHY support"
167
Alex89e50d92017-02-06 19:17:34 -0800168config PHY_MICREL
169 bool "Micrel Ethernet PHYs support"
Philipp Tomsich00c33612017-03-26 18:50:23 +0200170 help
171 Enable support for the GbE PHYs manufactured by Micrel (now
James Byrnebc292c22019-03-06 12:48:27 +0000172 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
173 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
174 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
175 KSZ90x1 family support" is selected).
Philipp Tomsich00c33612017-03-26 18:50:23 +0200176
177if PHY_MICREL
178
179config PHY_MICREL_KSZ9021
Alexandru Gagniuc4c69ccb2017-07-07 11:37:00 -0700180 bool
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700181 select PHY_MICREL_KSZ90X1
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700182
Philipp Tomsich00c33612017-03-26 18:50:23 +0200183config PHY_MICREL_KSZ9031
Alexandru Gagniuc4c69ccb2017-07-07 11:37:00 -0700184 bool
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700185 select PHY_MICREL_KSZ90X1
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700186
187config PHY_MICREL_KSZ90X1
188 bool "Micrel KSZ90x1 family support"
189 select PHY_GIGE
190 help
191 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
192 enabled, the extended register read/write for KSZ90x1 PHYs
193 is supported through the 'mdio' command and any RGMII signal
194 delays configured in the device tree will be applied to the
195 PHY during initialization.
196
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700197config PHY_MICREL_KSZ8XXX
198 bool "Micrel KSZ8xxx family support"
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700199 help
James Byrnebc292c22019-03-06 12:48:27 +0000200 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700201 (now a part of Microchip). This includes drivers for the KSZ804,
202 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
203
Philipp Tomsich00c33612017-03-26 18:50:23 +0200204endif # PHY_MICREL
Alex89e50d92017-02-06 19:17:34 -0800205
John Haechtenee253f92016-12-09 22:15:17 +0000206config PHY_MSCC
207 bool "Microsemi Corp Ethernet PHYs support"
208
Alex89e50d92017-02-06 19:17:34 -0800209config PHY_NATSEMI
210 bool "National Semiconductor Ethernet PHYs support"
211
Radu Pirea (NXP OSS)f2d36cb2021-06-18 21:58:30 +0300212config PHY_NXP_C45_TJA11XX
213 tristate "NXP C45 TJA11XX PHYs"
214 help
215 Enable support for NXP C45 TJA11XX PHYs.
216 Currently supports only the TJA1103 PHY.
217
Alex89e50d92017-02-06 19:17:34 -0800218config PHY_REALTEK
219 bool "Realtek Ethernet PHYs support"
220
221config RTL8211X_PHY_FORCE_MASTER
222 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
223 depends on PHY_REALTEK
224 help
225 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
226 This can work around link stability and data corruption issues on gigabit
227 links which can occur in slave mode on certain PHYs, e.g. on the
228 RTL8211C(L).
229
230 Please note that two directly connected devices (i.e. via crossover cable)
231 will not be able to establish a link between each other if they both force
232 master mode. Multiple devices forcing master mode when connected by a
233 network switch do not pose a problem as the switch configures its affected
234 ports into slave mode.
235
236 This option only affects gigabit links. If you must establish a direct
237 connection between two devices which both force master mode, try forcing
238 the link speed to 100MBit/s.
239
240 If unsure, say N.
241
Carlo Caionecf93d022019-01-24 08:54:37 +0000242config RTL8211F_PHY_FORCE_EEE_RXC_ON
243 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
244 depends on PHY_REALTEK
Carlo Caionecf93d022019-01-24 08:54:37 +0000245 help
246 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
247 transitions to/from a lower power consumption level (Low Power Idle
248 mode) based on link utilization. When no packets are being
249 transmitted, the system goes to Low Power Idle mode to save power.
250
251 Under particular circumstances this setting can cause issues where
252 the PHY is unable to transmit or receive any packet when in LPI mode.
253 The problem is caused when the PHY is configured to stop receiving
254 the xMII clock while it is signaling LPI. For some PHYs the bit
255 configuring this behavior is set by the Linux kernel, causing the
256 issue in U-Boot on reboot if the PHY retains the register value.
257
258 Default n, which means that the PHY state is not changed. To work
259 around the issues, change this setting to y.
260
Amit Singh Tomar4f21b2a2020-05-09 19:55:11 +0530261config RTL8201F_PHY_S700_RMII_TIMINGS
262 bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
263 depends on PHY_REALTEK
264 help
265 This provides an option to configure specific timing requirements (needed
266 for proper PHY operations) for the PHY module present on ACTION SEMI S700
267 based cubieboard7. Exact timing requiremnets seems to be SoC specific
268 (and it's undocumented) that comes from vendor code itself.
269
Alex89e50d92017-02-06 19:17:34 -0800270config PHY_SMSC
271 bool "Microchip(SMSC) Ethernet PHYs support"
272
273config PHY_TERANETICS
274 bool "Teranetics Ethernet PHYs support"
275
276config PHY_TI
277 bool "Texas Instruments Ethernet PHYs support"
Dan Murphy8b8d73a2020-05-04 16:14:39 -0500278 ---help---
279 Adds PHY registration support for TI PHYs.
280
281config PHY_TI_DP83867
282 select PHY_TI
283 bool "Texas Instruments Ethernet DP83867 PHY support"
284 ---help---
285 Adds support for the TI DP83867 1Gbit PHY.
Alex89e50d92017-02-06 19:17:34 -0800286
Dominic Rath11147e02021-12-22 08:57:46 +0100287config PHY_TI_DP83869
288 select PHY_TI
289 bool "Texas Instruments Ethernet DP83869 PHY support"
290 ---help---
291 Adds support for the TI DP83869 1Gbit PHY.
292
Dan Murphy3434cd72020-05-04 16:14:40 -0500293config PHY_TI_GENERIC
294 select PHY_TI
295 bool "Texas Instruments Generic Ethernet PHYs support"
296 ---help---
297 Adds support for Generic TI PHYs that don't need special handling but
298 the PHY name is associated with a PHY ID.
299
Alex89e50d92017-02-06 19:17:34 -0800300config PHY_VITESSE
301 bool "Vitesse Ethernet PHYs support"
302
303config PHY_XILINX
304 bool "Xilinx Ethernet PHYs support"
305
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +0530306config PHY_XILINX_GMII2RGMII
307 bool "Xilinx GMII to RGMII Ethernet PHYs support"
Bin Meng7e115582021-03-14 20:14:51 +0800308 depends on DM_ETH
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +0530309 help
310 This adds support for Xilinx GMII to RGMII IP core. This IP acts
311 as bridge between MAC connected over GMII and external phy that
312 is connected over RGMII interface.
313
Michal Simek488eec52022-02-23 15:45:42 +0100314config PHY_ETHERNET_ID
315 bool "Read ethernet PHY id"
316 depends on DM_GPIO
317 default y if ZYNQ_GEM
318 help
319 Enable this config to read ethernet phy id from the phy node of DT
320 and create a phy device using id.
321
Hannes Schmelzerda494602017-03-23 15:11:43 +0100322config PHY_FIXED
323 bool "Fixed-Link PHY"
324 depends on DM_ETH
325 help
326 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
327 connection (MII, RGMII, ...).
328 There is nothing like autoneogation and so
329 on, the link is always up with fixed speed and fixed duplex-setting.
330 More information: doc/device-tree-bindings/net/fixed-link.txt
331
Samuel Mendoza-Jonas2325c442019-06-18 11:37:17 +1000332config PHY_NCSI
333 bool "NC-SI based PHY"
334 depends on DM_ETH
335
Alex89e50d92017-02-06 19:17:34 -0800336endif #PHYLIB
Tom Rini6c851512022-03-18 08:38:26 -0400337
338config PHY_RESET_DELAY
339 int "Extra delay after reset before MII register access"
340 default 0
341 help
342 Some PHYs need extra delay after reset before any MII register access
343 is possible. For such PHY, set this option to the usec delay
344 required.