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Alex89e50d92017-02-06 19:17:34 -08001
2config BITBANGMII
3 bool "Bit-banged ethernet MII management channel support"
4
5config MV88E6352_SWITCH
6 bool "Marvell 88E6352 switch support"
7
8menuconfig PHYLIB
9 bool "Ethernet PHY (physical media interface) support"
Michal Simek5647da02018-02-06 13:23:52 +010010 depends on NET
Alex89e50d92017-02-06 19:17:34 -080011 help
12 Enable Ethernet PHY (physical media interface) support.
13
14if PHYLIB
15
Joe Hershberger46b7bd12018-03-30 11:52:16 -050016config PHY_ADDR_ENABLE
17 bool "Limit phy address"
18 default y if ARCH_SUNXI
19 help
20 Select this if you want to control which phy address is used
21
22if PHY_ADDR_ENABLE
Stefan Mavrodieve3ee5f52018-02-02 15:53:38 +020023config PHY_ADDR
24 int "PHY address"
25 default 1 if ARCH_SUNXI
26 default 0
27 help
28 The address of PHY on MII bus. Usually in range of 0 to 31.
Joe Hershberger46b7bd12018-03-30 11:52:16 -050029endif
Stefan Mavrodieve3ee5f52018-02-02 15:53:38 +020030
Florian Fainelli01b4ade2017-12-09 14:59:54 -080031config B53_SWITCH
32 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
33 help
34 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
35 This currently supports BCM53125 and similar models.
36
37if B53_SWITCH
38
39config B53_CPU_PORT
40 int "CPU port"
41 default 8
42
43config B53_PHY_PORTS
44 hex "Bitmask of PHY ports"
45
46endif # B53_SWITCH
47
Alex89e50d92017-02-06 19:17:34 -080048config MV88E61XX_SWITCH
Anatolij Gustschinb8b1a9e2019-10-27 01:14:41 +020049 bool "Marvell MV88E61xx Ethernet switch PHY support."
Alex89e50d92017-02-06 19:17:34 -080050
Tim Harveyc2cc9d42017-03-17 07:29:51 -070051if MV88E61XX_SWITCH
52
53config MV88E61XX_CPU_PORT
54 int "CPU Port"
55
56config MV88E61XX_PHY_PORTS
57 hex "Bitmask of PHY Ports"
58
59config MV88E61XX_FIXED_PORTS
60 hex "Bitmask of PHYless serdes Ports"
61
62endif # MV88E61XX_SWITCH
63
Alex89e50d92017-02-06 19:17:34 -080064config PHYLIB_10G
65 bool "Generic 10G PHY support"
66
Jeremy Gebbene662c0d2018-09-18 15:49:36 -060067menuconfig PHY_AQUANTIA
Alex89e50d92017-02-06 19:17:34 -080068 bool "Aquantia Ethernet PHYs support"
Jeremy Gebbenabe3edf2018-09-18 15:49:35 -060069 select PHY_GIGE
70 select PHYLIB_10G
Alex89e50d92017-02-06 19:17:34 -080071
Jeremy Gebbene662c0d2018-09-18 15:49:36 -060072config PHY_AQUANTIA_UPLOAD_FW
73 bool "Aquantia firmware loading support"
74 default n
75 depends on PHY_AQUANTIA
76 help
77 Aquantia PHYs use firmware which can be either loaded automatically
78 from storage directly attached to the phy or loaded by the boot loader
79 via MDIO commands. The firmware is loaded from a file, specified by
80 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
81
82config PHY_AQUANTIA_FW_PART
83 string "Aquantia firmware partition"
84 depends on PHY_AQUANTIA_UPLOAD_FW
85 help
86 Partition containing the firmware file.
87
88config PHY_AQUANTIA_FW_NAME
89 string "Aquantia firmware filename"
90 depends on PHY_AQUANTIA_UPLOAD_FW
91 help
92 Firmware filename.
93
Alex89e50d92017-02-06 19:17:34 -080094config PHY_ATHEROS
95 bool "Atheros Ethernet PHYs support"
96
97config PHY_BROADCOM
98 bool "Broadcom Ethernet PHYs support"
99
100config PHY_CORTINA
101 bool "Cortina Ethernet PHYs support"
102
Meenakshi Aggarwalf5ddc842020-10-29 19:16:15 +0530103config SYS_CORTINA_NO_FW_UPLOAD
104 bool "Cortina firmware loading support"
105 default n
106 depends on PHY_CORTINA
107 help
108 Cortina phy has provision to store phy firmware in attached dedicated
109 EEPROM. And boards designed with such EEPROM does not require firmware
110 upload.
111
Tom Rini0b0342f2019-11-26 17:32:43 -0500112choice
113 prompt "Location of the Cortina firmware"
114 default SYS_CORTINA_FW_IN_NOR
115 depends on PHY_CORTINA
116
117config SYS_CORTINA_FW_IN_MMC
118 bool "Cortina firmware in MMC"
119
120config SYS_CORTINA_FW_IN_NAND
121 bool "Cortina firmware in NAND flash"
122
123config SYS_CORTINA_FW_IN_NOR
124 bool "Cortina firmware in NOR flash"
125
126config SYS_CORTINA_FW_IN_REMOTE
127 bool "Cortina firmware in remote device"
128
129config SYS_CORTINA_FW_IN_SPIFLASH
130 bool "Cortina firmware in SPI flash"
131
132endchoice
133
Abbie Chang556872f2021-01-14 13:34:12 -0800134config PHY_CORTINA_ACCESS
135 bool "Cortina Access Ethernet PHYs support"
136 default y
137 depends on CORTINA_NI_ENET
138 help
139 Cortina Access Ethernet PHYs init process
140
Alex89e50d92017-02-06 19:17:34 -0800141config PHY_DAVICOM
142 bool "Davicom Ethernet PHYs support"
143
144config PHY_ET1011C
145 bool "LSI TruePHY ET1011C support"
146
147config PHY_LXT
148 bool "LXT971 Ethernet PHY support"
149
150config PHY_MARVELL
151 bool "Marvell Ethernet PHYs support"
152
Neil Armstrong7a4c90d2017-10-18 10:02:10 +0200153config PHY_MESON_GXL
154 bool "Amlogic Meson GXL Internal PHY support"
155
Alex89e50d92017-02-06 19:17:34 -0800156config PHY_MICREL
157 bool "Micrel Ethernet PHYs support"
Philipp Tomsich00c33612017-03-26 18:50:23 +0200158 help
159 Enable support for the GbE PHYs manufactured by Micrel (now
James Byrnebc292c22019-03-06 12:48:27 +0000160 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
161 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
162 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
163 KSZ90x1 family support" is selected).
Philipp Tomsich00c33612017-03-26 18:50:23 +0200164
165if PHY_MICREL
166
167config PHY_MICREL_KSZ9021
Alexandru Gagniuc4c69ccb2017-07-07 11:37:00 -0700168 bool
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700169 select PHY_MICREL_KSZ90X1
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700170
Philipp Tomsich00c33612017-03-26 18:50:23 +0200171config PHY_MICREL_KSZ9031
Alexandru Gagniuc4c69ccb2017-07-07 11:37:00 -0700172 bool
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700173 select PHY_MICREL_KSZ90X1
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700174
175config PHY_MICREL_KSZ90X1
176 bool "Micrel KSZ90x1 family support"
177 select PHY_GIGE
178 help
179 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
180 enabled, the extended register read/write for KSZ90x1 PHYs
181 is supported through the 'mdio' command and any RGMII signal
182 delays configured in the device tree will be applied to the
183 PHY during initialization.
184
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700185config PHY_MICREL_KSZ8XXX
186 bool "Micrel KSZ8xxx family support"
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700187 help
James Byrnebc292c22019-03-06 12:48:27 +0000188 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700189 (now a part of Microchip). This includes drivers for the KSZ804,
190 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
191
Philipp Tomsich00c33612017-03-26 18:50:23 +0200192endif # PHY_MICREL
Alex89e50d92017-02-06 19:17:34 -0800193
John Haechtenee253f92016-12-09 22:15:17 +0000194config PHY_MSCC
195 bool "Microsemi Corp Ethernet PHYs support"
196
Alex89e50d92017-02-06 19:17:34 -0800197config PHY_NATSEMI
198 bool "National Semiconductor Ethernet PHYs support"
199
200config PHY_REALTEK
201 bool "Realtek Ethernet PHYs support"
202
kevans@FreeBSD.org7c824012018-02-14 17:02:15 -0600203config RTL8211E_PINE64_GIGABIT_FIX
204 bool "Fix gigabit throughput on some Pine64+ models"
205 depends on PHY_REALTEK
206 help
207 Configure the Realtek RTL8211E found on some Pine64+ models differently to
208 fix throughput on Gigabit links, turning off all internal delays in the
209 process. The settings that this touches are not documented in the CONFREG
210 section of the RTL8211E datasheet, but come from Realtek by way of the
211 Pine64 engineering team.
212
Alex89e50d92017-02-06 19:17:34 -0800213config RTL8211X_PHY_FORCE_MASTER
214 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
215 depends on PHY_REALTEK
216 help
217 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
218 This can work around link stability and data corruption issues on gigabit
219 links which can occur in slave mode on certain PHYs, e.g. on the
220 RTL8211C(L).
221
222 Please note that two directly connected devices (i.e. via crossover cable)
223 will not be able to establish a link between each other if they both force
224 master mode. Multiple devices forcing master mode when connected by a
225 network switch do not pose a problem as the switch configures its affected
226 ports into slave mode.
227
228 This option only affects gigabit links. If you must establish a direct
229 connection between two devices which both force master mode, try forcing
230 the link speed to 100MBit/s.
231
232 If unsure, say N.
233
Carlo Caionecf93d022019-01-24 08:54:37 +0000234config RTL8211F_PHY_FORCE_EEE_RXC_ON
235 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
236 depends on PHY_REALTEK
237 default n
238 help
239 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
240 transitions to/from a lower power consumption level (Low Power Idle
241 mode) based on link utilization. When no packets are being
242 transmitted, the system goes to Low Power Idle mode to save power.
243
244 Under particular circumstances this setting can cause issues where
245 the PHY is unable to transmit or receive any packet when in LPI mode.
246 The problem is caused when the PHY is configured to stop receiving
247 the xMII clock while it is signaling LPI. For some PHYs the bit
248 configuring this behavior is set by the Linux kernel, causing the
249 issue in U-Boot on reboot if the PHY retains the register value.
250
251 Default n, which means that the PHY state is not changed. To work
252 around the issues, change this setting to y.
253
Amit Singh Tomar4f21b2a2020-05-09 19:55:11 +0530254config RTL8201F_PHY_S700_RMII_TIMINGS
255 bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
256 depends on PHY_REALTEK
257 help
258 This provides an option to configure specific timing requirements (needed
259 for proper PHY operations) for the PHY module present on ACTION SEMI S700
260 based cubieboard7. Exact timing requiremnets seems to be SoC specific
261 (and it's undocumented) that comes from vendor code itself.
262
Alex89e50d92017-02-06 19:17:34 -0800263config PHY_SMSC
264 bool "Microchip(SMSC) Ethernet PHYs support"
265
266config PHY_TERANETICS
267 bool "Teranetics Ethernet PHYs support"
268
269config PHY_TI
270 bool "Texas Instruments Ethernet PHYs support"
Dan Murphy8b8d73a2020-05-04 16:14:39 -0500271 ---help---
272 Adds PHY registration support for TI PHYs.
273
274config PHY_TI_DP83867
275 select PHY_TI
276 bool "Texas Instruments Ethernet DP83867 PHY support"
277 ---help---
278 Adds support for the TI DP83867 1Gbit PHY.
Alex89e50d92017-02-06 19:17:34 -0800279
Dan Murphy3434cd72020-05-04 16:14:40 -0500280config PHY_TI_GENERIC
281 select PHY_TI
282 bool "Texas Instruments Generic Ethernet PHYs support"
283 ---help---
284 Adds support for Generic TI PHYs that don't need special handling but
285 the PHY name is associated with a PHY ID.
286
Alex89e50d92017-02-06 19:17:34 -0800287config PHY_VITESSE
288 bool "Vitesse Ethernet PHYs support"
289
290config PHY_XILINX
291 bool "Xilinx Ethernet PHYs support"
292
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +0530293config PHY_XILINX_GMII2RGMII
294 bool "Xilinx GMII to RGMII Ethernet PHYs support"
Bin Meng7e115582021-03-14 20:14:51 +0800295 depends on DM_ETH
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +0530296 help
297 This adds support for Xilinx GMII to RGMII IP core. This IP acts
298 as bridge between MAC connected over GMII and external phy that
299 is connected over RGMII interface.
300
Hannes Schmelzerda494602017-03-23 15:11:43 +0100301config PHY_FIXED
302 bool "Fixed-Link PHY"
303 depends on DM_ETH
304 help
305 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
306 connection (MII, RGMII, ...).
307 There is nothing like autoneogation and so
308 on, the link is always up with fixed speed and fixed duplex-setting.
309 More information: doc/device-tree-bindings/net/fixed-link.txt
310
Samuel Mendoza-Jonas2325c442019-06-18 11:37:17 +1000311config PHY_NCSI
312 bool "NC-SI based PHY"
313 depends on DM_ETH
314
Alex89e50d92017-02-06 19:17:34 -0800315endif #PHYLIB