Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for UniPhier PH1-Pro4 SoC |
| 3 | * |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 4 | * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 5 | * |
Masahiro Yamada | 7bfb0a2 | 2015-06-30 18:27:01 +0900 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ X11 |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 9 | /include/ "uniphier-common32.dtsi" |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 10 | |
| 11 | / { |
Masahiro Yamada | d5f83a4 | 2015-03-11 15:54:46 +0900 | [diff] [blame] | 12 | compatible = "socionext,ph1-pro4"; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 13 | |
| 14 | cpus { |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 15 | #address-cells = <1>; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 16 | #size-cells = <0>; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 17 | enable-method = "socionext,uniphier-smp"; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 18 | |
| 19 | cpu@0 { |
| 20 | device_type = "cpu"; |
| 21 | compatible = "arm,cortex-a9"; |
| 22 | reg = <0>; |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 23 | next-level-cache = <&l2>; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 24 | }; |
| 25 | |
| 26 | cpu@1 { |
| 27 | device_type = "cpu"; |
| 28 | compatible = "arm,cortex-a9"; |
| 29 | reg = <1>; |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 30 | next-level-cache = <&l2>; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 31 | }; |
| 32 | }; |
| 33 | |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 34 | clocks { |
| 35 | arm_timer_clk: arm_timer_clk { |
| 36 | #clock-cells = <0>; |
| 37 | compatible = "fixed-clock"; |
| 38 | clock-frequency = <50000000>; |
| 39 | }; |
Masahiro Yamada | 37649af | 2015-08-28 22:33:13 +0900 | [diff] [blame] | 40 | |
| 41 | uart_clk: uart_clk { |
| 42 | #clock-cells = <0>; |
| 43 | compatible = "fixed-clock"; |
| 44 | clock-frequency = <73728000>; |
| 45 | }; |
| 46 | |
| 47 | i2c_clk: i2c_clk { |
| 48 | #clock-cells = <0>; |
| 49 | compatible = "fixed-clock"; |
| 50 | clock-frequency = <50000000>; |
| 51 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 52 | }; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 53 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 54 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 55 | &soc { |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 56 | l2: l2-cache@500c0000 { |
| 57 | compatible = "socionext,uniphier-system-cache"; |
| 58 | reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; |
| 59 | interrupts = <0 174 4>, <0 175 4>; |
| 60 | cache-unified; |
| 61 | cache-size = <(768 * 1024)>; |
| 62 | cache-sets = <256>; |
| 63 | cache-line-size = <128>; |
| 64 | cache-level = <2>; |
| 65 | }; |
| 66 | |
Masahiro Yamada | 6835b45 | 2016-02-16 17:03:51 +0900 | [diff] [blame] | 67 | port0x: gpio@55000008 { |
| 68 | compatible = "socionext,uniphier-gpio"; |
| 69 | reg = <0x55000008 0x8>; |
| 70 | gpio-controller; |
| 71 | #gpio-cells = <2>; |
| 72 | }; |
| 73 | |
| 74 | port1x: gpio@55000010 { |
| 75 | compatible = "socionext,uniphier-gpio"; |
| 76 | reg = <0x55000010 0x8>; |
| 77 | gpio-controller; |
| 78 | #gpio-cells = <2>; |
| 79 | }; |
| 80 | |
| 81 | port2x: gpio@55000018 { |
| 82 | compatible = "socionext,uniphier-gpio"; |
| 83 | reg = <0x55000018 0x8>; |
| 84 | gpio-controller; |
| 85 | #gpio-cells = <2>; |
| 86 | }; |
| 87 | |
| 88 | port3x: gpio@55000020 { |
| 89 | compatible = "socionext,uniphier-gpio"; |
| 90 | reg = <0x55000020 0x8>; |
| 91 | gpio-controller; |
| 92 | #gpio-cells = <2>; |
| 93 | }; |
| 94 | |
| 95 | port4: gpio@55000028 { |
| 96 | compatible = "socionext,uniphier-gpio"; |
| 97 | reg = <0x55000028 0x8>; |
| 98 | gpio-controller; |
| 99 | #gpio-cells = <2>; |
| 100 | }; |
| 101 | |
| 102 | port5x: gpio@55000030 { |
| 103 | compatible = "socionext,uniphier-gpio"; |
| 104 | reg = <0x55000030 0x8>; |
| 105 | gpio-controller; |
| 106 | #gpio-cells = <2>; |
| 107 | }; |
| 108 | |
| 109 | port6x: gpio@55000038 { |
| 110 | compatible = "socionext,uniphier-gpio"; |
| 111 | reg = <0x55000038 0x8>; |
| 112 | gpio-controller; |
| 113 | #gpio-cells = <2>; |
| 114 | }; |
| 115 | |
| 116 | port7x: gpio@55000040 { |
| 117 | compatible = "socionext,uniphier-gpio"; |
| 118 | reg = <0x55000040 0x8>; |
| 119 | gpio-controller; |
| 120 | #gpio-cells = <2>; |
| 121 | }; |
| 122 | |
| 123 | port8x: gpio@55000048 { |
| 124 | compatible = "socionext,uniphier-gpio"; |
| 125 | reg = <0x55000048 0x8>; |
| 126 | gpio-controller; |
| 127 | #gpio-cells = <2>; |
| 128 | }; |
| 129 | |
| 130 | port9x: gpio@55000050 { |
| 131 | compatible = "socionext,uniphier-gpio"; |
| 132 | reg = <0x55000050 0x8>; |
| 133 | gpio-controller; |
| 134 | #gpio-cells = <2>; |
| 135 | }; |
| 136 | |
| 137 | port10x: gpio@55000058 { |
| 138 | compatible = "socionext,uniphier-gpio"; |
| 139 | reg = <0x55000058 0x8>; |
| 140 | gpio-controller; |
| 141 | #gpio-cells = <2>; |
| 142 | }; |
| 143 | |
| 144 | port11x: gpio@55000060 { |
| 145 | compatible = "socionext,uniphier-gpio"; |
| 146 | reg = <0x55000060 0x8>; |
| 147 | gpio-controller; |
| 148 | #gpio-cells = <2>; |
| 149 | }; |
| 150 | |
| 151 | port12x: gpio@55000068 { |
| 152 | compatible = "socionext,uniphier-gpio"; |
| 153 | reg = <0x55000068 0x8>; |
| 154 | gpio-controller; |
| 155 | #gpio-cells = <2>; |
| 156 | }; |
| 157 | |
| 158 | port13x: gpio@55000070 { |
| 159 | compatible = "socionext,uniphier-gpio"; |
| 160 | reg = <0x55000070 0x8>; |
| 161 | gpio-controller; |
| 162 | #gpio-cells = <2>; |
| 163 | }; |
| 164 | |
| 165 | port14x: gpio@55000078 { |
| 166 | compatible = "socionext,uniphier-gpio"; |
| 167 | reg = <0x55000078 0x8>; |
| 168 | gpio-controller; |
| 169 | #gpio-cells = <2>; |
| 170 | }; |
| 171 | |
| 172 | port17x: gpio@550000a0 { |
| 173 | compatible = "socionext,uniphier-gpio"; |
| 174 | reg = <0x550000a0 0x8>; |
| 175 | gpio-controller; |
| 176 | #gpio-cells = <2>; |
| 177 | }; |
| 178 | |
| 179 | port18x: gpio@550000a8 { |
| 180 | compatible = "socionext,uniphier-gpio"; |
| 181 | reg = <0x550000a8 0x8>; |
| 182 | gpio-controller; |
| 183 | #gpio-cells = <2>; |
| 184 | }; |
| 185 | |
| 186 | port19x: gpio@550000b0 { |
| 187 | compatible = "socionext,uniphier-gpio"; |
| 188 | reg = <0x550000b0 0x8>; |
| 189 | gpio-controller; |
| 190 | #gpio-cells = <2>; |
| 191 | }; |
| 192 | |
| 193 | port20x: gpio@550000b8 { |
| 194 | compatible = "socionext,uniphier-gpio"; |
| 195 | reg = <0x550000b8 0x8>; |
| 196 | gpio-controller; |
| 197 | #gpio-cells = <2>; |
| 198 | }; |
| 199 | |
| 200 | port21x: gpio@550000c0 { |
| 201 | compatible = "socionext,uniphier-gpio"; |
| 202 | reg = <0x550000c0 0x8>; |
| 203 | gpio-controller; |
| 204 | #gpio-cells = <2>; |
| 205 | }; |
| 206 | |
| 207 | port22x: gpio@550000c8 { |
| 208 | compatible = "socionext,uniphier-gpio"; |
| 209 | reg = <0x550000c8 0x8>; |
| 210 | gpio-controller; |
| 211 | #gpio-cells = <2>; |
| 212 | }; |
| 213 | |
| 214 | port23x: gpio@550000d0 { |
| 215 | compatible = "socionext,uniphier-gpio"; |
| 216 | reg = <0x550000d0 0x8>; |
| 217 | gpio-controller; |
| 218 | #gpio-cells = <2>; |
| 219 | }; |
| 220 | |
| 221 | port24x: gpio@550000d8 { |
| 222 | compatible = "socionext,uniphier-gpio"; |
| 223 | reg = <0x550000d8 0x8>; |
| 224 | gpio-controller; |
| 225 | #gpio-cells = <2>; |
| 226 | }; |
| 227 | |
| 228 | port25x: gpio@550000e0 { |
| 229 | compatible = "socionext,uniphier-gpio"; |
| 230 | reg = <0x550000e0 0x8>; |
| 231 | gpio-controller; |
| 232 | #gpio-cells = <2>; |
| 233 | }; |
| 234 | |
| 235 | port26x: gpio@550000e8 { |
| 236 | compatible = "socionext,uniphier-gpio"; |
| 237 | reg = <0x550000e8 0x8>; |
| 238 | gpio-controller; |
| 239 | #gpio-cells = <2>; |
| 240 | }; |
| 241 | |
| 242 | port27x: gpio@550000f0 { |
| 243 | compatible = "socionext,uniphier-gpio"; |
| 244 | reg = <0x550000f0 0x8>; |
| 245 | gpio-controller; |
| 246 | #gpio-cells = <2>; |
| 247 | }; |
| 248 | |
| 249 | port28x: gpio@550000f8 { |
| 250 | compatible = "socionext,uniphier-gpio"; |
| 251 | reg = <0x550000f8 0x8>; |
| 252 | gpio-controller; |
| 253 | #gpio-cells = <2>; |
| 254 | }; |
| 255 | |
| 256 | port29x: gpio@55000100 { |
| 257 | compatible = "socionext,uniphier-gpio"; |
| 258 | reg = <0x55000100 0x8>; |
| 259 | gpio-controller; |
| 260 | #gpio-cells = <2>; |
| 261 | }; |
| 262 | |
| 263 | port30x: gpio@55000108 { |
| 264 | compatible = "socionext,uniphier-gpio"; |
| 265 | reg = <0x55000108 0x8>; |
| 266 | gpio-controller; |
| 267 | #gpio-cells = <2>; |
| 268 | }; |
| 269 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 270 | i2c0: i2c@58780000 { |
| 271 | compatible = "socionext,uniphier-fi2c"; |
| 272 | status = "disabled"; |
| 273 | reg = <0x58780000 0x80>; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 274 | #address-cells = <1>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 275 | #size-cells = <0>; |
| 276 | interrupts = <0 41 4>; |
| 277 | pinctrl-names = "default"; |
| 278 | pinctrl-0 = <&pinctrl_i2c0>; |
| 279 | clocks = <&i2c_clk>; |
| 280 | clock-frequency = <100000>; |
| 281 | }; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 282 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 283 | i2c1: i2c@58781000 { |
| 284 | compatible = "socionext,uniphier-fi2c"; |
| 285 | status = "disabled"; |
| 286 | reg = <0x58781000 0x80>; |
| 287 | #address-cells = <1>; |
| 288 | #size-cells = <0>; |
| 289 | interrupts = <0 42 4>; |
| 290 | pinctrl-names = "default"; |
| 291 | pinctrl-0 = <&pinctrl_i2c1>; |
| 292 | clocks = <&i2c_clk>; |
| 293 | clock-frequency = <100000>; |
| 294 | }; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 295 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 296 | i2c2: i2c@58782000 { |
| 297 | compatible = "socionext,uniphier-fi2c"; |
| 298 | status = "disabled"; |
| 299 | reg = <0x58782000 0x80>; |
| 300 | #address-cells = <1>; |
| 301 | #size-cells = <0>; |
| 302 | interrupts = <0 43 4>; |
| 303 | pinctrl-names = "default"; |
| 304 | pinctrl-0 = <&pinctrl_i2c2>; |
| 305 | clocks = <&i2c_clk>; |
| 306 | clock-frequency = <100000>; |
| 307 | }; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 308 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 309 | i2c3: i2c@58783000 { |
| 310 | compatible = "socionext,uniphier-fi2c"; |
| 311 | status = "disabled"; |
| 312 | reg = <0x58783000 0x80>; |
| 313 | #address-cells = <1>; |
| 314 | #size-cells = <0>; |
| 315 | interrupts = <0 44 4>; |
| 316 | pinctrl-names = "default"; |
| 317 | pinctrl-0 = <&pinctrl_i2c3>; |
| 318 | clocks = <&i2c_clk>; |
| 319 | clock-frequency = <100000>; |
| 320 | }; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 321 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 322 | /* i2c4 does not exist */ |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 323 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 324 | /* chip-internal connection for DMD */ |
| 325 | i2c5: i2c@58785000 { |
| 326 | compatible = "socionext,uniphier-fi2c"; |
| 327 | reg = <0x58785000 0x80>; |
| 328 | #address-cells = <1>; |
| 329 | #size-cells = <0>; |
| 330 | interrupts = <0 25 4>; |
| 331 | clocks = <&i2c_clk>; |
| 332 | clock-frequency = <400000>; |
| 333 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 334 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 335 | /* chip-internal connection for HDMI */ |
| 336 | i2c6: i2c@58786000 { |
| 337 | compatible = "socionext,uniphier-fi2c"; |
| 338 | reg = <0x58786000 0x80>; |
| 339 | #address-cells = <1>; |
| 340 | #size-cells = <0>; |
| 341 | interrupts = <0 26 4>; |
| 342 | clocks = <&i2c_clk>; |
| 343 | clock-frequency = <400000>; |
| 344 | }; |
Masahiro Yamada | 9a72462 | 2014-11-26 18:34:01 +0900 | [diff] [blame] | 345 | |
Masahiro Yamada | 299307d | 2016-02-18 19:52:50 +0900 | [diff] [blame] | 346 | sd: sdhc@5a400000 { |
| 347 | compatible = "socionext,uniphier-sdhc"; |
| 348 | status = "disabled"; |
| 349 | reg = <0x5a400000 0x200>; |
| 350 | interrupts = <0 76 4>; |
| 351 | pinctrl-names = "default", "1.8v"; |
| 352 | pinctrl-0 = <&pinctrl_sd>; |
| 353 | pinctrl-1 = <&pinctrl_sd_1v8>; |
| 354 | clocks = <&mio 0>; |
| 355 | bus-width = <4>; |
| 356 | }; |
| 357 | |
| 358 | emmc: sdhc@5a500000 { |
| 359 | compatible = "socionext,uniphier-sdhc"; |
| 360 | status = "disabled"; |
| 361 | reg = <0x5a500000 0x200>; |
| 362 | interrupts = <0 78 4>; |
| 363 | pinctrl-names = "default", "1.8v"; |
| 364 | pinctrl-0 = <&pinctrl_emmc>; |
| 365 | pinctrl-1 = <&pinctrl_emmc_1v8>; |
| 366 | clocks = <&mio 1>; |
| 367 | bus-width = <8>; |
| 368 | non-removable; |
| 369 | }; |
| 370 | |
| 371 | sd1: sdhc@5a600000 { |
| 372 | compatible = "socionext,uniphier-sdhc"; |
| 373 | status = "disabled"; |
| 374 | reg = <0x5a600000 0x200>; |
| 375 | interrupts = <0 85 4>; |
| 376 | pinctrl-names = "default", "1.8v"; |
| 377 | pinctrl-0 = <&pinctrl_sd1>; |
| 378 | pinctrl-1 = <&pinctrl_sd1_1v8>; |
| 379 | clocks = <&mio 2>; |
| 380 | bus-width = <4>; |
| 381 | }; |
| 382 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 383 | usb2: usb@5a800100 { |
| 384 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 385 | status = "disabled"; |
| 386 | reg = <0x5a800100 0x100>; |
| 387 | interrupts = <0 80 4>; |
| 388 | pinctrl-names = "default"; |
| 389 | pinctrl-0 = <&pinctrl_usb2>; |
Masahiro Yamada | cf4280a | 2016-02-02 21:11:37 +0900 | [diff] [blame] | 390 | clocks = <&mio 3>, <&mio 6>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 391 | }; |
Masahiro Yamada | ff7bf56 | 2014-12-06 00:03:23 +0900 | [diff] [blame] | 392 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 393 | usb3: usb@5a810100 { |
| 394 | compatible = "socionext,uniphier-ehci", "generic-ehci"; |
| 395 | status = "disabled"; |
| 396 | reg = <0x5a810100 0x100>; |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 397 | interrupts = <0 81 4>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 398 | pinctrl-names = "default"; |
| 399 | pinctrl-0 = <&pinctrl_usb3>; |
Masahiro Yamada | cf4280a | 2016-02-02 21:11:37 +0900 | [diff] [blame] | 400 | clocks = <&mio 4>, <&mio 6>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 401 | }; |
Masahiro Yamada | 73e8efc | 2015-02-27 02:26:59 +0900 | [diff] [blame] | 402 | |
Masahiro Yamada | 2707e83 | 2016-06-29 19:39:02 +0900 | [diff] [blame] | 403 | aidet@5fc20000 { |
| 404 | compatible = "simple-mfd", "syscon"; |
| 405 | reg = <0x5fc20000 0x200>; |
| 406 | }; |
| 407 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 408 | usb0: usb@65a00000 { |
| 409 | compatible = "socionext,uniphier-xhci", "generic-xhci"; |
| 410 | status = "disabled"; |
| 411 | reg = <0x65a00000 0x100>; |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 412 | interrupts = <0 134 4>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 413 | pinctrl-names = "default"; |
| 414 | pinctrl-0 = <&pinctrl_usb0>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 415 | }; |
Masahiro Yamada | 73e8efc | 2015-02-27 02:26:59 +0900 | [diff] [blame] | 416 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 417 | usb1: usb@65c00000 { |
| 418 | compatible = "socionext,uniphier-xhci", "generic-xhci"; |
| 419 | status = "disabled"; |
| 420 | reg = <0x65c00000 0x100>; |
Masahiro Yamada | b36f305 | 2015-12-16 10:54:08 +0900 | [diff] [blame] | 421 | interrupts = <0 137 4>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 422 | pinctrl-names = "default"; |
| 423 | pinctrl-0 = <&pinctrl_usb1>; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 424 | }; |
| 425 | }; |
Masahiro Yamada | 37649af | 2015-08-28 22:33:13 +0900 | [diff] [blame] | 426 | |
Masahiro Yamada | 224e2f7 | 2016-02-02 21:11:33 +0900 | [diff] [blame] | 427 | &refclk { |
| 428 | clock-frequency = <25000000>; |
| 429 | }; |
| 430 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 431 | &serial0 { |
| 432 | clock-frequency = <73728000>; |
| 433 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 434 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 435 | &serial1 { |
| 436 | clock-frequency = <73728000>; |
| 437 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 438 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 439 | &serial2 { |
| 440 | clock-frequency = <73728000>; |
| 441 | }; |
Masahiro Yamada | bbbb0bd | 2015-06-30 18:27:00 +0900 | [diff] [blame] | 442 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 443 | &serial3 { |
| 444 | clock-frequency = <73728000>; |
Masahiro Yamada | 53f6ec6 | 2014-11-26 18:33:59 +0900 | [diff] [blame] | 445 | }; |
Masahiro Yamada | 37649af | 2015-08-28 22:33:13 +0900 | [diff] [blame] | 446 | |
Masahiro Yamada | 1d5df7b | 2016-02-02 21:11:36 +0900 | [diff] [blame] | 447 | &mio { |
| 448 | compatible = "socionext,ph1-pro4-mioctrl"; |
| 449 | clock-names = "stdmac", "ehci"; |
| 450 | clocks = <&sysctrl 10>, <&sysctrl 18>; |
| 451 | }; |
| 452 | |
Masahiro Yamada | 8095183 | 2016-02-02 21:11:35 +0900 | [diff] [blame] | 453 | &peri { |
| 454 | compatible = "socionext,ph1-pro4-perictrl"; |
| 455 | clock-names = "uart", "fi2c"; |
| 456 | clocks = <&sysctrl 3>, <&sysctrl 4>; |
| 457 | }; |
| 458 | |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 459 | &pinctrl { |
Masahiro Yamada | 1174603f | 2016-06-29 19:38:56 +0900 | [diff] [blame] | 460 | compatible = "socionext,uniphier-pro4-pinctrl"; |
Masahiro Yamada | 3de725b | 2015-12-16 10:54:07 +0900 | [diff] [blame] | 461 | }; |
Masahiro Yamada | e84513b | 2016-02-02 21:11:34 +0900 | [diff] [blame] | 462 | |
| 463 | &sysctrl { |
| 464 | compatible = "socionext,ph1-pro4-sysctrl"; |
| 465 | }; |