blob: c67d02f7c29c0aed645a8ec23bad813d49d0b670 [file] [log] [blame]
Stefan Agner7b852342018-05-30 19:01:48 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02003 * Copyright (C) 2018-2019 Toradex AG
Stefan Agner7b852342018-05-30 19:01:48 +02004 */
5#include <common.h>
Simon Glassa7b51302019-11-14 12:57:46 -07006#include <init.h>
Simon Glassdbd79542020-05-10 11:40:11 -06007#include <linux/delay.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02008
Stefan Agner7b852342018-05-30 19:01:48 +02009#include <asm/arch/clock.h>
10#include <asm/arch/crm_regs.h>
11#include <asm/arch/imx-regs.h>
12#include <asm/arch-mx6/clock.h>
13#include <asm/arch-mx6/imx-regs.h>
14#include <asm/arch-mx6/mx6ull_pins.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/gpio.h>
17#include <asm/mach-imx/boot_mode.h>
18#include <asm/mach-imx/iomux-v3.h>
19#include <asm/io.h>
Stefan Agner7b852342018-05-30 19:01:48 +020020#include <dm.h>
21#include <dm/platform_data/serial_mxc.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060022#include <env.h>
Stefan Agner7b852342018-05-30 19:01:48 +020023#include <fdt_support.h>
Stefan Agner7b852342018-05-30 19:01:48 +020024#include <imx_thermal.h>
25#include <jffs2/load_kernel.h>
26#include <linux/sizes.h>
Stefan Agner7b852342018-05-30 19:01:48 +020027#include <miiphy.h>
28#include <mtd_node.h>
29#include <netdev.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020030
Stefan Agner7b852342018-05-30 19:01:48 +020031#include "../common/tdx-common.h"
Stefan Agnerbf1f2892019-04-09 17:24:09 +020032#include "../common/tdx-cfg-block.h"
Stefan Agner7b852342018-05-30 19:01:48 +020033
34DECLARE_GLOBAL_DATA_PTR;
35
Stefan Agner7b852342018-05-30 19:01:48 +020036#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
37 PAD_CTL_DSE_48ohm)
38
Philippe Schenkerde51f532019-04-09 17:24:12 +020039#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
40
Stefan Agner7b852342018-05-30 19:01:48 +020041#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
42
43#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
44
Stefan Agner7b852342018-05-30 19:01:48 +020045int dram_init(void)
46{
47 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
48
49 return 0;
50}
51
Stefan Agner7b852342018-05-30 19:01:48 +020052#ifdef CONFIG_NAND_MXS
Stefan Agner7b852342018-05-30 19:01:48 +020053static void setup_gpmi_nand(void)
54{
Stefan Agner7b852342018-05-30 19:01:48 +020055 setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
56 (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
57}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020058#endif /* CONFIG_NAND_MXS */
Stefan Agner7b852342018-05-30 19:01:48 +020059
60#ifdef CONFIG_VIDEO_MXS
61static iomux_v3_cfg_t const lcd_pads[] = {
62 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
63 MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
64 MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
65 MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
66 MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
67 MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
68 MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
69 MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
70 MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
71 MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
72 MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
73 MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
74 MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
75 MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
76 MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
77 MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
78 MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
79 MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
80 MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
81 MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
82 MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
83 MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
84};
85
86static iomux_v3_cfg_t const backlight_pads[] = {
87 /* Backlight On */
88 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
89 /* Backlight PWM<A> (multiplexed pin) */
90 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
91};
92
93#define GPIO_BL_ON IMX_GPIO_NR(1, 11)
94#define GPIO_PWM_A IMX_GPIO_NR(4, 11)
95
96static int setup_lcd(void)
97{
98 imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
99
100 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
101
102 /* Set BL_ON */
103 gpio_request(GPIO_BL_ON, "BL_ON");
104 gpio_direction_output(GPIO_BL_ON, 1);
105
106 /* Set PWM<A> to full brightness (assuming inversed polarity) */
107 gpio_request(GPIO_PWM_A, "PWM<A>");
108 gpio_direction_output(GPIO_PWM_A, 0);
109
110 return 0;
111}
112#endif
113
Stefan Agner7b852342018-05-30 19:01:48 +0200114#ifdef CONFIG_FEC_MXC
Stefan Agner7b852342018-05-30 19:01:48 +0200115static int setup_fec(void)
116{
117 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
118 int ret;
119
Stefan Agner7b852342018-05-30 19:01:48 +0200120 /* provide the PHY clock from the i.MX 6 */
121 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
122 if (ret)
123 return ret;
124
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200125 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
Stefan Agner7b852342018-05-30 19:01:48 +0200126 clrsetbits_le32(&iomuxc_regs->gpr[1],
127 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
128 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
129
Marcel Ziswiler561d1372019-04-09 17:24:11 +0200130 /* give new Ethernet PHY power save mode circuitry time to settle */
131 mdelay(300);
132
Stefan Agner7b852342018-05-30 19:01:48 +0200133 return 0;
134}
135
136int board_phy_config(struct phy_device *phydev)
137{
138 if (phydev->drv->config)
139 phydev->drv->config(phydev);
140 return 0;
141}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200142#endif /* CONFIG_FEC_MXC */
Stefan Agner7b852342018-05-30 19:01:48 +0200143
144int board_init(void)
145{
146 /* address of boot parameters */
147 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
148
149#ifdef CONFIG_FEC_MXC
150 setup_fec();
151#endif
152
153#ifdef CONFIG_NAND_MXS
154 setup_gpmi_nand();
155#endif
156
157#ifdef CONFIG_VIDEO_MXS
158 setup_lcd();
159#endif
160
Stefan Agner7b852342018-05-30 19:01:48 +0200161 return 0;
162}
163
164#ifdef CONFIG_CMD_BMODE
165/* TODO */
166static const struct boot_mode board_boot_modes[] = {
167 /* 4 bit bus width */
168 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
169 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
170 {NULL, 0},
171};
172#endif
173
174int board_late_init(void)
175{
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200176#ifdef CONFIG_TDX_CFG_BLOCK
177 /*
178 * If we have a valid config block and it says we are a module with
179 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
180 */
181 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
182 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
Stefan Agner7b852342018-05-30 19:01:48 +0200183 env_set("variant", "-wifi");
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200184#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200185
Philippe Schenkerde51f532019-04-09 17:24:12 +0200186 /*
187 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
188 * SOC to request for a lower voltage during sleep. This is necessary
189 * because the voltage is changing too slow for the SOC to wake up
190 * properly.
191 */
192 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
193
Stefan Agner7b852342018-05-30 19:01:48 +0200194#ifdef CONFIG_CMD_BMODE
195 add_board_boot_modes(board_boot_modes);
196#endif
197
198#ifdef CONFIG_CMD_USB_SDP
199 if (is_boot_from_usb()) {
200 printf("Serial Downloader recovery mode, using sdp command\n");
201 env_set("bootdelay", "0");
202 env_set("bootcmd", "sdp 0");
203 }
204#endif /* CONFIG_CMD_USB_SDP */
205
206 return 0;
207}
208
209int checkboard(void)
210{
211 printf("Model: Toradex Colibri iMX6ULL\n");
212
213 return 0;
214}
215
216#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
217int ft_board_setup(void *blob, bd_t *bd)
218{
219#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
220 static struct node_info nodes[] = {
221 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
222 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
223 };
224
225 /* Update partition nodes using info from mtdparts env var */
226 puts(" Updating MTD partitions...\n");
227 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
228#endif
229
230 return ft_common_board_setup(blob, bd);
231}
232#endif
233
Stefan Agner7b852342018-05-30 19:01:48 +0200234static struct mxc_serial_platdata mxc_serial_plat = {
235 .reg = (struct mxc_uart *)UART1_BASE,
236 .use_dte = 1,
237};
238
239U_BOOT_DEVICE(mxc_serial) = {
240 .name = "serial_mxc",
241 .platdata = &mxc_serial_plat,
242};